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author | Yang Rong <rong.r.yang@intel.com> | 2017-05-15 13:36:15 +0800 |
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committer | Yang Rong <rong.r.yang@intel.com> | 2017-05-15 18:54:28 +0800 |
commit | 2c1af92a2e8d8c3f31f2643f573cdceeaedfc372 (patch) | |
tree | 287009606fa9872591952a9e55f6d0b58dd99ee4 /src | |
parent | da576713c4d84c1c746c11352d3e9a7afa8c0598 (diff) | |
download | beignet-2c1af92a2e8d8c3f31f2643f573cdceeaedfc372.tar.gz |
GLK: add Geminilake pciids.
Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Pan Xiuli <xiuli.pan@intel.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/cl_device_data.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/cl_device_data.h b/src/cl_device_data.h index f3c52049..c3d6c45f 100644 --- a/src/cl_device_data.h +++ b/src/cl_device_data.h @@ -361,7 +361,14 @@ #define IS_KABYLAKE(devid) (IS_KBL_GT1(devid) || IS_KBL_GT15(devid) || IS_KBL_GT2(devid) || IS_KBL_GT3(devid) || IS_KBL_GT4(devid)) -#define IS_GEN9(devid) (IS_SKYLAKE(devid) || IS_BROXTON(devid) || IS_KABYLAKE(devid)) +#define PCI_CHIP_GLK_3x6 0x3184 +#define PCI_CHIP_GLK_2x6 0x3185 + +#define IS_GEMINILAKE(devid) \ + (devid == PCI_CHIP_GLK_3x6 || \ + devid == PCI_CHIP_GLK_2x6) + +#define IS_GEN9(devid) (IS_SKYLAKE(devid) || IS_BROXTON(devid) || IS_KABYLAKE(devid) || IS_GEMINILAKE(devid)) #define MAX_OCLVERSION(devid) (IS_GEN9(devid) ? 200 : 120) |