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author | Ruiling Song <ruiling.song@intel.com> | 2016-06-02 10:21:14 +0800 |
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committer | Yang Rong <rong.r.yang@intel.com> | 2016-06-12 16:52:24 +0800 |
commit | 0d65ba8238dcbe8b40a8425f33c4c10c23ae9b1a (patch) | |
tree | 6d96e4ed2b1187e4f0b038cf8f98f45783eb0665 /src | |
parent | 4d01d1b4221329f285a73d020724176f8f40c1bc (diff) | |
download | beignet-0d65ba8238dcbe8b40a8425f33c4c10c23ae9b1a.tar.gz |
GBE: Optimize extraLiveOut register info.
extraLiveout anlysis is used to detect registers defined in loop and
used out-of the loop. Previous logic may also include registers defined
BEFORE loop and live-through loop as extraLiveout, which is not accurate.
As the extraLiveout registers will be forced as non-uniform, which may
waste some register space. Excluding registers that are defined before loop
while used out-of loop will make such registers get correct uniform/non-uniform
information. This would benefit some gemm cl kernel.
also fix a small issue: do intersection when the exit-block has more
than one predecessors.
Signed-off-by: Ruiling Song <ruiling.song@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@intel.com>
Diffstat (limited to 'src')
0 files changed, 0 insertions, 0 deletions