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| author | Guo Yejun <yejun.guo@intel.com> | 2017-06-07 15:44:03 +0800 |
|---|---|---|
| committer | Yang Rong <rong.r.yang@intel.com> | 2017-06-09 19:10:30 +0800 |
| commit | c23b8d7dc68d33b3efb0843a089e99ce39f6817f (patch) | |
| tree | 81228301e253da792924ab07060707a6f0495b47 /backend | |
| parent | 401009fc9d4beec730395aefb3390af339825d91 (diff) | |
| download | beignet-c23b8d7dc68d33b3efb0843a089e99ce39f6817f.tar.gz | |
keep GEN IR as SSA style
Signed-off-by: Guo Yejun <yejun.guo@intel.com>
Reviewed-by: Yang Rong <rong.r.yang@intel.com>
Diffstat (limited to 'backend')
| -rw-r--r-- | backend/src/llvm/llvm_gen_backend.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp index 831666ed..31b8bf27 100644 --- a/backend/src/llvm/llvm_gen_backend.cpp +++ b/backend/src/llvm/llvm_gen_backend.cpp @@ -2984,10 +2984,12 @@ namespace gbe this->newRegister(const_cast<GlobalVariable*>(&v)); ir::Register reg = regTranslator.getScalar(const_cast<GlobalVariable*>(&v), 0); ir::Constant &con = unit.getConstantSet().getConstant(v.getName()); - ctx.LOADI(getType(ctx, v.getType()), reg, ctx.newIntegerImmediate(con.getOffset(), getType(ctx, v.getType()))); if (!legacyMode) { - ctx.ADD(getType(ctx, v.getType()), reg, ir::ocl::constant_addrspace, reg); - } + ir::Register regload = ctx.reg(getFamily(getType(ctx, v.getType()))); + ctx.LOADI(getType(ctx, v.getType()), regload, ctx.newIntegerImmediate(con.getOffset(), getType(ctx, v.getType()))); + ctx.ADD(getType(ctx, v.getType()), reg, ir::ocl::constant_addrspace, regload); + } else + ctx.LOADI(getType(ctx, v.getType()), reg, ctx.newIntegerImmediate(con.getOffset(), getType(ctx, v.getType()))); } } else if(addrSpace == ir::MEM_PRIVATE) { this->newRegister(const_cast<GlobalVariable*>(&v)); |