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author | Zhigang Gong <zhigang.gong@intel.com> | 2014-05-07 09:39:50 +0800 |
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committer | Zhigang Gong <zhigang.gong@intel.com> | 2014-05-13 17:18:18 +0800 |
commit | f6bcc39d0bd8734178dc8f84a51b6ff0e983c6f7 (patch) | |
tree | 97600af8ff7b641a93b9a6b4d7eef0591c6efa7c /backend/src | |
parent | 89b490b5a17cfda2d9816dc1c246ce5bbff12648 (diff) | |
download | beignet-f6bcc39d0bd8734178dc8f84a51b6ff0e983c6f7.tar.gz |
GBE: change scalar byte size to 2 from 1.
Due to the exec size is always larger or equal to 2,
we need to change the scalar byte size to 2 rather than
1. Otherwise, it may generate the following illegal instruction:
(17 ) mov(1) g127.31<1>UB 0x2UW { align1 WE_all };
Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
Reviewed-by: Ruiling Song <ruiling.song@intel.com>
Diffstat (limited to 'backend/src')
-rw-r--r-- | backend/src/backend/gen_reg_allocation.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backend/src/backend/gen_reg_allocation.cpp b/backend/src/backend/gen_reg_allocation.cpp index 5098f34b..718f6183 100644 --- a/backend/src/backend/gen_reg_allocation.cpp +++ b/backend/src/backend/gen_reg_allocation.cpp @@ -108,7 +108,7 @@ namespace gbe // Note that byte vector registers use two bytes per byte (and can be // interleaved) static const size_t familyVectorSize[] = {2,2,2,4,8}; - static const size_t familyScalarSize[] = {2,1,2,4,8}; + static const size_t familyScalarSize[] = {2,2,2,4,8}; using namespace ir; const bool isScalar = ctx.sel->isScalarOrBool(reg); const RegisterData regData = ctx.sel->getRegisterData(reg); |