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| author | Lu Guanqun <guanqun.lu@intel.com> | 2013-04-16 14:38:58 +0800 |
|---|---|---|
| committer | Zhigang Gong <zhigang.gong@linux.intel.com> | 2013-04-17 17:09:47 +0800 |
| commit | 7a5159d5402d95103bcff0e38dde4f555616cebd (patch) | |
| tree | 043783ca193799c90d99777fe98fb3461a9202cc | |
| parent | e62d43a4f5a292dd6fe1bd5a3bb2b04288329633 (diff) | |
| download | beignet-7a5159d5402d95103bcff0e38dde4f555616cebd.tar.gz | |
GenRegInterval should be a struct instead of a class
Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
| -rw-r--r-- | backend/src/backend/gen_reg_allocation.hpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backend/src/backend/gen_reg_allocation.hpp b/backend/src/backend/gen_reg_allocation.hpp index b9859d72..5541304d 100644 --- a/backend/src/backend/gen_reg_allocation.hpp +++ b/backend/src/backend/gen_reg_allocation.hpp @@ -32,7 +32,7 @@ namespace gbe { class Selection; // Pre-register allocation code generation class GenRegister; // Pre-register allocation Gen register - class GenRegInterval; // Liveness interval for each register + struct GenRegInterval; // Liveness interval for each register class GenContext; // Gen specific context /*! Register allocate (i.e. virtual to physical register mapping) */ |