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| author | Yang Rong <rong.r.yang@intel.com> | 2014-11-07 15:02:38 +0800 |
|---|---|---|
| committer | Zhigang Gong <zhigang.gong@intel.com> | 2014-11-07 15:30:50 +0800 |
| commit | 54594b626c31a68956af97f69dc29132dc545f7c (patch) | |
| tree | baf6670839764949d9e72b61c15b22f2f5ba3289 | |
| parent | 56aaa7ed21b653d39216caeafb7559fba20e86a8 (diff) | |
| download | beignet-54594b626c31a68956af97f69dc29132dc545f7c.tar.gz | |
BDW: Set the URB/REST size to 384K/384K when SLM disable.
If application switch between SLM enable and disable, will cause random fail.
The fail occure only when URB/REST partition changed when enable and disable SLM.
Set the same REST size when disable SLM to workaround.
Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Tested-by: Meng Mengmeng <mengmeng.meng@intel.com>
| -rw-r--r-- | src/intel/intel_gpgpu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/intel/intel_gpgpu.c b/src/intel/intel_gpgpu.c index 724ce630..5898906b 100644 --- a/src/intel/intel_gpgpu.c +++ b/src/intel/intel_gpgpu.c @@ -648,10 +648,11 @@ intel_gpgpu_set_L3_gen8(intel_gpgpu_t *gpgpu, uint32_t use_slm) BEGIN_BATCH(gpgpu->batch, 3); OUT_BATCH(gpgpu->batch, CMD_LOAD_REGISTER_IMM | 1); /* length - 2 */ OUT_BATCH(gpgpu->batch, GEN8_L3_CNTL_REG_ADDRESS_OFFSET); + // FIXME, this is a workaround for switch SLM enable and disable random hang if(use_slm) OUT_BATCH(gpgpu->batch, 0x60000121); /* {SLM=192, URB=128, Rest=384} */ else - OUT_BATCH(gpgpu->batch, 0x80000140); /* {SLM=0, URB=256, Rest=512, Sum=768} */ + OUT_BATCH(gpgpu->batch, 0x60000160); /* {SLM=0, URB=384, Rest=384, Sum=768} */ //if(use_slm) // gpgpu->batch->enable_slm = 1; |