Imported from /home/lorry/working-area/delta_VirtualBox/VirtualBox-4.3.10.tar.bz2.HEADVirtualBox-4.3.10master

13 files changed, 218 insertions, 106 deletions

diff --git a/src/VBox/Disassembler/DisasmCore.cpp b/src/VBox/Disassembler/DisasmCore.cpp
index 558835be..5d53f77a 100644
--- a/src/VBox/Disassembler/DisasmCore.cpp
+++ b/src/VBox/Disassembler/DisasmCore.cpp
@@ -292,7 +292,7 @@ DECL_NO_INLINE(static, void) disReadMore(PDISSTATE pDis, uint8_t offInstr, uint8
     else
     {
         Log(("disReadMore failed with rc=%Rrc!!\n", rc));
-        pDis->rc = VERR_DIS_MEM_READ;
+        pDis->rc = rc;
     }
 }
 
@@ -1706,17 +1706,10 @@ static size_t ParseFixedReg(size_t offInstr, PCDISOPCODE pOp, PDISSTATE pDis, PD
             pParam->fUse  |= DISUSE_REG_GEN32;
             pParam->cb     = 4;
         }
-        else
-        if (pDis->uOpMode == DISCPUMODE_64BIT)
+        else if (pDis->uOpMode == DISCPUMODE_64BIT)
         {
             /* Use 64-bit registers. */
             pParam->Base.idxGenReg = pParam->fParam - OP_PARM_REG_GEN32_START;
-            if (    (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG)
-                &&  pParam == &pDis->Param1             /* ugly assumption that it only applies to the first parameter */
-                &&  (pDis->fPrefix & DISPREFIX_REX)
-                &&  (pDis->fRexPrefix & DISPREFIX_REX_FLAGS))
-                pParam->Base.idxGenReg += 8;
-
             pParam->fUse  |= DISUSE_REG_GEN64;
             pParam->cb     = 8;
         }
@@ -1728,42 +1721,50 @@ static size_t ParseFixedReg(size_t offInstr, PCDISOPCODE pOp, PDISSTATE pDis, PD
             pParam->cb     = 2;
             pParam->fParam = pParam->fParam - OP_PARM_REG_GEN32_START + OP_PARM_REG_GEN16_START;
         }
+
+        if (    (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG)
+            &&  pParam == &pDis->Param1             /* ugly assumption that it only applies to the first parameter */
+            &&  (pDis->fPrefix & DISPREFIX_REX)
+            &&  (pDis->fRexPrefix & DISPREFIX_REX_FLAGS_B))
+        {
+            Assert(pDis->uCpuMode == DISCPUMODE_64BIT);
+            pParam->Base.idxGenReg += 8;
+        }
     }
-    else
-    if (pParam->fParam <= OP_PARM_REG_SEG_END)
+    else if (pParam->fParam <= OP_PARM_REG_SEG_END)
     {
         /* Segment ES..GS registers. */
         pParam->Base.idxSegReg = (DISSELREG)(pParam->fParam - OP_PARM_REG_SEG_START);
         pParam->fUse  |= DISUSE_REG_SEG;
         pParam->cb     = 2;
     }
-    else
-    if (pParam->fParam <= OP_PARM_REG_GEN16_END)
+    else if (pParam->fParam <= OP_PARM_REG_GEN16_END)
     {
         /* 16-bit AX..DI registers. */
         pParam->Base.idxGenReg = pParam->fParam - OP_PARM_REG_GEN16_START;
         pParam->fUse  |= DISUSE_REG_GEN16;
         pParam->cb     = 2;
     }
-    else
-    if (pParam->fParam <= OP_PARM_REG_GEN8_END)
+    else if (pParam->fParam <= OP_PARM_REG_GEN8_END)
     {
         /* 8-bit AL..DL, AH..DH registers. */
         pParam->Base.idxGenReg = pParam->fParam - OP_PARM_REG_GEN8_START;
         pParam->fUse  |= DISUSE_REG_GEN8;
         pParam->cb     = 1;
 
-        if (pDis->uOpMode == DISCPUMODE_64BIT)
+        if (   pDis->uCpuMode == DISCPUMODE_64BIT
+            && (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG)
+            &&  pParam == &pDis->Param1             /* ugly assumption that it only applies to the first parameter */
+            &&  (pDis->fPrefix & DISPREFIX_REX))
         {
-            if (    (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG)
-                &&  pParam == &pDis->Param1             /* ugly assumption that it only applies to the first parameter */
-                &&  (pDis->fPrefix & DISPREFIX_REX)
-                &&  (pDis->fRexPrefix & DISPREFIX_REX_FLAGS))
+            if (pDis->fRexPrefix & DISPREFIX_REX_FLAGS_B)
                 pParam->Base.idxGenReg += 8;              /* least significant byte of R8-R15 */
+            else if (   pParam->Base.idxGenReg >= DISGREG_AH
+                     && pParam->Base.idxGenReg <= DISGREG_BH)
+                pParam->Base.idxGenReg += DISGREG_SPL - DISGREG_AH;
         }
     }
-    else
-    if (pParam->fParam <= OP_PARM_REG_FP_END)
+    else if (pParam->fParam <= OP_PARM_REG_FP_END)
     {
         /* FPU registers. */
         pParam->Base.idxFpuReg = pParam->fParam - OP_PARM_REG_FP_START;
@@ -2607,7 +2608,7 @@ DECL_FORCE_INLINE(void) disPrefetchBytes(PDISSTATE pDis)
     else
     {
         Log(("Initial read failed with rc=%Rrc!!\n", rc));
-        pDis->rc = VERR_DIS_MEM_READ;
+        pDis->rc = rc;
     }
 }
 
diff --git a/src/VBox/Disassembler/DisasmFormatYasm.cpp b/src/VBox/Disassembler/DisasmFormatYasm.cpp
index d819434b..4453cbf2 100644
--- a/src/VBox/Disassembler/DisasmFormatYasm.cpp
+++ b/src/VBox/Disassembler/DisasmFormatYasm.cpp
@@ -253,6 +253,7 @@ static const char *disasmFormatYasmIndexReg(PCDISSTATE pDis, PCDISOPPARAM pParam
 DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, uint32_t fFlags,
                                 PFNDISGETSYMBOL pfnGetSymbol, void *pvUser)
 {
+/** @todo monitor and mwait aren't formatted correctly in 64-bit mode. */
     /*
      * Input validation and massaging.
      */
@@ -340,6 +341,36 @@ DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, ui
 #define PUT_NUM_S32(num) PUT_NUM_SIGN(10, "0%08xh", num, int32_t, uint32_t)
 #define PUT_NUM_S64(num) PUT_NUM_SIGN(18, "0%016RX64h", num, int64_t, uint64_t)
 
+#define PUT_SYMBOL_TWO(a_rcSym, a_szStart, a_chEnd) \
+        do { \
+            if (RT_SUCCESS(a_rcSym)) \
+            { \
+                PUT_SZ(a_szStart); \
+                PUT_PSZ(szSymbol); \
+                if (off != 0) \
+                { \
+                    if ((int8_t)off == off) \
+                        PUT_NUM_S8(off); \
+                    else if ((int16_t)off == off) \
+                        PUT_NUM_S16(off); \
+                    else if ((int32_t)off == off) \
+                        PUT_NUM_S32(off); \
+                    else \
+                        PUT_NUM_S64(off); \
+                } \
+                PUT_C(a_chEnd); \
+            } \
+        } while (0)
+
+#define PUT_SYMBOL(a_uSeg, a_uAddr, a_szStart, a_chEnd) \
+        do { \
+            if (pfnGetSymbol) \
+            { \
+                int rcSym = pfnGetSymbol(pDis, a_uSeg, a_uAddr, szSymbol, sizeof(szSymbol), &off, pvUser); \
+                PUT_SYMBOL_TWO(rcSym, a_szStart, a_chEnd); \
+            } \
+        } while (0)
+
 
     /*
      * The address?
@@ -735,9 +766,9 @@ DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, ui
                         else
                             Assert(!(fUse & DISUSE_SCALE));
 
+                        int64_t off2 = 0;
                         if (fUse & (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32))
                         {
-                            int64_t off2;
                             if (fUse & DISUSE_DISPLACEMENT8)
                                 off2 = pParam->uDisp.i8;
                             else if (fUse & DISUSE_DISPLACEMENT16)
@@ -774,7 +805,19 @@ DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, ui
                         }
 
                         if (DISUSE_IS_EFFECTIVE_ADDR(fUse))
+                        {
+                            if (pfnGetSymbol && !fBase && !(fUse & DISUSE_INDEX) && off2 != 0)
+                                PUT_SYMBOL((pDis->fPrefix & DISPREFIX_SEG)
+                                           ? DIS_FMT_SEL_FROM_REG(pDis->idxSegPrefix)
+                                           : DIS_FMT_SEL_FROM_REG(DISSELREG_DS),
+                                           pDis->uAddrMode == DISCPUMODE_64BIT
+                                           ? (uint64_t)off2
+                                           : pDis->uAddrMode == DISCPUMODE_32BIT
+                                           ? (uint32_t)off2
+                                           : (uint16_t)off2,
+                                           " (=", ')');
                             PUT_C(']');
+                        }
                         break;
                     }
 
@@ -839,6 +882,8 @@ DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, ui
                                         PUT_SZ_STRICT("strict dword ", "dword ");
                                 }
                                 PUT_NUM_32(pParam->uValue);
+                                if (pDis->uCpuMode == DISCPUMODE_32BIT)
+                                    PUT_SYMBOL(DIS_FMT_SEL_FROM_REG(DISSELREG_CS), pParam->uValue, " (=", ')');
                                 break;
 
                             case DISUSE_IMMEDIATE32_SX8:
@@ -907,7 +952,7 @@ DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, ui
                             if (fPrefix)
                                 PUT_SZ("near ");
                             offDisplacement = (int32_t)pParam->uValue;
-                            Assert(pParam->fUse & (DISUSE_IMMEDIATE32_REL|DISUSE_IMMEDIATE64_REL));
+                            Assert(pParam->fUse & (DISUSE_IMMEDIATE32_REL | DISUSE_IMMEDIATE64_REL));
                             Assert(*pszFmt == 'v'); pszFmt++;
 
                             if (fFlags & DIS_FMT_FLAGS_RELATIVE_BRANCH)
@@ -924,30 +969,13 @@ DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, ui
                         else
                             PUT_NUM_64(uTrgAddr);
 
-                        if (pfnGetSymbol)
-                        {
-                            int rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), uTrgAddr, szSymbol, sizeof(szSymbol), &off, pvUser);
-                            if (RT_SUCCESS(rc))
-                            {
-                                PUT_SZ(" [");
-                                PUT_PSZ(szSymbol);
-                                if (off != 0)
-                                {
-                                    if ((int8_t)off == off)
-                                        PUT_NUM_S8(off);
-                                    else if ((int16_t)off == off)
-                                        PUT_NUM_S16(off);
-                                    else if ((int32_t)off == off)
-                                        PUT_NUM_S32(off);
-                                    else
-                                        PUT_NUM_S64(off);
-                                }
-                                PUT_C(']');
-                            }
-                        }
-
                         if (fFlags & DIS_FMT_FLAGS_RELATIVE_BRANCH)
+                        {
+                            PUT_SYMBOL(DIS_FMT_SEL_FROM_REG(DISSELREG_CS), uTrgAddr, " = ", ' ');
                             PUT_C(')');
+                        }
+                        else
+                            PUT_SYMBOL(DIS_FMT_SEL_FROM_REG(DISSELREG_CS), uTrgAddr, " (", ')');
                         break;
                     }
 
@@ -994,23 +1022,7 @@ DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, ui
                                 break;
                         }
 
-                        if (RT_SUCCESS(rc))
-                        {
-                            PUT_SZ(" [");
-                            PUT_PSZ(szSymbol);
-                            if (off != 0)
-                            {
-                                if ((int8_t)off == off)
-                                    PUT_NUM_S8(off);
-                                else if ((int16_t)off == off)
-                                    PUT_NUM_S16(off);
-                                else if ((int32_t)off == off)
-                                    PUT_NUM_S32(off);
-                                else
-                                    PUT_NUM_S64(off);
-                            }
-                            PUT_C(']');
-                        }
+                        PUT_SYMBOL_TWO(rc, " [", ']');
                         break;
                     }
 
@@ -1059,23 +1071,7 @@ DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, ui
                         }
                         PUT_C(']');
 
-                        if (RT_SUCCESS(rc))
-                        {
-                            PUT_SZ(" (");
-                            PUT_PSZ(szSymbol);
-                            if (off != 0)
-                            {
-                                if ((int8_t)off == off)
-                                    PUT_NUM_S8(off);
-                                else if ((int16_t)off == off)
-                                    PUT_NUM_S16(off);
-                                else if ((int32_t)off == off)
-                                    PUT_NUM_S32(off);
-                                else
-                                    PUT_NUM_S64(off);
-                            }
-                            PUT_C(')');
-                        }
+                        PUT_SYMBOL_TWO(rc, " (", ')');
                         break;
                     }
 
@@ -1098,9 +1094,10 @@ DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, ui
                         break;
                     }
 
-                    case 'e': /* Register based on operand size (e.g. %eAX) (ParseFixedReg). */
+                    case 'e': /* Register based on operand size (e.g. %eAX, %eAH) (ParseFixedReg). */
                     {
-                        Assert(RT_C_IS_ALPHA(pszFmt[0]) && RT_C_IS_ALPHA(pszFmt[1]) && !RT_C_IS_ALPHA(pszFmt[2])); pszFmt += 2;
+                        Assert(RT_C_IS_ALPHA(pszFmt[0]) && RT_C_IS_ALPHA(pszFmt[1]) && !RT_C_IS_ALPHA(pszFmt[2]));
+                        pszFmt += 2;
                         size_t cchReg;
                         const char *pszReg = disasmFormatYasmBaseReg(pDis, pParam, &cchReg);
                         PUT_STR(pszReg, cchReg);
diff --git a/src/VBox/Disassembler/DisasmTables.cpp b/src/VBox/Disassembler/DisasmTables.cpp
index d63b819e..d3163434 100644
--- a/src/VBox/Disassembler/DisasmTables.cpp
+++ b/src/VBox/Disassembler/DisasmTables.cpp
@@ -636,7 +636,7 @@ const DISOPCODE g_aTwoByteMapX86[256] =
     OP("paddq %Pq,%Qq",      IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PADDQ,   OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("pmullw %Pq,%Qq",     IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PMULLW,  OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     INVALID_OPCODE, /** @todo 0x0f 0xd7 pmovmskb/pmovmskb */
-    OP("pmovskb %Gd,%Pq",    IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PMOVSKB, OP_PARM_Gd,         OP_PARM_Pq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
+    OP("pmovmskb %Gd,%Pq",   IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PMOVMSKB,OP_PARM_Gd,         OP_PARM_Pq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("psubusb %Pq,%Qq",    IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PSUBUSB, OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("psubusw %Pq,%Qq",    IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PSUBUSW, OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("pminub %Pq,%Qq",     IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PMINUB,  OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
@@ -838,7 +838,7 @@ const DISOPCODE g_aTwoByteMapX86_PF66[256] =
     OP("paddq %Vdq,%Wdq",    IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PADDQ,   OP_PARM_Vdq,        OP_PARM_Wdq,    OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("pmullw %Vdq,%Wdq",   IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PMULLW,  OP_PARM_Vdq,        OP_PARM_Wdq,    OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("movq %Wq,%Vq",       IDX_ParseModRM,     IDX_UseModRM,   0,          OP_MOVQ,    OP_PARM_Wq,         OP_PARM_Vq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
-    OP("pmovskb %Gd,%Vdq",   IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PMOVSKB, OP_PARM_Gd,         OP_PARM_Vdq,    OP_PARM_NONE,   DISOPTYPE_HARMLESS),
+    OP("pmovmskb %Gd,%Vdq",  IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PMOVMSKB,OP_PARM_Gd,         OP_PARM_Vdq,    OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("psubusb %Vdq,%Wdq",  IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PSUBUSB, OP_PARM_Vdq,        OP_PARM_Wdq,    OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("psubusw %Vdq,%Wdq",  IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PSUBUSW, OP_PARM_Vdq,        OP_PARM_Wdq,    OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("pminub %Vdq,%Wdq",   IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PMINUB,  OP_PARM_Vdq,        OP_PARM_Wdq,    OP_PARM_NONE,   DISOPTYPE_HARMLESS),
@@ -1612,7 +1612,7 @@ const DISOPCODE g_aTwoByteMapX86_3DNow[256] =
     OP("pfmul %Pq,%Qq",      IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PFMUL,   OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     INVALID_OPCODE_MOD_RM(0xb5),
     OP("pfrcpit2 %Pq,%Qq",   IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PFRCPIT2,OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
-    OP("pmulhrwa %Pq,%Qq",   IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PFMULHRW,OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
+    OP("pmulhrw %Pq,%Qq",    IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PFMULHRW,OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     INVALID_OPCODE_MOD_RM(0xb8),
     INVALID_OPCODE_MOD_RM(0xb9),
     INVALID_OPCODE_MOD_RM(0xba),
@@ -2698,6 +2698,8 @@ const DISOPCODE g_aMapX86_Group15_mod11_rm000[8] =
     INVALID_OPCODE_MOD_RM(0x),
     INVALID_OPCODE_MOD_RM(0x),
     INVALID_OPCODE_MOD_RM(0x),
+    /** @todo mfence + lfence + sfence instructions do not require rm=0,
+     *        they work for any RM value. See bs2-cpu-instr-1.asm for details. */
     OP("lfence",             IDX_ParseModFence,  0,          0,          OP_LFENCE,  OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("mfence",             IDX_ParseModFence,  0,          0,          OP_MFENCE,  OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   DISOPTYPE_HARMLESS),
     OP("sfence",             IDX_ParseModFence,  0,          0,          OP_SFENCE,  OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   DISOPTYPE_HARMLESS),
diff --git a/src/VBox/Disassembler/DisasmTablesX64.cpp b/src/VBox/Disassembler/DisasmTablesX64.cpp
index e49e7479..11a02a26 100644
--- a/src/VBox/Disassembler/DisasmTablesX64.cpp
+++ b/src/VBox/Disassembler/DisasmTablesX64.cpp
@@ -262,14 +262,14 @@ const DISOPCODE g_aOneByteMapX64[256] =
 
 
     /* B */
-    OP("mov AL,%Ib",         IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_AL,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
-    OP("mov CL,%Ib",         IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_CL,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
-    OP("mov DL,%Ib",         IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_DL,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
-    OP("mov BL,%Ib",         IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_BL,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
-    OP("mov AH,%Ib",         IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_AH,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
-    OP("mov CH,%Ib",         IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_CH,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
-    OP("mov DH,%Ib",         IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_DH,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
-    OP("mov BH,%Ib",         IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_BH,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
+    OP("mov %eAL,%Ib",       IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_AL,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
+    OP("mov %eCL,%Ib",       IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_CL,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
+    OP("mov %eDL,%Ib",       IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_DL,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
+    OP("mov %eBL,%Ib",       IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_BL,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
+    OP("mov %eAH,%Ib",       IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_AH,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
+    OP("mov %eCH,%Ib",       IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_CH,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
+    OP("mov %eDH,%Ib",       IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_DH,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
+    OP("mov %eBH,%Ib",       IDX_ParseFixedReg,  IDX_ParseImmByte,  0,          OP_MOV,     OP_PARM_REG_BH,     OP_PARM_Ib,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
     OP("mov %eAX,%Iv",       IDX_ParseFixedReg,  IDX_ParseImmV,     0,          OP_MOV,     OP_PARM_REG_EAX,    OP_PARM_Iv,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
     OP("mov %eCX,%Iv",       IDX_ParseFixedReg,  IDX_ParseImmV,     0,          OP_MOV,     OP_PARM_REG_ECX,    OP_PARM_Iv,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
     OP("mov %eDX,%Iv",       IDX_ParseFixedReg,  IDX_ParseImmV,     0,          OP_MOV,     OP_PARM_REG_EDX,    OP_PARM_Iv,     OP_PARM_NONE,   DISOPTYPE_HARMLESS | DISOPTYPE_REXB_EXTENDS_OPREG),
diff --git a/src/VBox/Disassembler/testcase/Makefile.kmk b/src/VBox/Disassembler/testcase/Makefile.kmk
index 56da195f..d6f451f1 100644
--- a/src/VBox/Disassembler/testcase/Makefile.kmk
+++ b/src/VBox/Disassembler/testcase/Makefile.kmk
@@ -44,6 +44,7 @@ tstDisasm-2_LIBS        = \
 VBOX_DISAS_TESTS_BUILD = \
 	tstAsmFnstsw-1.asm \
 	tstAsmLock-1.asm \
+	tstAsmMovFixedReg-1.asm \
 	tstAsmMovSeg-1.asm \
 	tstAsmMovzx-1.asm \
 	tstAsmPop-1.asm \
diff --git a/src/VBox/Disassembler/testcase/tstAsm.mac b/src/VBox/Disassembler/testcase/tstAsm.mac
index 0854d861..0f9b292f 100644
--- a/src/VBox/Disassembler/testcase/tstAsm.mac
+++ b/src/VBox/Disassembler/testcase/tstAsm.mac
@@ -4,7 +4,7 @@
 ;
 
 ;
-; Copyright (C) 2008 Oracle Corporation
+; Copyright (C) 2008-2013 Oracle Corporation
 ;
 ; This file is part of VirtualBox Open Source Edition (OSE), as
 ; available from http://www.virtualbox.org. This file is free software;
@@ -16,7 +16,7 @@
 ;
 
 %if TEST_BITS == 64
- %define xS  8
+ %define xCB 8
  %define xSP rsp
  %define xBP rbp
  %define xAX rax
@@ -27,7 +27,7 @@
  %define xSI rsi
 %endif
 %if TEST_BITS == 32
- %define xS  4
+ %define xCB 4
  %define xSP esp
  %define xBP ebp
  %define xAX eax
@@ -38,7 +38,7 @@
  %define xSI esi
 %endif
 %if TEST_BITS == 16
- %define xS  1
+ %define xCB 2
  %define xSP sp
  %define xBP bp
  %define xAX ax
@@ -48,7 +48,11 @@
  %define xDI di
  %define xSI si
 %endif
-%ifndef xS
+%ifndef xCB
  %error "TEST_BITS is missing or wrong."
 %endif
 
+%if __YASM_VERSION_ID__ >= 001020001h ; v1.2.0.1 and greater, make sure to exclude v1.2.0.0.
+ %define pmulhrwa pmulhrw
+%endif
+
diff --git a/src/VBox/Disassembler/testcase/tstAsmLock-1.asm b/src/VBox/Disassembler/testcase/tstAsmLock-1.asm
index 53359201..218477cb 100644
--- a/src/VBox/Disassembler/testcase/tstAsmLock-1.asm
+++ b/src/VBox/Disassembler/testcase/tstAsmLock-1.asm
@@ -8,7 +8,7 @@
 ;
 
 ;
-; Copyright (C) 2008 Oracle Corporation
+; Copyright (C) 2008-2010 Oracle Corporation
 ;
 ; This file is part of VirtualBox Open Source Edition (OSE), as
 ; available from http://www.virtualbox.org. This file is free software;
diff --git a/src/VBox/Disassembler/testcase/tstAsmLock-2.asm b/src/VBox/Disassembler/testcase/tstAsmLock-2.asm
index f692b7e1..10ea6567 100644
--- a/src/VBox/Disassembler/testcase/tstAsmLock-2.asm
+++ b/src/VBox/Disassembler/testcase/tstAsmLock-2.asm
@@ -11,7 +11,7 @@
 ;
 
 ;
-; Copyright (C) 2008 Oracle Corporation
+; Copyright (C) 2008-2010 Oracle Corporation
 ;
 ; This file is part of VirtualBox Open Source Edition (OSE), as
 ; available from http://www.virtualbox.org. This file is free software;
diff --git a/src/VBox/Disassembler/testcase/tstAsmLock-3.asm b/src/VBox/Disassembler/testcase/tstAsmLock-3.asm
index ece8485a..f7fa171c 100644
--- a/src/VBox/Disassembler/testcase/tstAsmLock-3.asm
+++ b/src/VBox/Disassembler/testcase/tstAsmLock-3.asm
@@ -7,7 +7,7 @@
 ;
 
 ;
-; Copyright (C) 2008 Oracle Corporation
+; Copyright (C) 2008-2010 Oracle Corporation
 ;
 ; This file is part of VirtualBox Open Source Edition (OSE), as
 ; available from http://www.virtualbox.org. This file is free software;
diff --git a/src/VBox/Disassembler/testcase/tstAsmMovFixedReg-1.asm b/src/VBox/Disassembler/testcase/tstAsmMovFixedReg-1.asm
new file mode 100644
index 00000000..70c05aee
--- /dev/null
+++ b/src/VBox/Disassembler/testcase/tstAsmMovFixedReg-1.asm
@@ -0,0 +1,103 @@
+; $Id: tstAsmMovFixedReg-1.asm $
+;; @file
+; Disassembly testcase - Valid mov immediate to fixed registers.
+;
+; This is a build test, that means it will be assembled, disassembled,
+; then the disassembly output will be assembled and the new binary will
+; compared with the original.
+;
+
+;
+; Copyright (C) 2013 Oracle Corporation
+;
+; This file is part of VirtualBox Open Source Edition (OSE), as
+; available from http://www.virtualbox.org. This file is free software;
+; you can redistribute it and/or modify it under the terms of the GNU
+; General Public License (GPL) as published by the Free Software
+; Foundation, in version 2 as it comes in the "COPYING" file of the
+; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
+; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
+;
+
+    BITS TEST_BITS
+
+    mov al, 01h
+    mov cl, 02h
+    mov dl, 03h
+    mov bl, 04h
+    mov ah, 05h
+    mov ch, 06h
+    mov dh, 07h
+    mov bh, 08h
+%if TEST_BITS == 64
+    mov spl, 09h
+    mov bpl, 0ah
+    mov sil, 0bh
+    mov dil, 0ch
+    mov r8b, 0dh
+    mov r9b, 0eh
+    mov r10b, 0fh
+    mov r11b, 010h
+    mov r12b, 011h
+    mov r13b, 012h
+    mov r14b, 013h
+    mov r15b, 014h
+%endif
+
+    mov ax, 0f701h
+    mov cx, 0f702h
+    mov dx, 0f703h
+    mov bx, 0f704h
+    mov sp, 0f705h
+    mov bp, 0f706h
+    mov si, 0f707h
+    mov di, 0f708h
+%if TEST_BITS == 64
+    mov r8w,  0f709h
+    mov r9w,  0f70ah
+    mov r10w, 0f70bh
+    mov r11w, 0f70ch
+    mov r12w, 0f70dh
+    mov r13w, 0f70eh
+    mov r14w, 0f70fh
+    mov r15w, 0f710h
+%endif
+
+    mov eax, 0beeff701h
+    mov ecx, 0beeff702h
+    mov edx, 0beeff703h
+    mov ebx, 0beeff704h
+    mov esp, 0beeff705h
+    mov ebp, 0beeff706h
+    mov esi, 0beeff707h
+    mov edi, 0beeff708h
+%if TEST_BITS == 64
+    mov r8d,  0beeff709h
+    mov r9d,  0beeff70ah
+    mov r10d, 0beeff70bh
+    mov r11d, 0beeff70ch
+    mov r12d, 0beeff70dh
+    mov r13d, 0beeff70eh
+    mov r14d, 0beeff70fh
+    mov r15d, 0beeff710h
+%endif
+
+%if TEST_BITS == 64
+    mov rax, 0feedbabef00df701h
+    mov rcx, 0feedbabef00df702h
+    mov rdx, 0feedbabef00df703h
+    mov rbx, 0feedbabef00df704h
+    mov rsp, 0feedbabef00df705h
+    mov rbp, 0feedbabef00df706h
+    mov rsi, 0feedbabef00df707h
+    mov rdi, 0feedbabef00df708h
+    mov r8,  0feedbabef00df709h
+    mov r9,  0feedbabef00df70ah
+    mov r10, 0feedbabef00df70bh
+    mov r11, 0feedbabef00df70ch
+    mov r12, 0feedbabef00df70dh
+    mov r13, 0feedbabef00df70eh
+    mov r14, 0feedbabef00df70fh
+    mov r15, 0feedbabef00df710h
+%endif
+
diff --git a/src/VBox/Disassembler/testcase/tstAsmRegs-1.asm b/src/VBox/Disassembler/testcase/tstAsmRegs-1.asm
index daba0fad..1cc28ae9 100644
--- a/src/VBox/Disassembler/testcase/tstAsmRegs-1.asm
+++ b/src/VBox/Disassembler/testcase/tstAsmRegs-1.asm
@@ -8,7 +8,7 @@
 ;
 
 ;
-; Copyright (C) 2008 Oracle Corporation
+; Copyright (C) 2008-2010 Oracle Corporation
 ;
 ; This file is part of VirtualBox Open Source Edition (OSE), as
 ; available from http://www.virtualbox.org. This file is free software;
diff --git a/src/VBox/Disassembler/testcase/tstDisasm-1A.asm b/src/VBox/Disassembler/testcase/tstDisasm-1A.asm
index 89829c85..c4ac578e 100644
--- a/src/VBox/Disassembler/testcase/tstDisasm-1A.asm
+++ b/src/VBox/Disassembler/testcase/tstDisasm-1A.asm
@@ -4,7 +4,7 @@
 ;
 
 ;
-; Copyright (C) 2006-2010 Oracle Corporation
+; Copyright (C) 2006-2012 Oracle Corporation
 ;
 ; This file is part of VirtualBox Open Source Edition (OSE), as
 ; available from http://www.virtualbox.org. This file is free software;
@@ -26,6 +26,10 @@
 
 BITS 32
 
+%if __YASM_VERSION_ID__ >= 001020001h ; v1.2.0.1 and greater, make sure to exclude v1.2.0.0.
+ %define pmulhrwa pmulhrw
+%endif
+
 
 BEGINCODE
 
diff --git a/src/VBox/Disassembler/testcase/tstDisasm-2.cpp b/src/VBox/Disassembler/testcase/tstDisasm-2.cpp
index d2c50d60..3d428a34 100644
--- a/src/VBox/Disassembler/testcase/tstDisasm-2.cpp
+++ b/src/VBox/Disassembler/testcase/tstDisasm-2.cpp
@@ -4,7 +4,7 @@
  */
 
 /*
- * Copyright (C) 2008 Oracle Corporation
+ * Copyright (C) 2008-2012 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
  * available from http://www.virtualbox.org. This file is free software;
@@ -570,7 +570,7 @@ int main(int argc, char **argv)
                 break;
 
             case 'V':
-                RTPrintf("$Revision: $\n");
+                RTPrintf("$Revision: 89645 $\n");
                 return 0;
 
             default: