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author | Edward Cragg <edward.cragg@codethink.co.uk> | 2015-05-22 13:28:05 +0100 |
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committer | Edward Cragg <edward.cragg@codethink.co.uk> | 2015-09-24 09:28:10 +0100 |
commit | c4ba753ce0832526ff3eff7ed6b989724bda4205 (patch) | |
tree | d51c909cad56b886e1f585153a4482152c3e1988 /altera-socfpga/hardware-handoff/hps_hps_0/sdram_io.h | |
parent | 1a1dcc2a333ff1eb7eb50a8cf6b790ffa4d6e3d7 (diff) | |
download | bsp-support-c4ba753ce0832526ff3eff7ed6b989724bda4205.tar.gz |
SoCFPGA: Add Quartus generated hardware handoff files
These files are automatically generated by the Quartus software suite
and added here unmodified. On system build they are combined with
U-Boot source to build the SPL preloader for SoCFPGA SoCs
Change-Id: I36304957adae1ded94171af41f272743163e8869
Diffstat (limited to 'altera-socfpga/hardware-handoff/hps_hps_0/sdram_io.h')
-rw-r--r-- | altera-socfpga/hardware-handoff/hps_hps_0/sdram_io.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/altera-socfpga/hardware-handoff/hps_hps_0/sdram_io.h b/altera-socfpga/hardware-handoff/hps_hps_0/sdram_io.h new file mode 100644 index 0000000..47deed7 --- /dev/null +++ b/altera-socfpga/hardware-handoff/hps_hps_0/sdram_io.h @@ -0,0 +1,54 @@ +/* + * Copyright Altera Corporation (C) 2012-2014. All rights reserved + * + * SPDX-License-Identifier: BSD-3-Clause + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Altera Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ALTERA CORPORATION BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sdram.h> + +#define MGR_SELECT_MASK 0xf8000 + +#define APB_BASE_SCC_MGR SDR_PHYGRP_SCCGRP_ADDRESS +#define APB_BASE_PHY_MGR SDR_PHYGRP_PHYMGRGRP_ADDRESS +#define APB_BASE_RW_MGR SDR_PHYGRP_RWMGRGRP_ADDRESS +#define APB_BASE_DATA_MGR SDR_PHYGRP_DATAMGRGRP_ADDRESS +#define APB_BASE_REG_FILE SDR_PHYGRP_REGFILEGRP_ADDRESS +#define APB_BASE_MMR SDR_CTRLGRP_ADDRESS + +#define __AVL_TO_APB(ADDR) \ + ((((ADDR) & MGR_SELECT_MASK) == (BASE_PHY_MGR)) ? (APB_BASE_PHY_MGR) | (((ADDR) >> (14-6)) & (0x1<<6)) | ((ADDR) & 0x3f) : \ + (((ADDR) & MGR_SELECT_MASK) == (BASE_RW_MGR)) ? (APB_BASE_RW_MGR) | ((ADDR) & 0x1fff) : \ + (((ADDR) & MGR_SELECT_MASK) == (BASE_DATA_MGR)) ? (APB_BASE_DATA_MGR) | ((ADDR) & 0x7ff) : \ + (((ADDR) & MGR_SELECT_MASK) == (BASE_SCC_MGR)) ? (APB_BASE_SCC_MGR) | ((ADDR) & 0xfff) : \ + (((ADDR) & MGR_SELECT_MASK) == (BASE_REG_FILE)) ? (APB_BASE_REG_FILE) | ((ADDR) & 0x7ff) : \ + (((ADDR) & MGR_SELECT_MASK) == (BASE_MMR)) ? (APB_BASE_MMR) | ((ADDR) & 0xfff) : \ + -1) + +#define IOWR_32DIRECT(BASE, OFFSET, DATA) \ + write_register(HPS_SDR_BASE, __AVL_TO_APB((alt_u32)((BASE) + (OFFSET))), DATA) + +#define IORD_32DIRECT(BASE, OFFSET) \ + read_register(HPS_SDR_BASE, __AVL_TO_APB((alt_u32)((BASE) + (OFFSET)))) + |