| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add Intel ADX, RDSEED, and SMAP instructions. | Peter Johnson | 2014-04-05 | 1 | -12/+34 |
| * | Add Intel SHA instructions. | Peter Johnson | 2014-02-14 | 1 | -1/+50 |
| * | Fix vpbroadcastq. | Peter Johnson | 2013-06-21 | 1 | -1/+1 |
| * | Fix vphaddudq opcode; should be DB rather than D8. | Peter Johnson | 2012-08-18 | 1 | -1/+1 |
| * | Fix minor typo in the definition of pmulhrw | Vivek Thampi | 2012-05-28 | 1 | -1/+1 |
| * | Added support for HSW TSX instructions: | sergey semenko | 2012-03-02 | 1 | -2/+41 |
| * | Add AMD TBM instructions. | Jason Garrett-Glaser | 2012-03-02 | 1 | -3/+52 |
| * | Remove $Id$ and RCSID() usage. | Peter Johnson | 2011-08-19 | 1 | -7/+2 |
| * | Fix VGATHER/VPGATHER memory sizes. | Peter Johnson | 2011-07-04 | 1 | -12/+12 |
| * | Add AVX2 VGATHER* and VPGATHER* instructions. | Peter Johnson | 2011-07-03 | 1 | -0/+93 |
| * | Add most Intel AVX2 instructions. | Peter Johnson | 2011-07-03 | 1 | -118/+561 |
| * | pmovmskb/vpmovmskb: default operand size is 64 bits. | Peter Johnson | 2011-07-03 | 1 | -0/+2 |
| * | Add Intel BMI1, BMI2, INVPCID, LZCNT instructions. | Peter Johnson | 2011-07-03 | 1 | -3/+113 |
| * | x86/gas: Fix no-suffix push and pop. | Peter Johnson | 2011-07-02 | 1 | -0/+25 |
| * | Allow 64-bit LFS/LGS/LSS. | Peter Johnson | 2011-06-27 | 1 | -1/+1 |
| * | Fix lar and lsl second operand size. | Peter Johnson | 2011-05-29 | 1 | -2/+18 |
| * | gas: Fix movsw/movzw memory operand encodings. | Peter Johnson | 2010-08-14 | 1 | -1/+3 |
| * | Rename RDRND feature bit to RDRAND. | Peter Johnson | 2010-08-01 | 1 | -5/+5 |
| * | gen_x86_insn.py: Add SMX to list of ordered_cpu_features. | Peter Johnson | 2010-07-23 | 1 | -1/+1 |
| * | Fix #211: Add INVEPT, INVVPID, and GETSEC instructions. | Peter Johnson | 2010-07-23 | 1 | -1/+28 |
| * | Add support for XSAVEOPT instruction. | Peter Johnson | 2010-07-03 | 1 | -1/+13 |
| * | Add Intel post-32nm processor instructions (section 7 of AVX spec). | Peter Johnson | 2010-07-03 | 1 | -1/+118 |
| * | Remove AMD CVT16 instructions. | Peter Johnson | 2010-07-02 | 1 | -51/+1 |
| * | Fix #207: Don't emit unnecessary REX.W for pinsrw. | Peter Johnson | 2010-06-16 | 1 | -0/+3 |
| * | Fix additional cases of duplicate 66h prefix generation for AVX instructions. | Peter Johnson | 2010-01-02 | 1 | -14/+17 |
| * | Avoid generating duplicate 66h prefix on PINSRB in 16-bit mode. | Peter Johnson | 2009-12-29 | 1 | -2/+0 |
| * | Fix incorrect vaesimc encoding (need to set VEX.vvvv=1111). | Peter Johnson | 2009-12-28 | 1 | -1/+1 |
| * | Unbreak gen_x86_insn.py on Python 2.4. | Peter Johnson | 2009-12-06 | 1 | -1/+4 |
| * | Update gen_x86_insn.py to work in both Python 2 and 3 | Brian Gladman | 2009-12-05 | 1 | -25/+33 |
| * | Fix #198: Previous commit accidentally broke a great many instructions. | Peter Johnson | 2009-12-01 | 1 | -16/+9 |
| * | Fix a bunch of GAS x86 instruction issues. | Peter Johnson | 2009-11-30 | 1 | -29/+200 |
| * | Fix #191: Incorrect argument order generated for AMD FMA4 opcodes. | Peter Johnson | 2009-11-08 | 1 | -11/+11 |
| * | Fix #190: Incorrect opcode generated for vphaddudq. | Peter Johnson | 2009-11-08 | 1 | -1/+1 |
| * | Add support for AMD XOP, FMA4, and CVT16 instructions (replacing SSE5). | Peter Johnson | 2009-05-10 | 1 | -366/+387 |
| * | Default memory size to "s" for no-suffix FP conversions in GAS syntax. | Peter Johnson | 2009-03-29 | 1 | -0/+16 |
| * | Add support for VEX-encoded pclmul*qdq instructions per the latest AVX spec. | Peter Johnson | 2009-02-02 | 1 | -6/+35 |
| * | Update AVX and FMA to latest Intel specification (Dec 2008). | Peter Johnson | 2009-01-14 | 1 | -175/+73 |
| * | gen_x86_insn.py: Handle invalid rcstag. | Peter Johnson | 2008-12-05 | 1 | -2/+6 |
| * | Add movbe instruction and CPU feature. | Peter Johnson | 2008-10-16 | 1 | -0/+18 |
| * | Add core TASM syntax support. | Peter Johnson | 2008-10-07 | 1 | -4/+4 |
| * | Optimize non-strict push with 66 override to byte size if possible in NASM | Peter Johnson | 2008-10-05 | 1 | -16/+14 |
| * | VPBLENDVB doesn't have a 256-bit form. | Peter Johnson | 2008-10-02 | 1 | -1/+14 |
| * | gen_x86_insn.py: Warn if any groups are unused (due to a typo, for example). | Peter Johnson | 2008-10-02 | 1 | -0/+7 |
| * | Mark gen_x86_insn.py outputs as generated, to discourage hand-editing. | Peter Johnson | 2008-09-10 | 1 | -1/+7 |
| * | Add support for newly specified AVX/AES instructions: | Peter Johnson | 2008-08-13 | 1 | -2/+38 |
| * | Fix #137: LAR and LSL should only need 286+Prot CPU flags, not 386. | Peter Johnson | 2008-04-29 | 1 | -3/+2 |
| * | Fix two instances of VERMIL2PS/PD incorrectly setting VEX.L=1. | Peter Johnson | 2008-04-25 | 1 | -2/+2 |
| * | Fix register fields on FMA instructions. | Peter Johnson | 2008-04-22 | 1 | -11/+11 |
| * | Fix a number of AVX instructions where VEX.vvvv was incorrectly being set | Peter Johnson | 2008-04-21 | 1 | -12/+68 |
| * | Fix AVX instruction misnaming of new vptest variants: | Peter Johnson | 2008-04-21 | 1 | -2/+2 |
