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| author | Peter Johnson <peter@tortall.net> | 2010-07-03 19:48:00 +0000 |
|---|---|---|
| committer | Peter Johnson <peter@tortall.net> | 2010-07-03 19:48:00 +0000 |
| commit | 548f983552526bfca83165e836cd3ed19a7a706c (patch) | |
| tree | 802151c5c094c92e6068087717224dcbecb5ddca | |
| parent | 81c903cd707b9dd0e58b361ac3f9b50cd3fed514 (diff) | |
| download | yasm-548f983552526bfca83165e836cd3ed19a7a706c.tar.gz | |
Add support for XSAVEOPT instruction.
Reported by: Mark Charney <mark.charney@intel.com>
svn path=/trunk/yasm/; revision=2337
| -rwxr-xr-x | modules/arch/x86/gen_x86_insn.py | 14 | ||||
| -rw-r--r-- | modules/arch/x86/tests/xsave.asm | 4 | ||||
| -rw-r--r-- | modules/arch/x86/tests/xsave.hex | 14 | ||||
| -rw-r--r-- | modules/arch/x86/x86arch.h | 1 | ||||
| -rw-r--r-- | modules/arch/x86/x86cpu.gperf | 2 |
5 files changed, 34 insertions, 1 deletions
diff --git a/modules/arch/x86/gen_x86_insn.py b/modules/arch/x86/gen_x86_insn.py index a260e503..83f7111e 100755 --- a/modules/arch/x86/gen_x86_insn.py +++ b/modules/arch/x86/gen_x86_insn.py @@ -7241,7 +7241,7 @@ add_insn("vfnmsubsd", "fma_128_m64", modifiers=[0x7F]) add_insn("vfnmsubss", "fma_128_m32", modifiers=[0x7E]) ##################################################################### -# Intel XSAVE instructions +# Intel XSAVE and XSAVEOPT instructions ##################################################################### add_insn("xgetbv", "threebyte", modifiers=[0x0F, 0x01, 0xD0], cpu=["XSAVE", "386"]) @@ -7252,6 +7252,18 @@ add_insn("xsave", "twobytemem", modifiers=[4, 0x0F, 0xAE], add_insn("xrstor", "twobytemem", modifiers=[5, 0x0F, 0xAE], cpu=["XSAVE", "386"]) +add_insn("xsaveopt", "twobytemem", modifiers=[6, 0x0F, 0xAE], + cpu=["XSAVEOPT"]) + +add_group("xsaveopt64", + modifiers=["SpAdd", "Op0Add", "Op1Add"], + opcode=[0x00, 0x00], + spare=0, + opersize=64, + operands=[Operand(type="Mem", relaxed=True, dest="EA")]) +add_insn("xsaveopt64", "xsaveopt64", modifiers=[6, 0x0F, 0xAE], + cpu=["XSAVEOPT"], only64=True) + ##################################################################### # Intel MOVBE instruction ##################################################################### diff --git a/modules/arch/x86/tests/xsave.asm b/modules/arch/x86/tests/xsave.asm index 6105879d..43f5f28d 100644 --- a/modules/arch/x86/tests/xsave.asm +++ b/modules/arch/x86/tests/xsave.asm @@ -2,3 +2,7 @@ xsave [0] xrstor [0] xgetbv xsetbv + +xsaveopt [0] +[bits 64] +xsaveopt64 [0] diff --git a/modules/arch/x86/tests/xsave.hex b/modules/arch/x86/tests/xsave.hex index 2b6d09a0..21e3a193 100644 --- a/modules/arch/x86/tests/xsave.hex +++ b/modules/arch/x86/tests/xsave.hex @@ -14,3 +14,17 @@ d0 0f 01 d1 +0f +ae +36 +00 +00 +48 +0f +ae +34 +25 +00 +00 +00 +00 diff --git a/modules/arch/x86/x86arch.h b/modules/arch/x86/x86arch.h index f66ff359..a148ee37 100644 --- a/modules/arch/x86/x86arch.h +++ b/modules/arch/x86/x86arch.h @@ -75,6 +75,7 @@ #define CPU_F16C 41 /* Intel float-16 instructions */ #define CPU_FSGSBASE 42 /* Intel FSGSBASE instructions */ #define CPU_RDRND 43 /* Intel RDRND instruction */ +#define CPU_XSAVEOPT 44 /* Intel XSAVEOPT instruction */ enum x86_parser_type { X86_PARSER_NASM = 0, diff --git a/modules/arch/x86/x86cpu.gperf b/modules/arch/x86/x86cpu.gperf index 5d03e57c..3baa954c 100644 --- a/modules/arch/x86/x86cpu.gperf +++ b/modules/arch/x86/x86cpu.gperf @@ -383,6 +383,8 @@ fsgsbase, x86_cpu_set, CPU_FSGSBASE nofsgsbase, x86_cpu_clear, CPU_FSGSBASE rdrnd, x86_cpu_set, CPU_RDRND nordrnd, x86_cpu_clear, CPU_RDRND +xsaveopt, x86_cpu_set, CPU_XSAVEOPT +noxsaveopt, x86_cpu_clear, CPU_XSAVEOPT # Change NOP patterns basicnop, x86_nop, X86_NOP_BASIC intelnop, x86_nop, X86_NOP_INTEL |