Remove AMD CVT16 instructions.

Per http://sourceware.org/ml/binutils/2009-11/msg00372.html, this has been
removed from GNU as.

Several instructions also conflict with the latest Intel AVX instructions.

svn path=/trunk/yasm/; revision=2335

6 files changed, 1 insertions, 161 deletions

diff --git a/modules/arch/x86/gen_x86_insn.py b/modules/arch/x86/gen_x86_insn.py
index 10d70676..1ca1bc10 100755
--- a/modules/arch/x86/gen_x86_insn.py
+++ b/modules/arch/x86/gen_x86_insn.py
@@ -42,7 +42,7 @@ ordered_cpus = [
 ordered_cpu_features = [
     "FPU", "Cyrix", "AMD", "MMX", "3DNow", "SMM", "SSE", "SSE2",
     "SSE3", "SVM", "PadLock", "SSSE3", "SSE41", "SSE42", "SSE4a", "SSE5",
-    "AVX", "FMA", "AES", "CLMUL", "MOVBE", "XOP", "FMA4", "CVT16"]
+    "AVX", "FMA", "AES", "CLMUL", "MOVBE", "XOP", "FMA4"]
 unordered_cpu_features = ["Priv", "Prot", "Undoc", "Obs"]
 
 # Predefined VEX prefix field values
@@ -6777,56 +6777,6 @@ add_group("movntss",
 add_insn("movntss", "movntss")
 
 #####################################################################
-# AMD CVT16 instructions
-#####################################################################
-
-add_group("vcvtph2ps",
-    cpu=["CVT16"],
-    xop=128,
-    opcode=[0x08, 0xA0],
-    operands=[Operand(type="SIMDReg", size=128, dest="Spare"),
-              Operand(type="Mem", size=64, relaxed=True, dest="EA"),
-              Operand(type="Imm", size=8, relaxed=True, dest="Imm")])
-add_group("vcvtph2ps",
-    cpu=["CVT16"],
-    xop=128,
-    opcode=[0x08, 0xA0],
-    operands=[Operand(type="SIMDReg", size=128, dest="Spare"),
-              Operand(type="SIMDReg", size=128, dest="EA"),
-              Operand(type="Imm", size=8, relaxed=True, dest="Imm")])
-add_group("vcvtph2ps",
-    cpu=["CVT16"],
-    xop=256,
-    opcode=[0x08, 0xA0],
-    operands=[Operand(type="SIMDReg", size=256, dest="Spare"),
-              Operand(type="SIMDRM", size=128, relaxed=True, dest="EA"),
-              Operand(type="Imm", size=8, relaxed=True, dest="Imm")])
-add_insn("vcvtph2ps", "vcvtph2ps")
-
-add_group("vcvtps2ph",
-    cpu=["CVT16"],
-    xop=128,
-    opcode=[0x08, 0xA1],
-    operands=[Operand(type="Mem", size=64, relaxed=True, dest="EA"),
-              Operand(type="SIMDReg", size=128, dest="Spare"),
-              Operand(type="Imm", size=8, relaxed=True, dest="Imm")])
-add_group("vcvtps2ph",
-    cpu=["CVT16"],
-    xop=128,
-    opcode=[0x08, 0xA1],
-    operands=[Operand(type="SIMDReg", size=128, dest="EA"),
-              Operand(type="SIMDReg", size=128, dest="Spare"),
-              Operand(type="Imm", size=8, relaxed=True, dest="Imm")])
-add_group("vcvtps2ph",
-    cpu=["CVT16"],
-    xop=256,
-    opcode=[0x08, 0xA1],
-    operands=[Operand(type="SIMDRM", size=128, relaxed=True, dest="EA"),
-              Operand(type="SIMDReg", size=256, dest="Spare"),
-              Operand(type="Imm", size=8, relaxed=True, dest="Imm")])
-add_insn("vcvtps2ph", "vcvtps2ph")
-
-#####################################################################
 # AMD XOP instructions
 #####################################################################
 
diff --git a/modules/arch/x86/tests/Makefile.inc b/modules/arch/x86/tests/Makefile.inc
index 298f075a..d6cef7b4 100644
--- a/modules/arch/x86/tests/Makefile.inc
+++ b/modules/arch/x86/tests/Makefile.inc
@@ -37,8 +37,6 @@ EXTRA_DIST += modules/arch/x86/tests/cmpxchg.asm
 EXTRA_DIST += modules/arch/x86/tests/cmpxchg.hex
 EXTRA_DIST += modules/arch/x86/tests/cpubasic-err.asm
 EXTRA_DIST += modules/arch/x86/tests/cpubasic-err.errwarn
-EXTRA_DIST += modules/arch/x86/tests/cvt16.asm
-EXTRA_DIST += modules/arch/x86/tests/cvt16.hex
 EXTRA_DIST += modules/arch/x86/tests/cyrix.asm
 EXTRA_DIST += modules/arch/x86/tests/cyrix.hex
 EXTRA_DIST += modules/arch/x86/tests/div-err.asm
diff --git a/modules/arch/x86/tests/cvt16.asm b/modules/arch/x86/tests/cvt16.asm
deleted file mode 100644
index 5e23b4bd..00000000
--- a/modules/arch/x86/tests/cvt16.asm
+++ /dev/null
@@ -1,16 +0,0 @@
-; BITS=16 to minimize output length
-[bits 16]
-vcvtph2ps xmm1, xmm4, 5			; 8F E8 78 A0 314 05
-vcvtph2ps xmm2, [0], byte 5		; 8F E8 78 A0 026 00 00 05
-vcvtph2ps xmm3, qword [0], 5		; 8F E8 78 A0 036 00 00 05
-vcvtph2ps ymm1, xmm4, 5			; 8F E8 7C A0 314 05
-vcvtph2ps ymm2, [0], byte 5		; 8F E8 7C A0 026 00 00 05
-vcvtph2ps ymm3, dqword [0], 5		; 8F E8 7C A0 036 00 00 05
-
-vcvtps2ph xmm1, xmm4, 5			; 8F E8 78 A1 341 05
-vcvtps2ph [0], xmm2, byte 5		; 8F E8 78 A1 026 00 00 05
-vcvtps2ph qword [0], xmm3, 5		; 8F E8 78 A1 036 00 00 05
-vcvtps2ph xmm1, ymm4, 5			; 8F E8 7C A1 341 05
-vcvtps2ph [0], ymm2, byte 5		; 8F E8 7C A1 026 00 00 05
-vcvtps2ph dqword [0], ymm3, 5		; 8F E8 7C A1 036 00 00 05
-
diff --git a/modules/arch/x86/tests/cvt16.hex b/modules/arch/x86/tests/cvt16.hex
deleted file mode 100644
index 730d15ef..00000000
--- a/modules/arch/x86/tests/cvt16.hex
+++ /dev/null
@@ -1,88 +0,0 @@
-8f 
-e8 
-78 
-a0 
-cc 
-05 
-8f 
-e8 
-78 
-a0 
-16 
-00 
-00 
-05 
-8f 
-e8 
-78 
-a0 
-1e 
-00 
-00 
-05 
-8f 
-e8 
-7c 
-a0 
-cc 
-05 
-8f 
-e8 
-7c 
-a0 
-16 
-00 
-00 
-05 
-8f 
-e8 
-7c 
-a0 
-1e 
-00 
-00 
-05 
-8f 
-e8 
-78 
-a1 
-e1 
-05 
-8f 
-e8 
-78 
-a1 
-16 
-00 
-00 
-05 
-8f 
-e8 
-78 
-a1 
-1e 
-00 
-00 
-05 
-8f 
-e8 
-7c 
-a1 
-e1 
-05 
-8f 
-e8 
-7c 
-a1 
-16 
-00 
-00 
-05 
-8f 
-e8 
-7c 
-a1 
-1e 
-00 
-00 
-05 
diff --git a/modules/arch/x86/x86arch.h b/modules/arch/x86/x86arch.h
index e33f132f..1f324671 100644
--- a/modules/arch/x86/x86arch.h
+++ b/modules/arch/x86/x86arch.h
@@ -72,7 +72,6 @@
 #define CPU_MOVBE   38      /* MOVBE instruction */
 #define CPU_XOP     39      /* AMD XOP extensions */
 #define CPU_FMA4    40      /* AMD Fused-Multiply-Add extensions */
-#define CPU_CVT16   41      /* AMD CVT16 extensions */
 
 enum x86_parser_type {
     X86_PARSER_NASM = 0,
diff --git a/modules/arch/x86/x86cpu.gperf b/modules/arch/x86/x86cpu.gperf
index 765cf08b..5d753433 100644
--- a/modules/arch/x86/x86cpu.gperf
+++ b/modules/arch/x86/x86cpu.gperf
@@ -154,7 +154,6 @@ x86_cpu_amd(wordptr cpu, yasm_arch_x86 *arch_x86, unsigned int data)
     if (data >= PROC_bulldozer) {
         BitVector_Bit_On(cpu, CPU_XOP);
         BitVector_Bit_On(cpu, CPU_FMA4);
-        BitVector_Bit_On(cpu, CPU_CVT16);
     }
     if (data >= PROC_k10)
         BitVector_Bit_On(cpu, CPU_SSE4a);
@@ -378,8 +377,6 @@ xop,		x86_cpu_set,	CPU_XOP
 noxop,		x86_cpu_clear,	CPU_XOP
 fma4,		x86_cpu_set,	CPU_FMA4
 nofma4,		x86_cpu_clear,	CPU_FMA4
-cvt16,		x86_cpu_set,	CPU_CVT16
-nocvt16,	x86_cpu_clear,	CPU_CVT16
 # Change NOP patterns
 basicnop,	x86_nop,	X86_NOP_BASIC
 intelnop,	x86_nop,	X86_NOP_INTEL