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| author | Alan Hourihane <alanh@fairlite.demon.co.uk> | 2005-08-08 09:17:06 +0000 |
|---|---|---|
| committer | Alan Hourihane <alanh@fairlite.demon.co.uk> | 2005-08-08 09:17:06 +0000 |
| commit | 7476d0413f161ddb3f3cc4a77c3f2a2912d17e60 (patch) | |
| tree | 214626e40694b6e0d2a5389a92c0010b7f59bd92 | |
| parent | a89f89a2423aecb199d5f4af2e9430e180aa1131 (diff) | |
| download | xorg-driver-xf86-video-intel-7476d0413f161ddb3f3cc4a77c3f2a2912d17e60.tar.gz | |
Enable gamma correction bit even for 8bit modes.
The pipeconf register handles the real enablement.
| -rw-r--r-- | src/i830_driver.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/i830_driver.c b/src/i830_driver.c index e79075eb..50d9ef0c 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -1736,11 +1736,7 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, dspbase = DSPBBASE; } - if (pScrn->depth > 8) { - OUTREG(dspreg, INREG(dspreg) | DISPPLANE_GAMMA_ENABLE); - } else { - OUTREG(dspreg, INREG(dspreg) & ~DISPPLANE_GAMMA_ENABLE); - } + OUTREG(dspreg, INREG(dspreg) | DISPPLANE_GAMMA_ENABLE); OUTREG(dspbase, INREG(dspbase)); /* It seems that an initial read is needed. */ |