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| author | Alan Hourihane <alanh@fairlite.demon.co.uk> | 2005-09-06 10:23:57 +0000 |
|---|---|---|
| committer | Alan Hourihane <alanh@fairlite.demon.co.uk> | 2005-09-06 10:23:57 +0000 |
| commit | bf6fef41935ebf624cc1ae6faa084dfa0a7eee72 (patch) | |
| tree | 4e9ec4fab02242aff995975fd6cc18ae93d1f7ed | |
| parent | 5fc5f02d76e077b09bf3ab1c7deeb1263033d57a (diff) | |
| download | xorg-driver-xf86-video-intel-bf6fef41935ebf624cc1ae6faa084dfa0a7eee72.tar.gz | |
Sync the accelerator before calling AdjustFrame to avoid lockups.
| -rw-r--r-- | src/i830_driver.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/i830_driver.c b/src/i830_driver.c index 2eb3b4fd..f4d5f229 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -4863,6 +4863,10 @@ I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags) DPRINTF(PFX, "I830BIOSAdjustFrame: y = %d (+ %d), x = %d (+ %d)\n", x, pI830->xoffset, y, pI830->yoffset); + /* Sync the engine before adjust frame */ + if (!pI830->noAccel) + (*pI830->AccelInfoRec->Sync)(pScrn); + /* The i830M just happens to have some problems programming offsets via * this VESA BIOS call. Especially in dual head configurations which * have high resolutions which cause the DSP{A,B}BASE registers to be @@ -5319,7 +5323,7 @@ I830BIOSSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) DPRINTF(PFX, "I830BIOSSwitchMode: mode == %p\n", mode); - /* Stops head pointer freezes for 845G */ + /* Sync the engine before mode switch */ if (!pI830->noAccel) (*pI830->AccelInfoRec->Sync)(pScrn); |