summaryrefslogtreecommitdiff
path: root/board/aspeed/ast2400/crt.c
blob: b67f66932be4daef6fcdf976609f90c0993fd977 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
/*
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#include <common.h>
#include <command.h>

#include "type.h"
#include "vesa.h"
#include "vdef.h"
#include "vfun.h"
#include "vreg.h"
#include "crt.h"

ULONG AST3000DCLKTableV [] = {
    0x00046515,     /* 00: VCLK25_175 */  
    0x00047255,     /* 01: VCLK28_322 */
    0x0004682a,     /* 02: VCLK31_5         */
    0x0004672a,     /* 03: VCLK36          */
    0x00046c50,     /* 04: VCLK40           */
    0x00046842,     /* 05: VCLK49_5         */
    0x00006c32,     /* 06: VCLK50           */
    0x00006a2f,     /* 07: VCLK56_25        */
    0x00006c41,     /* 08: VCLK65  */
    0x00006832,     /* 09: VCLK75         */
    0x0000672e,     /* 0A: VCLK78_75        */
    0x0000683f,     /* 0B: VCLK94_5         */
    0x00004824,     /* 0C: VCLK108          */
	0x00004723,		/* 0D: VCLK119			*/
    0x0000482d,     /* 0E: VCLK135          */
	0x00004B37,		/* 0F: VCLK146_25		*/
    0x0000472e,     /* 10: VCLK157_5        */
    0x00004836,     /* 11: VCLK162          */

};

BOOL CheckDAC(int nCRTIndex)
{
	BYTE	btValue;	
	BOOL	bValue;

	BYTE btDeviceSelect;

	switch (nCRTIndex)
	{
	case CRT_1:
		btDeviceSelect = DEVICE_ADDRESS_CH7301_CRT1;
		break;
	case CRT_2:
		btDeviceSelect = DEVICE_ADDRESS_CH7301_CRT2;
		break;
	default:
		printf("CRTIndex is not 1 or 2");
		return FALSE;
		break;
	}

	//Enable all DAC's and set register 21h[0] = '0'
	//DVIP and DVIL disable for DAC
	SetI2CRegClient(0, DEVICE_SELECT_CH7301, btDeviceSelect, CH7301_PM_REG, 0x00);

	btValue = GetI2CRegClient(0, DEVICE_SELECT_CH7301, btDeviceSelect, CH7301_DC_REG);
	btValue = btValue & 0xFE;
	SetI2CRegClient(0, DEVICE_SELECT_CH7301, btDeviceSelect, CH7301_DC_REG, btValue);

	//Set SENSE bit to 1
	btValue = GetI2CRegClient(0, DEVICE_SELECT_CH7301, btDeviceSelect, CH7301_CD_REG);
	btValue = btValue | 0x01;
	SetI2CRegClient(0, DEVICE_SELECT_CH7301, btDeviceSelect, CH7301_CD_REG, btValue);

	//Reset SENSE bit to 0
	btValue = GetI2CRegClient(0, DEVICE_SELECT_CH7301, btDeviceSelect, CH7301_CD_REG);
	btValue = btValue & 0xFE;
	SetI2CRegClient(0, DEVICE_SELECT_CH7301, btDeviceSelect, CH7301_CD_REG, btValue);

	bValue = (GetI2CRegClient(0, DEVICE_SELECT_CH7301, btDeviceSelect, CH7301_CD_REG) & CD_DACT) ? TRUE : FALSE;

	return bValue;
}

VOID  SetCH7301C(ULONG	MMIOBase,
				 int	nCRTIndex,
                 int	inFreqRange,
				 int	inOperating)
{
	BYTE btDeviceSelect;
	BYTE btValue;

//#ifdef EVB_CLIENT
	//output RGB doesn't need to set CH7301
	//if (1 == inOperating)
	//	return;
//#endif

	switch (nCRTIndex)
	{
	case CRT_1:
		btDeviceSelect = 0xEA;

		break;
	case CRT_2:
		btDeviceSelect = 0xEC;

		break;
	default:
		printf("CRTIndex is not 1 or 2");
		return;
		break;
	}

	if (inFreqRange <= VCLK65)
	{
	  printf("ch7301: low f \n");
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x33, 0x08);
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x34, 0x16);
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x36, 0x60);
	}
	else
	{
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x33, 0x06);
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x34, 0x26);
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x36, 0xA0);
	}

	switch (inOperating)
	{
	case 0:
		//DVI is normal function
		 SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x49, 0xC0);
		 SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x1D, 0x47);
		break;
	case 1:
		//RGB
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x48, 0x18);
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x49, 0x0);
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x56, 0x0);
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x21, 0x9);
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x1D, 0x48);
		SetI2CRegClient(MMIOBase, 0x3, btDeviceSelect, 0x1C, 0x00);
		break;
	default:
		break;
	};
}

void SetASTModeTiming (ULONG MMIOBase, int nCRTIndex, BYTE ModeIndex, BYTE ColorDepth)
{
    ULONG    temp, RetraceStart, RetraceEnd, DisplayOffset, TerminalCount, bpp;

//  Access CRT Engine
	//  SetPolarity
    WriteMemoryLongWithMASKClient(SCU_BASE, CRT1_CONTROL_REG + nCRTIndex*0x60, ((vModeTable[ModeIndex].HorPolarity << HOR_SYNC_SELECT_BIT) | (vModeTable[ModeIndex].VerPolarity << VER_SYNC_SELECT_BIT)), (HOR_SYNC_SELECT_MASK|VER_SYNC_SELECT_MASK));

#if CONFIG_AST3000
	WriteMemoryLongClient(SCU_BASE, CRT1_CONTROL2_REG + nCRTIndex*0x60, 0xc0);
#else
    //2100 is single edge
	WriteMemoryLongClient(SCU_BASE, CRT1_CONTROL2_REG + nCRTIndex*0x60, 0x80);
#endif    
	//  Horizontal Timing
	temp = 0;
    temp = ((vModeTable[ModeIndex].HorizontalActive - 1) << HOR_ENABLE_END_BIT) | ((vModeTable[ModeIndex].HorizontalTotal - 1) << HOR_TOTAL_BIT);
    WriteMemoryLongClient(SCU_BASE, CRT1_HOR_TOTAL_END_REG  + nCRTIndex*0x60, temp);

    RetraceStart = vModeTable[ModeIndex].HorizontalTotal - vModeTable[ModeIndex].HBackPorch - vModeTable[ModeIndex].HSyncTime - vModeTable[ModeIndex].HLeftBorder - 1;
    RetraceEnd = (RetraceStart + vModeTable[ModeIndex].HSyncTime);
	temp = 0;
    temp = (RetraceEnd << HOR_RETRACE_END_BIT) | (RetraceStart << HOR_RETRACE_START_BIT);
    WriteMemoryLongClient(SCU_BASE, CRT1_HOR_RETRACE_REG  + nCRTIndex*0x60, temp);

	//  Vertical Timing
	temp = 0;
    temp = ((vModeTable[ModeIndex].VerticalActive - 1) << VER_ENABLE_END_BIT) | ((vModeTable[ModeIndex].VerticalTotal - 1) << VER_TOTAL_BIT);
    WriteMemoryLongClient(SCU_BASE, CRT1_VER_TOTAL_END_REG  + nCRTIndex*0x60, temp);

	temp = 0;
    RetraceStart = vModeTable[ModeIndex].VerticalTotal - vModeTable[ModeIndex].VBackPorch - vModeTable[ModeIndex].VSyncTime - vModeTable[ModeIndex].VTopBorder - 1;
    RetraceEnd = (RetraceStart + vModeTable[ModeIndex].VSyncTime);
    temp = (RetraceEnd << VER_RETRACE_END_BIT) | (RetraceStart << VER_RETRACE_START_BIT);
    WriteMemoryLongClient(SCU_BASE, CRT1_VER_RETRACE_REG  + nCRTIndex*0x60, temp);

	//  Set CRT Display Offset and Terminal Count
    if (ColorDepth == RGB_565) {
        bpp = 16;
    }
    else {
        bpp = 32;
    }

    DisplayOffset = vModeTable[ModeIndex].HorizontalActive * bpp / 8;
    TerminalCount = vModeTable[ModeIndex].HorizontalActive * bpp / 64;
    if (ColorDepth == YUV_444) {
        TerminalCount = TerminalCount * 3 / 4;
    }
    if (((vModeTable[ModeIndex].HorizontalActive * bpp) % 64) != 0) {
        TerminalCount++;
    }

    WriteMemoryLongClient(SCU_BASE, CRT1_DISPLAY_OFFSET + nCRTIndex*0x60, ((TerminalCount << TERMINAL_COUNT_BIT) | DisplayOffset));

	//  Set Color Format
    WriteMemoryLongWithMASKClient(SCU_BASE, CRT1_CONTROL_REG + nCRTIndex*0x60, (ColorDepth << FORMAT_SELECT_BIT), FORMAT_SELECT_MASK);

	//  Set Threshold
	temp = 0;
    temp = (CRT_HIGH_THRESHOLD_VALUE << THRES_HIGHT_BIT) | (CRT_LOW_THRESHOLD_VALUE << THRES_LOW_BIT);
    WriteMemoryLongClient(SCU_BASE, CRT1_THRESHOLD_REG + nCRTIndex*0x60, temp);

	WriteMemoryLongClient(SCU_BASE, CRT1_VIDEO_PLL_REG + nCRTIndex*0x60, AST3000DCLKTableV[vModeTable[ModeIndex].PixelClock]);
}

void SetASTCenter1024ModeTiming (ULONG MMIOBase, int nCRTIndex, BYTE ModeIndex, BYTE ColorDepth)
{
    ULONG    temp, RetraceStart, RetraceEnd, DisplayOffset, TerminalCount, bpp;

	//  Access CRT Engine
	//  SetPolarity
    WriteMemoryLongWithMASKClient(SCU_BASE, CRT1_CONTROL_REG + nCRTIndex*0x60, (HOR_NEGATIVE << HOR_SYNC_SELECT_BIT) | (VER_NEGATIVE << VER_SYNC_SELECT_BIT), HOR_SYNC_SELECT_MASK|VER_SYNC_SELECT_MASK);

	WriteMemoryLongClient(SCU_BASE, CRT1_CONTROL2_REG + nCRTIndex*0x60, 0xC0);

	//  Horizontal Timing
	temp = 0;
    temp = ((vModeTable[ModeIndex].HorizontalActive - 1) << HOR_ENABLE_END_BIT) | ((vModeTable[10].HorizontalTotal - 1) << HOR_TOTAL_BIT);
    WriteMemoryLongClient(SCU_BASE, CRT1_HOR_TOTAL_END_REG + nCRTIndex*0x60, temp);

    RetraceStart = vModeTable[10].HorizontalTotal - vModeTable[10].HBackPorch - vModeTable[10].HSyncTime - vModeTable[10].HLeftBorder - 1;
    RetraceStart = RetraceStart - (vModeTable[10].HorizontalActive - vModeTable[ModeIndex].HorizontalActive) / 2 - 1;
    RetraceEnd = (RetraceStart + vModeTable[10].HSyncTime);
	temp = 0;
    temp = (RetraceEnd << HOR_RETRACE_END_BIT) | (RetraceStart << HOR_RETRACE_START_BIT);
    WriteMemoryLongClient(SCU_BASE, CRT1_HOR_RETRACE_REG + nCRTIndex*0x60, temp);

	//  Vertical Timing
	temp = 0;
    temp = ((vModeTable[ModeIndex].VerticalActive - 1) << VER_ENABLE_END_BIT) | ((vModeTable[10].VerticalTotal - 1) << VER_TOTAL_BIT);
    WriteMemoryLongClient(SCU_BASE, CRT1_VER_TOTAL_END_REG + nCRTIndex*0x60, temp);

    RetraceStart = vModeTable[10].VerticalTotal - vModeTable[10].VBackPorch - vModeTable[10].VSyncTime - vModeTable[10].VTopBorder - 1;
    RetraceStart = RetraceStart - (vModeTable[10].VerticalActive - vModeTable[ModeIndex].VerticalActive) / 2 - 1;
    RetraceEnd = (RetraceStart + vModeTable[10].VSyncTime);
    temp = (RetraceEnd << VER_RETRACE_END_BIT) | (RetraceStart << VER_RETRACE_START_BIT);
    WriteMemoryLongClient(SCU_BASE, CRT1_VER_RETRACE_REG + nCRTIndex*0x60, temp);

	//  Set CRT Display Offset and Terminal Count
    if (ColorDepth == RGB_565) {
        bpp = 16;
    }
    else {
        bpp = 32;
    }
    DisplayOffset = vModeTable[ModeIndex].HorizontalActive * bpp / 8;
    TerminalCount = vModeTable[ModeIndex].HorizontalActive * bpp / 64;
    if (ColorDepth == YUV_444) {
        TerminalCount = TerminalCount * 3 / 4;
    }
    if (((vModeTable[ModeIndex].HorizontalActive * bpp) % 64) != 0) {
        TerminalCount++;
    }

    WriteMemoryLongClient(SCU_BASE, CRT1_DISPLAY_OFFSET + nCRTIndex*0x60, (TerminalCount << TERMINAL_COUNT_BIT) | DisplayOffset);

	//  Set Color Format
    WriteMemoryLongWithMASKClient(SCU_BASE, CRT1_CONTROL_REG + nCRTIndex*0x60, (ColorDepth << FORMAT_SELECT_BIT), FORMAT_SELECT_MASK);

	//  Set Threshold
	temp = 0;
    temp = (CRT_HIGH_THRESHOLD_VALUE << THRES_HIGHT_BIT) | (CRT_LOW_THRESHOLD_VALUE << THRES_LOW_BIT);
    WriteMemoryLongClient(SCU_BASE, CRT1_THRESHOLD_REG + nCRTIndex*0x60, temp);
    
	// Set DCLK
	WriteMemoryLongClient(SCU_BASE, CRT1_VIDEO_PLL_REG + nCRTIndex*0x60, AST3000DCLKTableV[vModeTable[ModeIndex].PixelClock]);

}

BOOL  ASTSetModeV (ULONG MMIOBase, int nCRTIndex, ULONG VGABaseAddr, USHORT Horizontal, USHORT Vertical, BYTE ColorFormat, BYTE CenterMode)
{
    BYTE    i, ModeIndex;
    BOOL	bDAC;	
    ULONG   ulTemp;

    //  Access CRT Engine
    //Enable CRT1 graph
    WriteMemoryLongWithMASKClient(SCU_BASE, CRT1_CONTROL_REG + 0x60*nCRTIndex, GRAPH_DISPLAY_ON, GRAPH_DISPLAY_MASK);
    
    //  Set CRT Display Start Address
    WriteMemoryLongWithMASKClient(SCU_BASE, CRT1_DISPLAY_ADDRESS + 0x60*nCRTIndex, VGABaseAddr, DISPLAY_ADDRESS_MASK);

    for (i = 0; i < Mode60HZCount; i++) {
        if ((vModeTable[i].HorizontalActive == Horizontal) && (vModeTable[i].VerticalActive == Vertical)) {

	    ModeIndex = i;

            if (CenterMode != 1) {
                SetASTModeTiming(MMIOBase, nCRTIndex, i, ColorFormat);
            }
            else {
                SetASTCenter1024ModeTiming (MMIOBase, nCRTIndex, i, ColorFormat);
            }

            //use internal video out sigal and don't need use 7301
            /*
			bDAC = CheckDAC(nCRTIndex);
            
			SetCH7301C(0,
				nCRTIndex,
				vModeTable[ModeIndex].PixelClock,
				bDAC);		//For RGB
			*/	
			return TRUE;
        }
    }

    return FALSE;
}