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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2021 NXP
*/
#ifndef _ASM_ARMV8_FSL_LAYERSCAPE_SVR_H_
#define _ASM_ARMV8_FSL_LAYERSCAPE_SVR_H_
#define SVR_LS1012A 0x870400
#define SVR_LS1043A 0x879200
#define SVR_LS1023A 0x879208
/* LS1043A/LS1023A 23x23 package silicon has different value of VAR_PER */
#define SVR_LS1043A_P23 0x879202
#define SVR_LS1023A_P23 0x87920A
#define SVR_LS1017A 0x870B24
#define SVR_LS1018A 0x870B20
#define SVR_LS1027A 0x870B04
#define SVR_LS1028A 0x870B00
#define SVR_LS1046A 0x870700
#define SVR_LS1026A 0x870708
#define SVR_LS1048A 0x870320
#define SVR_LS1084A 0x870302
#define SVR_LS1088A 0x870300
#define SVR_LS1044A 0x870322
#define SVR_LS2045A 0x870120
#define SVR_LS2080A 0x870110
#define SVR_LS2085A 0x870100
#define SVR_LS2040A 0x870130
#define SVR_LS2088A 0x870900
#define SVR_LS2084A 0x870910
#define SVR_LS2048A 0x870920
#define SVR_LS2044A 0x870930
#define SVR_LS2081A 0x870918
#define SVR_LS2041A 0x870914
#define SVR_LX2160A 0x873600
#define SVR_LX2120A 0x873620
#define SVR_LX2080A 0x873602
#define SVR_LX2162A 0x873608
#define SVR_LX2122A 0x873628
#define SVR_LX2082A 0x87360A
#endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SVR_H_ */
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