1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
|
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2014, 2020, Intel Corporation
*/
/ {
chosen {
tick-timer = &timer2;
u-boot,dm-pre-reloc;
};
memory@0 {
u-boot,dm-pre-reloc;
};
soc {
u-boot,dm-pre-reloc;
};
};
&clkmgr {
u-boot,dm-pre-reloc;
clocks {
u-boot,dm-pre-reloc;
};
};
&cb_intosc_hs_div2_clk {
u-boot,dm-pre-reloc;
};
&cb_intosc_ls_clk {
u-boot,dm-pre-reloc;
};
&f2s_free_clk {
u-boot,dm-pre-reloc;
};
&i2c0 {
reset-names = "i2c";
};
&i2c1 {
reset-names = "i2c";
};
&i2c2 {
reset-names = "i2c";
};
&i2c3 {
reset-names = "i2c";
};
&i2c4 {
reset-names = "i2c";
};
&l4_mp_clk {
u-boot,dm-pre-reloc;
};
&l4_sp_clk {
u-boot,dm-pre-reloc;
};
&l4_sys_free_clk {
u-boot,dm-pre-reloc;
};
&main_periph_ref_clk {
u-boot,dm-pre-reloc;
};
&main_pll {
u-boot,dm-pre-reloc;
};
&main_noc_base_clk {
u-boot,dm-pre-reloc;
};
&noc_free_clk {
u-boot,dm-pre-reloc;
};
&osc1 {
u-boot,dm-pre-reloc;
};
&peri_noc_base_clk {
u-boot,dm-pre-reloc;
};
&periph_pll {
u-boot,dm-pre-reloc;
};
&porta {
bank-name = "porta";
};
&portb {
bank-name = "portb";
};
&portc {
bank-name = "portc";
};
&rst {
u-boot,dm-pre-reloc;
};
&sysmgr {
u-boot,dm-pre-reloc;
};
&timer2 {
u-boot,dm-pre-reloc;
};
|