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* mpc83xx: Introduce ARCH_MPC836*Mario Six2019-05-204-8/+7
| | | | | | Replace CONFIG_MPC836* with proper CONFIG_ARCH_MPC836* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
* mpc83xx: Introduce ARCH_MPC834*Mario Six2019-05-207-21/+10
| | | | | | Replace CONFIG_MPC834* with proper CONFIG_ARCH_MPC834* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
* mpc83xx: Introduce ARCH_MPC832*Mario Six2019-05-205-7/+4
| | | | | | Replace CONFIG_MPC832* with proper CONFIG_ARCH_MPC832* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
* mpc83xx: Introduce ARCH_MPC831*Mario Six2019-05-205-19/+10
| | | | | | Replace CONFIG_MPC833* with proper CONFIG_ARCH_MPC833* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
* mpc83xx: Introduce ARCH_MPC830*Mario Six2019-05-208-24/+14
| | | | | | Replace CONFIG_MPC830* with proper CONFIG_ARCH_MPC830* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
* Merge tag 'efi-2019-07-rc3-2' of git://git.denx.de/u-boot-efiTom Rini2019-05-192-3/+13
|\ | | | | | | | | | | | | | | | | | | Pull request for UEFI sub-system for v2019.07-rc3 (2) Minor patches to improve UEFI specification compliance are provided. To allow running the UEFI self compliance tests an outdated version of the Unicode collation protocol has been added as a configuration option (disabled by default).
| * efi_loader: EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.SetState() correct parameterHeinrich Schuchardt2019-05-191-1/+1
| | | | | | | | | | | | KeyToggleState is a pointer according to UEFI spec 2.8. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * efi_loader: implement deprecated Unicode collation protocolHeinrich Schuchardt2019-05-192-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2 language codes existed. This protocol is not part of the UEFI specification any longer. Unfortunately it is required to run the UEFI Self Certification Test (SCT) II, version 2.6, 2017. So we implement it here for the sole purpose of running the SCT. It can be removed once a compliant SCT is available. The configuration option defaults to no. Signed-off-by: Rob Clark <robdclark@gmail.com> Most of Rob's original patch is already merged. Only the deprecated protocol is missing. Rebase it and make it configurable. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * efi_loader: rename Unicode collation protocol 2 variablesHeinrich Schuchardt2019-05-191-2/+2
| | | | | | | | | | | | | | Rename variables to make it clear they refer to the Unicode collation protocol identified by the EFI_UNICODE_PROTOCOL2_GUID. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | Import include/android_bootloader_message.h from AOSPAlex Deymo2019-05-181-0/+246
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This takes the latest changes from AOSP from the file bootloader_message/include/bootloader_message/bootloader_message.h in the repository https://android.googlesource.com/platform/bootable/recovery and re-licensed them to BSD-3 for U-Boot. Minimum local changes have been applied (convert C++ to C comments and adding #ifndef __UBOOT__ block to skip all the function declarations). Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
* | ata: ahci: drop read-only ahci_ioports membersChristian Gmeiner2019-05-181-2/+0
| | | | | | | | | | | | Also get rid of ahci_setup_port(..). Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
* | spl: Set spl_image->fdt_addr pointer for full fitImage configurationMarek Vasut2019-05-181-1/+1
| | | | | | | | | | | | | | | | | | Set the spl_image->fdt_addr pointer both for simple fitImage configuration as well as full fitImage configuration, to let spl_perform_fixups() access the DT and perform modifications to it if necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com>
* | bcm968380gerg: remove CONFIG_SYS_NAND_DRIVER_ECC_LAYOUTPhilippe Reynes2019-05-181-1/+0
| | | | | | | | | | | | | | | | | | | | This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT but it's a mistake. It's a workaround for an issue in nand core. This issue was fixed by the commit 5f626e78491c ("mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag break the nand on this board, so we simply remove it. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* | bcm963158: remove CONFIG_SYS_NAND_DRIVER_ECC_LAYOUTPhilippe Reynes2019-05-181-1/+0
| | | | | | | | | | | | | | | | | | | | This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT but it's a mistake. It's a workaround for an issue in nand core. This issue was fixed by the commit 5f626e78491c ("mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag break the nand on this board, so we simply remove it. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* | bcm968580xref: remove CONFIG_SYS_NAND_DRIVER_ECC_LAYOUTPhilippe Reynes2019-05-181-1/+0
| | | | | | | | | | | | | | | | | | | | This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT but it's a mistake. It's a workaround for an issue in nand core. This issue was fixed by the commit 5f626e78491c ("mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag break the nand on this board, so we simply remove it. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* | CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner2019-05-184-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
* | CONFIG_SYS_[DI]CACHE_OFF: convert to KconfigTrevor Woerner2019-05-1822-41/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig parameters; only for the ARC architecture. This patch turns these two parameters into Kconfig items everywhere else they are found. All of the include/configs/* and defconfig changes in this patch are for arm machines only. The Kconfig changes for arc, nds32, riscv, and xtensa have been included since these symbols are found in code under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined include/configs/* or defconfigs for these architectures exist which include these symbols. These results have been confirmed with tools/moveconfig.py. Acked-by: Alexey Brodkin <abrodkin@snopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Re-migrate for a few more boards] Signed-off-by: Tom Rini <trini@konsulko.com>
* | CONFIG_SYS_[DI]CACHE_OFF: remove commented linesTrevor Woerner2019-05-182-5/+0
| | | | | | | | | | | | | | | | Eventually these configuration items will be converted to Kconfig, therefore there's little point in leaving commented-out versions of them in include/configs. Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
* | CONFIG_SYS_[DI]CACHE_OFF: remove superfluous "1"Trevor Woerner2019-05-181-1/+1
|/ | | | | | | | | | This config is the only config that uses: #define CONFIG_SYS_DCACHE_OFF 1 in its #define. Remove the superfluous "1" so this cache #define is like all the others. Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
* Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini2019-05-161-8/+0
|\ | | | | | | - arndale fixes
| * arm: exynos: arndale: Remove unused CONFIG_POWER and CONFIG_POWER_I2CKrzysztof Kozlowski2019-05-161-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CONFIG_POWER and CONFIG_POWER_I2C were introduced in include/configs/exynos5-common.h in commit 19bd3aaa5991 ("exynos5: fix build break by adding CONFIG_POWER") and then it propagated up to include/configs/arndale.h. However before that commit, there was no build break at all on Arndale and SMDK5250 boards. It seems the commit fixed nothing and just added unused defines. In fact, the Arndale board is not configuring its PMIC (S5M8767) which uses I2C bus. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2019-05-161-0/+103
|\ \ | | | | | | | | | - SoCFPGA DT and reset cleanup, AE MCVEVK board support.
| * | arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] boardWolfgang Grandegger2019-05-141-0/+103
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-add support for Aries Embedded MCV SoM, which is CycloneV based and the associated MCVEVK and MCVEVP baseboard. The board can boot from eMMC. Ethernet and USB is supported. The Aries Embedded boards have been removed with commit 03b54997d568 ("board/aries: Remove"). I will now take care of them. The device-tree files are from mainline Linux commit e93c9c99a629 ("Linux v5.1)". Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de> CC: Marek Vasut <marex@denx.de> CC: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
* | ARM: renesas: grpeach: Align env positionMarek Vasut2019-05-141-1/+1
|/ | | | | | | | | Move the U-Boot environment to 0x80000 to match the downstream vendor fork and allow easy migration from one to the other. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Merge tag 'efi-2019-07-rc3' of git://git.denx.de/u-boot-efiTom Rini2019-05-131-5/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | Pull request for UEFI sub-system for v2019.07-rc3 The development target for the UEFI sub-system is EBBR compliance. We have already implemented some further protocols to enable running the UEFI Shell and the UEFI SCT test suite. As some boards are severely memory constrained make some of these extras customizable. Provide bug fixes. The most prominent ones let us pass the UEFI SCT memory allocation tests.
| * lib: charset: correct utf8_utf16_strnlen() descriptionHeinrich Schuchardt2019-05-121-5/+7
| | | | | | | | | | | | | | | | | | | | Correct the description of utf8_utf16_strnlen() and utf8_utf16_strlen() to reflect that they return u16 count and not byte count. For these functions and utf16_utf8_strnlen() describe the handling of invalid code sequences. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2019-05-132-1/+8
|\ \ | | | | | | | | | - A10 FPGA programming support, Gen5 livetree conversion
| * | ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPLTien Fong Chee2019-05-101-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | Increasing Malloc pool size up to 0x15000 is required to support FAT in SPL . The result of calculation is come from default max cluster(0x10000) + others(0x2000) + additional memory for headroom(0x3000). Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
| * | ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loadingTien Fong Chee2019-05-101-0/+4
| |/ | | | | | | | | | | | | | | | | Add FPGA driver to support program FPGA with FPGA bitstream loading from filesystem. The driver are designed based on generic firmware loader framework. The driver can handle FPGA program operation from loading FPGA bitstream in flash to memory and then to program FPGA. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
* | sh: shmin: Remove the boardMarek Vasut2019-05-101-85/+0
| | | | | | | | | | | | | | | | | | | | | | Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
* | sh: ms7720se: Remove the boardMarek Vasut2019-05-101-82/+0
| | | | | | | | | | | | | | | | | | | | | | Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
* | sh: mpr2: Remove the boardMarek Vasut2019-05-101-55/+0
| | | | | | | | | | | | | | | | | | | | | | | | Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Mark Jonas <mark.jonas@de.bosch.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
* | sh: rsk7269: Remove the boardMarek Vasut2019-05-101-51/+0
| | | | | | | | | | | | | | | | | | | | | | Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
* | sh: rsk7264: Remove the boardMarek Vasut2019-05-101-52/+0
| | | | | | | | | | | | | | | | | | | | | | Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
* | sh: rsk7203: Remove the boardMarek Vasut2019-05-101-63/+0
|/ | | | | | | | | | | Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
* Remove #define CONFIG_CRC32Chris Packham2019-05-101-1/+0
| | | | | | | | | | There is no check for CONFIG_CRC32 so the #define in image.h does nothing. Remove it. Reported-by: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* Make FIT support really optionalFabrice Fontaine2019-05-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Due to some mistakes in the source code, it was not possible to really turn FIT support off. This commit fixes the problem by means of the following changes: - Enclose "bootm_host_load_image" and "bootm_host_load_images" between checks for CONFIG_FIT_SIGNATURE, in common/bootm.c. - Enclose the declaration of "bootm_host_load_images" between checks for CONFIG_FIT_SIGNATURE, in common/bootm.h. - Condition the compilation and linking of fit_common.o fit_image.o image-host.o common/image-fit.o to CONFIG_FIT=y, in tools/Makefile. Signed-off-by: Carlos Santos <casantos@datacom.ind.br> [fabio: adapt for 2016.07] Signed-off-by: Fabio Estevam <festevam@gmail.com> [Ricardo: fix conditional compilation and linking of the files mentioned above for 2016.07] Signed-off-by: Ricardo Martincoski <ricardo.martincoski@gmail.com> [Jörg: adapt for 2019.01] Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks> [Retrieved from: https://git.buildroot.net/buildroot/tree/package/uboot-tools/0003-Make-FIT-support-really-optional.patch] Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
* Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchipTom Rini2019-05-095-47/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | Improvements and new features: - split more rockchip pinctrl_core feature into per SoC - enable TPL for evb-rk3399 board - enable TPL/SPL for evb-px5 board - enable TPL and OP-TEE support for evb-rk3229 - update fix in arm common assembly start code for rockchip header file - update default SPL_FIT_GENERATOR for rockchip - rk3399 boards update to use '-u-boot.dtsi' - add new rk3399 boards: Nanopi M4, Nanopc T4 - enable sound for chromebook_minnie
| * rockchip: rk3399: add tpl supportKever Yang2019-05-081-0/+8
| | | | | | | | | | | | | | | | | | Rockchip platform suppose to use TPL(run in SRAM) as dram init and SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be limited by SRAM size. This patch add rk3399-board-tpl.c and its common configs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: px5: update SPL size for spl/tplKever Yang2019-05-082-1/+3
| | | | | | | | | | | | | | Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
| * rockchip: evb-rk3229: remove unnecessary definesKever Yang2019-05-081-43/+1
| | | | | | | | | | | | Prefer to use default setting like other SoCs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk322x: add tpl supportKever Yang2019-05-081-3/+3
| | | | | | | | | | | | | | Move original spl to tpl, and add spl to load next stage firmware, adapt all the address and option for them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2019-05-091-0/+37
|\ \ | | | | | | | | | | | | | | | - DM updates for multiple MVEBU boards (Stefan) - Add CRS305-1G-4S board (Luka) - Enable MMC in SPL on clearfog (Baruch)
| * | arm: mvebu: Add CRS305-1G-4S boardLuka Kovacic2019-05-091-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CRS305-1G-4S has a switch chip with an integrated CPU (98DX3236) and like some of the other similar boards requires bin_hdr. bin_hdr (DDR3 init stage) is currently retrieved from the stock bootloader and compiled into the kwb image. Adds support for U-Boot, enable UART, SPI, Winbond SPI flash chip support and writing env to SPI flash. Signed-off-by: Luka Kovacic <me@lukakovacic.xyz> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge git://git.denx.de/u-boot-riscvTom Rini2019-05-092-7/+11
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | - Correct SYS_TEXT_BASE for qemu. - Support booti. - Increase SYSBOOTM_LEN for Fedora/RISCV kernel. - Support SMP booting from flash.
| * | | riscv: configs: AE350 will use CONFIG_OF_SEPARATE when boots from flashRick Chen2019-05-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When AE350 boots from flash, use CONFIG_OF_SEPARATE instead of CONFIG_OF_BOARD. Also remove unused code about prior_stage_fdt_address. And modify CONFIG_SYS_FDT_BASE as flash address. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
| * | | riscv: qemu-riscv.h: define CONFIG_PREBOOT (enables extlinux)David Abdurachmanov2019-05-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Set fdt_addr variable, which is needed for extlinux to find FDT. Otherwise booting kernel using extlinux results in missing FDT. - Also run fdt addr with FDT address so that fdt commands would work out of the box in U-Boot prompt. This is successfully used by Fedora/RISCV with 5.1-rc3+ kernel using OpenSBI -> U-Boot (S-mode) [extlinux] -> Kernel setup. Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | riscv: set CONFIG_SYS_BOOTM_LEN to SZ_64MDavid Abdurachmanov2019-05-091-6/+6
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After updating Fedora/RISCV kernel to 5.1-rc3+ the size increased above the current threshold. Looking into HiKey, Dragonboards, etc. seems that SZ_64M is a popular option. This sucessfully boots Fedora/RISCV with 5.1-rc3+ kernel on QEMU 4.0 (master) with OpenSBI -> U-Boot (S-mode) [extlinux] -> Kernel setup. Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2019-05-081-0/+70
|\ \ \ | |/ / |/| | | | | | | | - Various PHY fixes / enhancements. - TI K2G fixes
| * | net: phy: Add generic helpers to access MMD PHY registersCarlo Caione2019-05-071-0/+70
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added to allow access to the MMD PHY registers. The MMD PHY registers can be accessed by several means: 1. Using two new MMD access function hooks in the PHY driver. These functions can be implemented when the PHY driver does not support the standard IEEE Compatible clause 45 access mechanism described in clause 22 or if the PHY uses its own non-standard access mechanism. 2. Direct access for C45 PHYs and C22 PHYs when accessing the reachable DEVADs. 3. The standard clause 45 access extensions to the MMD registers through the indirection registers (clause 22) in all the other cases. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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