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* phy: atheros: add device tree bindings and configMichael Walle2020-05-071-0/+13
| | | | | | | | | | | | | | | | | Add support for configuring the CLK_25M pin as well as the RGMII I/O voltage by the device tree. By default the AT803x PHYs outputs the 25MHz clock of the XTAL input. But this output can also be changed by software to other frequencies. This commit introduces a generic way to configure this output. Also the PHY supports different RGMII I/O voltages: 1.5V, 1.8V and 2.5V. An internal LDO is able to provide 1.5V (default) and 1.8V. The 2.5V option needs an external supply voltage. This commit adds support to switch the internal LDO to 1.8V. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge tag 'u-boot-imx-20200502' of ↵Tom Rini2020-05-041-2/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2020.07 ---------------- - imxrt: fix LCD clock, fix doc - new board: Coral Dev - imx8: enable Cache in SPL. SNVS, update SCFW API - imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading - MX6ULL : is_imx6ull to include i.MX6ULZ - Net: add config to enable TXC delay Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
| * dt-bindings: pinctrl: imxrt1020: remove useless commentGiulio Benetti2020-05-011-2/+0
| | | | | | | | | | | | | | A comment note has been left after completing pinctrl listing, so let's remove it since it's useless. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
* | Merge tag 'u-boot-rockchip-20200501' of ↵Tom Rini2020-05-042-106/+125
|\ \ | |/ |/| | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - dts clean up to use -u-boot for px30, rk3399 boards - dts sycn from upstream kernel for rk3328, rk3399 - add rockchip rng driver - new board support: rk3328-roc-cc, rk3399-roc-pc,Nanopi M4 2GB
| * dt-bindings: power: rk3328-power: sync from upstream Linux kernelChen-Yu Tsai2020-05-011-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This syncs the rk3328 power domain header file from Linux kernel next-20200324, to support newer hardware blocks when syncing the device tree files. The last non-merge commit to touch it was b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license") Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Loic Devulder <ldevulder@suse.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| * dt-bindings: clock: rk3328: sync from upstream Linux kernelChen-Yu Tsai2020-05-011-106/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This syncs the rk3328 clock header file from Linux kernel next-20200324, to support newer hardware blocks when syncing the device tree files. The last non-merge commit to touch it was 0dc14b013f79 ("clk: rockchip: add clock id for watchdog pclk on rk3328") Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Loic Devulder <ldevulder@suse.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-shWIP/29Apr2020Tom Rini2020-04-297-31/+7
|\ \ | | | | | | | | | - rmobile gen2/gen3 DTS sync and defconfig consolidation
| * | ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.6.2Marek Vasut2020-04-287-31/+7
| |/ | | | | | | | | | | | | | | Synchronize R-Car Gen2 device trees with Linux 5.6.2, commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge tag 'u-boot-amlogic-20200428' of ↵Tom Rini2020-04-282-0/+3
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - fix sd-emmc controller A init on G12A/G12B/SM1 SoCs - add GXBB USB PHY driver - enable access to SPI NOR Flash on VIM2 and VIM3/VIM3L boards - fix USB PHYs Power-Up on on VIM3/VIM3L boards
| * | arm64: dts: meson: sync dt and bindings from v5.7-rc1Neil Armstrong2020-04-282-0/+3
| |/ | | | | | | | | | | | | Sync the device tree and dt-bindings from Linux v5.7-rc1 8f3d9f354286 ("Linux 5.7-rc1"). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | ARC: HSDK: CGU: add support for timer clockEugeniy Paltsev2020-04-271-2/+3
|/ | | | | | | | Add support for additional timer clock which belongs to tunnel domain. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arm: actions: add S700 SoC device treeAmit Singh Tomar2020-04-242-0/+152
| | | | | | | | | | | | | This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d") and required binding for S700 SoC that is a 64-bit Quad-core ARM Cortex-A53 cores. It also provisions dts file to be built based on selected platform(CONFIG_MACH_S900/S700). Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
* arm: dts: sync dts for Action Semi S900Amit Singh Tomar2020-04-243-77/+194
| | | | | | | | | | | | | Synchronize device tree bindings with v5.5-rc6 tag with commit id "b3a987b0264d". Also, it removes older clock binding defined for S900 along with undocumented compatible string "actions,s900-serial" from serial driver and adapts clock driver to cater to new bindings. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
* Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-imxTom Rini2020-04-202-0/+815
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| * dt-bindings: pinctrl: add i.MXRT1020 pins definitionGiulio Benetti2020-04-181-0/+763
| | | | | | | | | | | | Add i.MXRT1020 pins definition. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
| * clk: imx: add i.IMXRT1020 clk driverGiulio Benetti2020-04-181-0/+52
| | | | | | | | | | | | | | Add i.MXRT1020 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* | gpio: sandbox: cleanup binding supportPatrick Delaunay2020-04-161-0/+24
| | | | | | | | | | | | | | | | | | Cleanup binding support, use the generic binding by default (test u-class gpio_xlate_offs_flags function) and add specific binding for added value. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dt-bindings: gpio: document the new pull-up/pull-down flagsPatrick Delaunay2020-04-161-0/+6
|/ | | | | | | | | | | | | | | This commit extends the flags that can be used in GPIO specifiers to indicate if a pull-up resistor or pull-down resistor should be enabled. It is the backport of linux commit ede033e1e863c ('dt-bindings: gpio: document the new pull-up/pull-down flags') from Thomas Petazzoni <thomas.petazzoni@bootlin.com> and integrated in v5.1-rc1 https://github.com/torvalds/linux/commit/ede033e1e863c Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm64: dts: meson: sync dt and bindings from v5.6-rc2Jerome Brunet2020-04-069-66/+59
| | | | | | | | | | | | Sync the device tree and dt-bindings from Linux v5.6-rc2 11a48a5a18c6 ("Linux 5.6-rc2") The only exception to this is the mmc pinctrl pin bias of gxl SoC family. This is a fix which found its way to u-boot but not Linux yet. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* dt-bindings: leds: import common led bindings from linux v5.5Jerome Brunet2020-04-061-0/+75
| | | | | | | | | Import the common leds bindings definition from linux d5226fa6dbae ("Linux 5.5") Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* ARM: dts: imx6sx: Sync with kernel 5.4.16Fabio Estevam2020-03-091-6/+7
| | | | | | Sync the imx6sx dts files with kernel 5.4.16. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* x86: Add a clock driver for Intel devicesSimon Glass2020-02-071-0/+15
| | | | | | | | | | | | So far we have avoided adding a clock driver for Intel devices. But the Designware I2C driver needs a different clock (133MHz) on Intel devices than on others (166MHz). Add a simple driver that provides this information. This driver can be expanded later as needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiWIP/26Jan2020Tom Rini2020-01-262-3/+13
|\ | | | | | | | | | | | | - Libre Computer ALL-H3-IT/ALL-H5-CC board (Chen-Yu Tsai) - Allwinner R40 Ethernet, usb phy enablement (Andre Przywara) - Sunxi auto load from 128KB MMC offset (Andre Przywara) - Orange Pi Win Ethernet phy enablement (Jernej Skrabec)
| * sunxi: H3/H5 Sync DT files from upstream Linux kernel as of next-20200108Chen-Yu Tsai2020-01-242-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync the device tree files and device tree header files from upstream Linux kernel, as of 2020-01-08. The commit synced to in the sunxi repo 98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next which is also part of next-20200108. Changes brought in include: - cleanup of pinmux node names - addition of Security ID, MBUS, CSI, crypto engine, video codec, pmu, and thermal sensor device nodes for both SoCs - addition of deinterlacing engine device node on H3 - cleanup of RTC device node and addition of its clocks - various board cleanups and improvements - removal of pinmux node for GPIO lines - cpufreq / DVFS - HDMI output - UART-based Bluetooth - audio codec - USB ports - new boards Most of the changes don't concern U-boot. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* | arm: dts: Import device tree for ST-Ericsson Ux500Stephan Gerhold2020-01-223-0/+111
|/ | | | | | | | | | | from https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git/ tag "ux500-armsoc-v5.6-2" commit 224bf0fe7292 ("ARM: dts: ux500: samsung-golden: Add Bluetooth") (queued for merge in Linux 5.6) Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* clk: mediatek: add driver for MT7622Sam Shih2020-01-161-0/+271
| | | | | | | This patch add clock driver for MediaTek MT7622 SoC. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com>
* clk: mediatek: add driver support for MT8512mingming lee2020-01-161-0/+197
| | | | | | | Add clock driver for MediaTek MT8512 SoC, include topckgen, apmixedsys and infracfg support. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
* ram: add SDRAM driver for i.MXRT SoCsGiulio Benetti2020-01-141-0/+100
| | | | | | Add SDRAM driver for i.MXRT SoCs. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
* ARM: dts: imxrt1050: add dtsi fileGiulio Benetti2020-01-141-0/+993
| | | | | | Add dtsi file for i.MXRT1050. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
* clk: imx: add i.IMXRT1050 clk driverGiulio Benetti2020-01-141-0/+65
| | | | | | Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
* Merge tag 'u-boot-imx-20200108' of ↵Tom Rini2020-01-081-0/+300
|\ | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx --------------------------------------------------------------------- Add i.MX8MP SoC and EVK board Update README for i.MX8MN EVK and fix mmc env Add pca9450 driver -------------------------------------------------------------------- Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
| * dt-bindings: clock: add i.MX8MP clock headerPeng Fan2020-01-081-0/+300
| | | | | | | | | | | | Add i.MX8MP clock header Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2020-01-081-0/+71
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| * clk: agilex: Add clock driver for AgilexLey Foon Tan2020-01-071-0/+71
| | | | | | | | | | | | | | | | | | | | | | Add clock manager driver for Agilex. Provides clock initialization and get_rate functions. agilex-clock.h is from Linux commit ID cd2e1ad12247. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
* | dt-bindings: add imx-audmux macro definitionsBaruch Siach2020-01-071-0/+64
|/ | | | | | | | | | | Import fsl-imx-audmux.h from Linux as of v5.4-rc6. The header is unchanged since v4.18. That would make it easier to import DT files that depend on imx-audmux definitions from the kernel tree. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* dt-bindings: phy: dp83867: Add documentation for disabling clock outputGrygorii Strashko2019-12-091-1/+2
| | | | | | | | | | | | | | | | | | | Based on commit 980066e6d964 ("dt-bindings: phy: dp83867: Add documentation for disabling clock output") of mainline linux kernel. The clock output is generally only used for testing and development and not used to daisy-chain PHYs. It's just a source of RF noise afterward. Add a mux value for "off". I've added it as another enumeration to the output property. In the actual PHY, the mux and the output enable are independently controllable. However, it doesn't seem useful to be able to describe the mux setting when the output is disabled. Document that PHY's default setting will be left as is if the property is omitted. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* clk: mediatek: add driver for MT8518mingming lee2019-12-031-0/+249
| | | | | | Add clock driver for MediaTek MT8518 SoC. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
* ARM: dts: stm32: DT alignment with kernel v5.4-rc4Patrick Delaunay2019-11-262-1/+2
| | | | | | | Device tree and binding alignment with kernel v5.4-rc4 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* ARM: dts: stm32: DT alignment with kernel v5.3Patrick Delaunay2019-11-262-3/+10
| | | | | | | | Device tree and binding alignment with kernel v5.3 and converted to SPDX. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* rockchip: clk: Add clk driver for rk3308Finley Xiao2019-11-171-0/+387
| | | | | | | | | | | Add clk controller driver for RK3308 SOC. This patch depends on Elaine's pll patch[0]. [0]http://patchwork.ozlabs.org/patch/1183718/ Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* rockchip: clk: add px30 clock driverKever Yang2019-11-171-0/+389
| | | | | | | | | The px30 contains 2 separate clock controllers, pmucru and cru. Add drivers for them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* rockchip: add core px30 headersHeiko Stuebner2019-11-172-0/+43
| | | | | | | | Add headers needed by the upcoming px30 support, including two new dt-binding headers taken from the Linux kernel. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* imx: add dtsi for i.MX8MNPeng Fan2019-11-051-0/+215
| | | | | | Add dtsi for i.MX8MN Signed-off-by: Peng Fan <peng.fan@nxp.com>
* Merge tag 'u-boot-imx-20191104' of ↵WIP/04Nov2019Tom Rini2019-11-042-388/+271
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20191104 ------------------- - i.MX NAND: nandbcb support for MX6UL / i.MX7 - i.MX8: support for HAB - Convert to DM (opos6ul, mccmon6) - Toradex i.MX6ull colibri - sync DTS with kernel Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
| * dt-bindings: import usb pdPeng Fan2019-11-031-0/+88
| | | | | | | | | | | | | | Import usb pd bindings from Linux 5.4.0-rc1. This file will be included by imx8mm-evk.dts. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: update i.MX8MQ device treesPatrick Wildt2019-11-031-388/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This updates the i.MX8MQ device trees and, necessarily, also the i.MX8MQ clock bindings. These are taken verbatim from from the Linux kernel version v5.4-rc2, which three small changes which were already part of the previous device tree: * Keep the PSCI reserved memory range * Keep the alias for ethernet, so that the MAC address can be set * Keep the modified #include for the IOMUXC pins Signed-off-by: Patrick Wildt <patrick@blueri.se> Acked-by: Peng Fan <peng.fan@nxp.com>
* | ARC: HSDK: introduce reset driverEugeniy Paltsev2019-11-011-0/+17
|/ | | | | | | Introduce reset driver for Synopsys ARC HSDK SoC Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mipsWIP/25Oct2019Tom Rini2019-10-255-3/+76
|\ | | | | | | | | | | | | | | | | - bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs - bmips: various small fixes - mtmips: add new drivers for clock, reset-controller and pinctrl - mtmips: add support for high speed UART - mtmips: update/enhance drivers for SPI and ethernet - mtmips: add support for MMC
| * reset: add reset controller driver for MediaTek MIPS platformWeijie Gao2019-10-251-0/+36
| | | | | | | | | | | | | | This patch adds reset controller driver for MediaTek MIPS platform and header file for mt7628. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * clk: add clock driver for MediaTek MT76x8 platformWeijie Gao2019-10-251-0/+37
| | | | | | | | | | | | | | | | This patch adds a clock driver for MediaTek MT7628/7688 SoC. It provides clock gate control as well as getting clock frequency for CPU/SYS/XTAL and some peripherals. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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