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* sunxi: provide default USB gadget setupMaxime Ripard2017-10-031-0/+3
| | | | | | | | | | All the Allwinner boards use the same manufacturer, VID and PID for the gadgets. Make them the defaults to remove some boilerplate from our defconfigs. Reviewed-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* usb: gadget: usb_ether: Move settings to commonMaxime Ripard2017-10-031-8/+8
| | | | | | | | | | | | The usb_ether gadget duplicates the USB settings for the manufacturer, product ID and vendor ID. Make sure we use the common option so that we can expect a single VID/PID couple for a single device. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* usb: gadget: Make g_dnl USB settings commonMaxime Ripard2017-10-032-15/+27
| | | | | | | | | | | The g_dnl USB settings for the vendor ID, product ID and manufacturer are actually common settings that can and should be shared by all the gadgets. Make them common by renaming them, and convert all the users. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* usb: gadget: usb_ether: Move the interfaces to KconfigMaxime Ripard2017-10-031-0/+28
| | | | | | | | | | We need to select an interface for the usb_ether gadget, and they haven't been converted to Kconfig yet. Add a choice to make sure we have an option selected, and convert all the users. Reviewed-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* usb: gadget: Convert USB_ETHER to KconfigMaxime Ripard2017-10-031-0/+14
| | | | | | | | | The USB Ethernet gadget option has not yet been moved to Kconfig, let's deal with that. Reviewed-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* usb: gadget: Move USBNET_HOST_ADDR to KconfigMaxime Ripard2017-10-031-0/+7
| | | | | | | | | While the USB Ethernet device address is already defined in Kconfig, the host address isn't. Convert it. Reviewed-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* usb: gadget: Document USBNET_DEVADDRMaxime Ripard2017-10-031-0/+3
| | | | | | | | | Add an help about the USBNET_DEVADDR Kconfig option to make it clearer what it's about. Acked-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* usb: gadget: Move USBNET_DEVADDR option out of g_dnlMaxime Ripard2017-10-031-2/+2
| | | | | | | | | The USBNET_DEVADDR has nothing to do with the USB download gadget, but rather with the USB Ethernet gadget. Move it out of the if statement. Acked-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* Merge git://git.denx.de/u-boot-usbTom Rini2017-10-0112-61/+521
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| * usb: dwc3: add UniPhier specific glue layerMasahiro Yamada2017-10-013-0/+128
| | | | | | | | | | | | | | | | Add UniPhier platform specific glue layer to support USB3 Host mode on Synopsys DWC3 IP. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * usb: xhci: Set 'Average TRB Length' to 8 for control endpointsBin Meng2017-10-012-0/+12
| | | | | | | | | | | | Update the codes to conform with xHCI spec chapter 6.2.3. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: Set 'Error Count' to 0 for isoch endpointsBin Meng2017-10-011-1/+5
| | | | | | | | | | | | Per xHCI spec, 'Error Count' should be set to 0 for isoch endpoints. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: Program max burst size for endpointBin Meng2017-10-011-1/+20
| | | | | | | | | | | | | | | | | | | | The 'Max Burst Size' indicates to the xHC the maximum number of consecutive USB transactions that should be executed per scheduling opportunity. This is a “zero-based” value, where 0 to 15 represents burst sizes of 1 to 16, but at present this is always set to zero. Let's program the required value according to real needs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: Honor endpoint's intervalBin Meng2017-10-012-2/+198
| | | | | | | | | | | | | | | | | | | | | | USB endpoint reports the period between consecutive requests to send or receive data as bInverval in its endpoint descriptor. So far this is ignored by xHCI driver and the 'Interval' field in xHC's endpoint context is always programmed to zero which means 1ms for low speed or full speed , or 125us for high speed or super speed. We should honor the interval by getting it from endpoint descriptor. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: Fix max packet size for full speed device endpoint 0Bin Meng2017-10-011-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In xhci_check_maxpacket(), the control endpoint 0 max packet size is wrongly taken from the interface's endpoint descriptor. However the default endpoint 0 does not come with an endpoint descriptor hence is not included in the interface structure. Change to use epmaxpacketin[0] instead. The other bug in this routine is that when setting max packet size to the xHC endpoint 0 context, it does not clear its previous value at all before programming a new one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: Add interrupt transfer supportBin Meng2017-10-011-3/+10
| | | | | | | | | | | | | | | | xHCI uses normal TRBs for both bulk and interrupt. This adds the missing interrupt transfer support to xHCI so that devices like USB keyboard that uses interrupt transfer can work. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: Don't assume LS/FS devices are always behind a HS hubBin Meng2017-10-011-4/+14
| | | | | | | | | | | | | | | | | | | | | | At present xHCI driver assumes LS/FS devices are attached directly to a HS hub. If they are connected to a LS/FS hub, the driver will fail to perform the USB enumeration process on such devices. This is fixed by looking from the device itself all the way up to the HS hub where the TT that serves the device is located. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: usb: emul: Drop usb_emul_reset()Bin Meng2017-10-012-19/+0
| | | | | | | | | | | | | | | | With the root hub unbinding in usb_stop(), there is no need to do a Sandbox-specific reset operation. usb_emul_reset() is no longer used anywhere, drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: usb: Remove no longer needed blk_unbind_all()Bin Meng2017-10-011-5/+1
| | | | | | | | | | | | | | With the root hub unbinding in usb_stop(), there is no need to do a blk uclass specific unbind operation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: usb: Fix broken usb_stop()Bin Meng2017-10-011-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we only do device_remove() during usb stop. The DM API device_remove() only marks the device state as inactivated, but still keeps its USB topology (eg: parent, children, etc) in the DM device structure. There is no issue if we only start USB subsystem once and never stop it. But a big issue occurs when we do 'usb stop' and 'usb start' multiple times. Strange things may be observed with current implementation, like: - the enumeration may report only 1 mass storage device is detected, but the total number of USB devices is correct. - USB keyboard does not work anymore after a bunch of 'usb reset' even if 'usb tree' shows it is correctly identified. - read/write flash drive via 'fatload usb' may complain "Bad device" In fact, every time when USB host controller starts the enumeration process, it takes random time for each USB port to show up online, hence each USB device may appear in a different order from previous enumeration, and gets assigned to a totally different USB address. As a result, we end up using a stale USB topology in the DM device structure which still reflects the previous enumeration result, and it may create an exact same DM device name like generic_bus_0_dev_7 that is already in the DM device structure. And since the DM device structure is there, there is no device_bind() call to bind driver to the device during current enumeration process, eventually creating an inconsistent software representation of the hardware topology, a non-working USB subsystem. The fix is to clear the unused USB topology in the usb_stop(), by calling device_unbind() on each controller's root hub device, and the unbinding will unbind all of its children automatically. For Sandbox, we need scan the device tree each time when we start the USB stack, in order to re-create the emulated USB devices and bind drivers for them before we actually do the driver probe. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: emul: hub: Report the actual device speed of the emulation deviceBin Meng2017-10-011-3/+30
| | | | | | | | | | | | | | | | | | | | At present the usb hub emulator always reports its downstream port speed as full speed. Actually it is high speed for sandbox-flash, and low speed for sandbox-keyb. We can determine the device speed by checking its device descriptor bcdUSB field, and do the proper hub port status report based on that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: emul: Expose find_descriptor() as a public APIBin Meng2017-10-011-3/+2
| | | | | | | | | | | | | | This can be useful outside of the sandbox usb emulation uclass driver. Expose it as a public API with a proper prefix (usb_emul_). Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: sandbox: Fix emulator device select logic in usb_emul_find_devnum()Bin Meng2017-10-013-8/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current emulator select logic in usb_emul_find_devnum() is to test the USB address. The USB address of the device being enumerated is initialized to zero at the beginning of the enumeration process in usb_setup_device(). At this point, the saved USB address in the platform data has not been assigned to any valid USB address either. This means: the logic will select an emulator device according to its sequence of declaring order in the device tree. Take test.dts for example, flash-stick@0 will be selected before flash-stick@1. But unfortunately such logic is wrong. In fact USB devices show up in a random order during the enumeration which means usb_emul_find_devnum() may be called on port 3 for keyb@3 before on port 0 for flash-stick@0. To fix this, we introduce a new emulator uclass specific platdata to store the USB device's port number on its parent hub, and update the logic to test the port number instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: sandbox: Initialize root hub's device speed to high speedBin Meng2017-10-011-0/+24
| | | | | | | | | | | | | | | | At present 'usb tree' shows that the root hub on the Sandbox USB controller is at full speed. But its device descriptor says it's USB 2.0, so let's report it as a high speed device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: emul: Remove maxpacketsize in usb_emul_setup_device()Bin Meng2017-10-014-8/+5
| | | | | | | | | | | | This parameter is never used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | power: spl: add SPL_DM_REGULATOR_FIXED in KconfigPhilipp Tomsich2017-10-011-0/+7
| | | | | | | | | | | | | | | | The Makefile already tests for SPL_DM_REGULATOR_FIXED, but Kconfig does not provide it. This adds SPL_DM_REGULATOR_FIXED to Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | rockchip: i2c: rk3328: support i2c for rk3328 SoCElaine Zhang2017-10-011-0/+1
| | | | | | | | | | | | | | | | | | | | Add compatible to support rk3328 i2c Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Heiko Schocher<hs@denx.de>
* | rockchip: pinctrl: rk3368: add pinctrl for SDMMC0Philipp Tomsich2017-10-011-5/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Apparently, our earlier assumption that the BROM will always set up the iomux for SDcard communication does not always hold true: when booting U-Boot from the on-module (on the RK3368-uQ7) eMMC, the SDcard pins are not set up and need to be configured by the pinctrl driver to allow SD card access. This change implements support for setting up the SDMMC pins in pinctrl for the RK3368. Reported-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | rockchip: rk322x: fix pd_bus hclk/pclkKever Yang2017-10-011-3/+3
| | | | | | | | | | | | | | | | The pd_bus hclk/pclk source is pd_bus aclk, not the PLL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: clk: fix typo in rk322x clock driverKever Yang2017-10-011-1/+1
| | | | | | | | | | | | | | | | Fix typo RK322X/RK3036 in rk322x clock driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: rk3188: ram: add support for 16bit row addressKever Yang2017-10-011-2/+9
| | | | | | | | | | | | | | | | | | | | RK3188 using the same ddr_conf for both 15 bit and 16 bit row address. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Fixed compile-error by declaring 'row':] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: rk322x: add sdram driverKever Yang2017-10-012-0/+856
| | | | | | | | | | | | | | | | Add driver for rk322x to support sdram initialize in SPL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: rk3328: move sdram driver to driver/ramKever Yang2017-10-012-0/+61
| | | | | | | | | | | | | | | | | | Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: rk3288: move sdram driver to driver/ramKever Yang2017-10-012-0/+1126
| | | | | | | | | | | | | | | | | | Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: rk3188: move sdram driver to driver/ramKever Yang2017-10-012-0/+954
| | | | | | | | | | | | | | | | | | Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: rk3399: move sdram driver to driver/ramKever Yang2017-10-012-0/+1239
| | | | | | | | | | | | | | | | | | Since we have CONFIG_RAM framwork and its driver folder, move the driver into it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: clk: Add rk3399 SARADC clock supportDavid Wu2017-10-011-1/+35
| | | | | | | | | | | | | | | | | | The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: clk: Add rk3368 SARADC clock supportDavid Wu2017-10-011-0/+32
| | | | | | | | | | | | | | | | | | The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: clk: Add rk3328 SARADC clock supportDavid Wu2017-10-011-1/+34
| | | | | | | | | | | | | | | | | | The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 10-bits width. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: clk: Add SARADC clock support for rk3288David Wu2017-10-011-0/+41
| | | | | | | | | | | | | | | | | | The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: clk: Add rv1108 SARADC clock supportDavid Wu2017-10-011-1/+32
| | | | | | | | | | | | | | | | | | The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 10-bits width. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | dm: adc: Add driver for Rockchip SARADCDavid Wu2017-10-013-0/+193
| | | | | | | | | | | | | | | | | | | | The ADC can support some channels signal-ended some bits Successive Approximation Register (SAR) A/D Converter, like 6-channel and 10-bit. It converts the analog input signal into some bits binary digital codes. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | dm: clk: add missing .priv_auto_alloc_size() for stm32f7Patrice Chotard2017-09-291-6/+7
| | | | | | | | | | | | | | | | | | Add missing .priv_auto_alloc_size() callback. Previously private struct stm32_clk was not allocate which leads to unpredictable behaviour Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | spi: davinci_spi: Add da830-spi support for DMAdam Ford2017-09-291-0/+1
| | | | | | | | | | | | | | | | The DM support is already in the driver, so add da830-spi to the compatible list. Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Adam Ford <aford173@gmail.com>
* | mmc: sdhci-cadence: set timing mode register depending on frequencyMasahiro Yamada2017-09-291-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMC framework in U-Boot does not support a systematic API for timing switch like mmc_set_timing() in Linux. U-Boot just provides a hook to change the clock frequency via mmc_set_clock(). It is up to drivers if additional register settings are needed. This driver needs to set a correct timing mode into a register when it migrates to a different speed mode. Only increasing clock frequency could result in setup/hold timing violation. The timing mode should be decided by checking MMC_TIMING_* like drivers/mmc/host/sdhci-cadence.c in Linux, but "timing" is not supported by U-Boot for now. Just use mmc->clock to decide the timing mode. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | mmc: uniphier-sd: Add vqmmc regulator supportMarek Vasut2017-09-291-0/+13
| | | | | | | | | | | | | | | | | | | | Add initial support for setting the vqmmc regulator. Since we do not support 1V8 modes, set the regulator to 3V3 and enable it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | mmc: uniphier-sd: Update the file to match V3 patchsetMarek Vasut2017-09-291-41/+42
| | | | | | | | | | | | | | | | | | | | | | Old version of the uniphier-sd 64bit IO support patchset V1 was applied by the maintainer, update the uniphier-sd.c with the changes from the V3 of the patchset. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | mmc: Add MMC support for stm32h7 SocsPatrice Chotard2017-09-283-0/+617
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SD/MMC support for STM32H7 SoCs. Here is an extraction of SDMMC main features, embedded in STM32H7 SoCs. The SD/MMC block include the following: _ Full compliance with MultiMediaCard System Specification Version 4.51. Card support for three different databus modes: 1-bit (default), 4-bit and 8-bit. _ Full compatibility with previous versions of MultiMediaCards (backward compatibility). _ Full compliance with SD memory card specifications version 4.1. (SDR104 SDMMC_CK speed limited to maximum allowed IO speed, SPI mode and UHS-II mode not supported). _ Full compliance with SDIO card specification version 4.0. Card support for two different databus modes: 1-bit (default) and 4-bit. (SDR104 SDMMC_CK speed limited to maximum allowed IO speed, SPI mode and UHS-II mode not supported). _ Data transfer up to 208 Mbyte/s for the 8 bit mode. (depending maximum allowed IO speed). _ Data and command output enable signals to control external bidirectional drivers. The current version of the SDMMC supports only one SD/SDIO/MMC card at any one time and a stack of MMC Version 4.51 or previous. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* usb: dwc2: Align size of invalidating dcache before starting DMASeung-Woo Kim2017-09-271-1/+2
| | | | | | | | | | | | During using dwc2 usb gadget, if usb message size is too small, following cache misaligned warning is shown: CACHE: Misaligned operation at range [bfdbcb00, bfdbcb04] Align size of invalidating dcache before starting DMA to remove the warning. Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
* usb: kbd: Set a default polling mechanism for USB keyboardBin Meng2017-09-271-1/+1
| | | | | | | | | The choice of "USB keyboard polling" cannot be optional as without one mechanism being set, it just doesn't work. Set the default one to CONFIG_SYS_USB_EVENT_POLL. Fixes: ecad7051 ("configs: Migrate all of the existing USB symbols, except fastboot") Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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