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* watchdog: Handle timer wrap aroundChris Packham2020-03-161-1/+2
| | | | | | | | | | | | | | On some platforms/architectures the value from get_timer() can wrap. This is particularly problematic when long-running code needs to measure a time difference as is the case with watchdog_reset() which tries to avoid tickling the watchdog too frequently. Use time_after() from time.h instead of a plain > comparison to avoid any issues with the time wrapping on a system that has been sitting in u-boot for a long time. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* watchdog: Align Kconfig propertiesMichal Simek2020-03-131-28/+28
| | | | | | | | | Just cleanup help indentation to be the same for all options. It means <tab><space><space> indentation. OMAP3 should be indented by tabs which is also fixed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* serial: mcfuart: renaming to a more appropriate nameAngelo Durgehello2020-03-132-1/+1
| | | | | | | All drivers seems to align now to serial_xxx maning, so, aligning also this driver, to allow to be found easily. Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
* serial: mcfuart: fix uart port indexAngelo Durgehello2020-03-131-2/+2
| | | | | | | | Actually, using dev->seq value before probe to deduce the current serial port index leads to reading an invalid seq value (-1). So, getting dev->seq at probe time. Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
* Merge tag 'efi-2020-04-rc4-3' of ↵WIP/12Mar2020Tom Rini2020-03-123-2/+136
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-04-rc4 (3) This pull request provides the hardware RNG driver for Amlogic systems needed for the EFI_RNG_PROTOCOL. Furthermore bug fixes are provided: * correct an error message in the efidebug command * correct an error in the 'efidebug rm' command * remove an unnecessary assignment in efi_queue_event()
| * drivers/rng: add Amlogic hardware RNG driverHeinrich Schuchardt2020-03-113-0/+129
| | | | | | | | | | | | | | | | Add support for the hardware random number generator of Amlogic SOCs. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
| * drivers/rng: simplify KconfigHeinrich Schuchardt2020-03-111-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | For all sandbox systems with DM_RNG we enable RNG_SANDBOX. So we can simply set the default to yes. All rng drivers depend on DM_RNG. Use a single 'if' instead of individual dependencies. Now 'make menuconfig' shows the individual drivers neatly indented under the DM_RNG entry. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
* | Merge tag 'mmc-2020-3-9' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcWIP/10Mar2020Tom Rini2020-03-1010-60/+359
|\ \ | |/ |/| | | | | | | | | - DM support for CAxxxx SoCs - eMMC board for presidio-asic - Add defer probe for mmc sdhci - TI SoCs mmc misc update
| * mmc: am654_sdhci: Implement workaround for card detectFaiz Abbas2020-03-091-41/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 4 bit MMC controllers have an internal debounce for the SDCD line with a debounce delay of 1 second. Therefore, after clocks to the IP are enabled, software has to wait for this time before it can power on the controller. Add a deferred_probe() callback which polls on sdcd for a maximum of 2 seconds before switching on power to the controller or (in the case of no card) returning a ENOMEDIUM. This pushes the 1 second wait time to when the card is actually needed rather than at every probe() making sure that users who don't insert an SD card in the slot don't have to wait such a long time. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * mmc: am654_sdhci: Update output tap delay writesFaiz Abbas2020-03-091-9/+61
| | | | | | | | | | | | | | | | | | | | With the latest RIOT, there is a different otap delay value for each speed mode. Add a new binding with every supported speed mode. Also disable a given speed mode in the host caps if its corresponding otap-del-sel is not present. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * mmc: Merge SD_LEGACY and MMC_LEGACY bus modesFaiz Abbas2020-03-094-12/+7
| | | | | | | | | | | | | | | | | | MMC_LEGACY & SD_LEGACY are not differentiated timings in the spec and don't have any meaningful differences. Therefore, get rid of all references to SD_LEGACY and use MMC_LEGACY to mean both of them. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * sdhci: Add sdhci_deferred_probe() APIFaiz Abbas2020-03-091-0/+15
| | | | | | | | | | | | | | | | | | Add the sdhci_deferred_probe() function to register as the deferred_probe() callback to the mmc core. It will in turn call the deferred_probe() callback of the platform drivers as declared in the sdhci_ops. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
| * mmc: Add a deferred_probe() APIFaiz Abbas2020-03-092-1/+18
| | | | | | | | | | | | | | Add a deferred_probe() API for platforms that want to do some configurations just before starting to enumerate the device. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
| * mmc: ca_dw_mmc: add DesignWare based DM support for CAxxxx SoCsArthur Li2020-03-093-0/+193
| | | | | | | | | | | | | | Initial DesignWare based DM support for Cortina Access CAxxxx SoCs. Signed-off-by: Arthur Li <arthur.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
* | power-domain: fix hang in endless loop on i.MX8Anatolij Gustschin2020-03-101-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently when booting the kernel on i.MX8 U-Boot hangs in an endless loop when switching off dma, connectivity or lsio power domains during device removal. It hapens first when removing gpio0 (gpio@5d080000) device, here its power domain device 'lsio_gpio0' is obtained for switching off power. Since the obtained 'lsio_gpio0' device is removed afterwards, its power domain is also switched off and here the parent power domain device 'lsio_power_domain' is optained for switching off the power. Thereafter, when the obtained 'lsio_power_domain' is removed, device_remove() removes its first child 'lsio_gpio0'. During this child removal the 'lsio_power_domain' device is obtained again for switching and when removing it later, the same child removal is repeated, so we are stuck in an endless loop. Below is a snippet from dm tree on i.MX8QXP for better illustration of the DM devices relationship: Class Index Probed Driver Name ----------------------------------------------------------- root 0 [ + ] root_driver root_driver ... simple_bus 0 [ + ] generic_simple_bus |-- imx8qx-pm power_doma 0 [ + ] imx8_power_domain | |-- lsio_power_domain power_doma 1 [ + ] imx8_power_domain | | |-- lsio_gpio0 power_doma 2 [ + ] imx8_power_domain | | |-- lsio_gpio1 Do not remove a power domain device if it is a parent of the currently controlled device. Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device removal") Signed-off-by: Anatolij Gustschin <agust@denx.de> Reported-by: Oliver Graute <oliver.graute@gmail.com> Reported-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Fabio Estevam <festevam@gmail.com>
* | Merge tag 'u-boot-imx-20200310' of ↵Tom Rini2020-03-101-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2020.04 ----------------- - DM : mx6sabresd - mx6ul_14x14_evk: fix video - mx8qxp; fix console for booting - sync DTS with kernel (imx6sx) - drop obsolete woodburn (mx35) Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/660550811
| * | serial_lpuart: make clock failure less verboseGiulio Benetti2020-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some device may enable CONFIG_CLK but not still support this clock in CC, so better use debug() in place of dev_warn() otherwise a lot of boards will throw useless dev_warn()s. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-netTom Rini2020-03-107-76/+955
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| * | net: phy: marvell: Unify 88E151x series phy_driverClemens Gruber2020-03-091-55/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PHY models of the Marvell 88E151x series are not reliably distinguishable by their uid / PHY identifiers. The 88E1510, 88E1512, 88E1514 and 88E1518 all have the same OUI and model number and bits 3:0 in the PHY Identifier 2 (Page 0, Reg 3) are described as HW revision number, but both 88E1510 and 88E1518 PHYs were observed with the same HW rev number (1). Before commit 83cfbeb0df9f ("net: phy: Fix mask so that we can identify Marvell 88E1518"), the 88E151x were detected because the HW revision bits were masked from the uid. After that change, 88E1510/12/18 were all detected as 88E1518 and the 88E1510 specific code was no longer run. I modified the mask to again ignore all four HW revision bits, removed the 88E1510 specific code (board-specific LED/INTn setup), which was not called since late 2016 anyway and renamed the config function and phy_driver struct to the better fitting 88e151x. The uid and mask bits 3:0 are now again the same as in the Linux kernel. Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
| * | net: phy: dp83867: Add SGMII mode type switchingMichal Simek2020-03-091-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds ability to switch beetween two PHY SGMII modes. Some hardware, for example, FPGA IP designs may use 6-wire mode which enables differential SGMII clock to MAC. Patch description, dt flags have been done in mainline Linux by commit a2111c460c0c ("net: phy: dp83867: Add documentation for SGMII mode type") and by commit 507ddd5c0d47 ("net: phy: dp83867: Add SGMII mode type switching") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: Fix overlong PHY timeoutAndre Przywara2020-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 27c3f70f3b50 ("net: phy: Increase link up delay in genphy_update_link()") increased the per-iteration waiting time from 1ms to 50ms, without adjusting the timeout counter. This lead to the timeout increasing from the typical 4 seconds to over three minutes. Adjust the timeout counter evaluation by that factor of 50 to bring the timeout back to the intended value. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Fixes: net: phy: Increase link up delay in genphy_update_link() ("27c3f70f3b50") Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Matthias Brugger <mbrugger@suse.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | drivers: net: phy: aquantia: make it less verboseAlex Marginean2020-03-091-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | The driver now unconditionally prints some information that's not universally useful. Replace printf with debug. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | drivers: net: phy: aquantia: drop XGMII as a valid system interface protoAlex Marginean2020-03-091-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use either USXGMII or XFI in aquantia_set_proto and drop XGMII as a valid protocol configuration. The PHY doesn't support it, it's just used as an alias for one of the other two protocols. Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com> Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | phy: Include NC-SI in phy setupSamuel Mendoza-Jonas2020-03-091-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add NC-SI to the usual phy handling. This makes two notable changes: - Somewhat similar to a fixed phy, phy_connect() will create an NC-SI phy if CONFIG_PHY_NCSI is defined. - An early return is added to phy_read() and phy_write() to handle a case like the NC-SI phy which does not define a bus. Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | phy: Add support for the NC-SI protocolSamuel Mendoza-Jonas2020-03-093-0/+902
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces support for the NC-SI protocol, modelled as a phy driver for other ethernet drivers to consume. NC-SI (Network Controller Sideband Interface) is a protocol to manage a sideband connection to a proper network interface, for example a BMC (Baseboard Management Controller) sharing the NIC of the host system. Probing and configuration occurs by communicating with the "remote" NIC via NC-SI control frames (Ethernet header 0x88f8). This implementation is roughly based on the upstream Linux implementation[0], with a reduced feature set and an emphasis on getting a link up as fast as possible rather than probing the full possible topology of the bus. The current phy model relies on the network being "up", sending NC-SI command frames via net_send_packet() and receiving them from the net_loop() loop (added in a following patch). The ncsi-pkt.h header[1] is copied from the Linux kernel for consistent field definitions. [0]: https://github.com/torvalds/linux/tree/master/net/ncsi [1]: https://github.com/torvalds/linux/blob/master/net/ncsi/ncsi-pkt.h Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()Wolfgang Wallner2020-03-051-12/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the ofdata_to_platdata() method calls dev_read_addr_pci(), which potentially accesses the parent PCI bus. If this happens before the parent PCI bus is probed the resulting address will be wrong. This behavior was triggered by commit 82de42fa1468 ("dm: core: Allocate parent data separate from probing parent"). According to a comment in drivers/pci/pci-uclass.c [1] accessing the PCI parent bus in ofdata_to_platdata() is not allowed, and the access should be moved to the probe() function. Move the call to dev_read_addr_pci() and the related handling of the 'addr' value from the ofdata_to_platdata() to its own function, which is then called from the probe() method. While moving the code, the comment /* try Processor Local Bus device first */ was dropped. It was initially added with commit 3db886a5bf38 ("serial: ns16550: Support ns16550 compatible pci uart devices") and later made obsolete with commit 33c215af4b9d ("dm: pci: Add a function to read a PCI BAR"). [1] Comment in drivers/pci/pci-uclass.c: "A common cause of this problem is that this function is called in the ofdata_to_platdata() method of @dev. Accessing the PCI bus in that method is not allowed, since it has not yet been probed. To fix this, move that access to the probe() method of @dev instead." Fixes: 82de42fa1468 ("dm: core: Allocate parent data separate from probing parent") Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> # Tested on Intel Galileo
* | x86: remove dead code in intel_clk_get_rate()Heinrich Schuchardt2020-03-051-4/+0
|/ | | | | | | | | | | If all branches of a switch statement have a return instruction, all subsequent lines are unreachable. Identified with cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-socfpgaWIP/04Mar2020Tom Rini2020-03-041-0/+1
|\ | | | | | | | | - ABB SECU board - Assorted minor fixes
| * rtc: m41t62: add compatible for m41st87Marek Vasut2020-03-011-0/+1
| | | | | | | | | | | | | | | | | | | | This adds a compatible string for m41st87. This ensures that this driver can be used for m41st87. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2020-03-042-12/+17
|\ \ | | | | | | | | | - DFU / Thor fixes
| * | gadget: f_thor: add missing line breaks for pr_err()Seung-Woo Kim2020-03-011-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | After the commit 9b643e312d52 ("treewide: replace with error() with pr_err()"), there are pr_err() usages without line break. Add missing line breaks for pr_err() used in f_thor. Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
| * | dfu: Reset timeout in case of DFU requestAndy Shevchenko2020-03-011-0/+5
| |/ | | | | | | | | | | | | | | | | | | In case dfu command is being executed with timeout option, the timer may expire in the middle of DFU operation. If there is DFU request coming, we may simple reset timeout value to prevent aborting of ongoing DFU operation. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Ferry Toth <ftoth@exalondelft.nl>
* | video: meson: keep power domain up after bootingAnatolij Gustschin2020-03-021-1/+1
| | | | | | | | | | | | | | | | | | Add driver flag to skip power domain disabling on device removal. Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device removal") Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Guillaume La Roque <glaroque@baylibre.com>
* | dm: core: Add a flag for power domain control on device removalAnatolij Gustschin2020-03-021-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | In various cases a power domain must stay enabled after device removal when booting OS (i.e. serial debug console or display). Add a flag to selectively skip switching off a power domain. Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device removal") Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge tag 'u-boot-stm32-20200203' of ↵WIP/02Mar2020Tom Rini2020-03-021-1/+1
|\ \ | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - convert stm32mp1 board documentation to rst format
| * | stm32mp1: rng: remove superfluous assignmentHeinrich Schuchardt2020-03-021-1/+1
| |/ | | | | | | | | | | | | | | We should not assign a value that is overwritten before use. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
* | Merge tag 'xilinx-for-v2020.04-rc4' of ↵Tom Rini2020-03-024-9/+36
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx fixes for v2020.04-rc4 - Fix link good bit handling in dp83867 - Rename generic Zynq defconfig - Fix zybo z7 low leve setup - Fix error path in zynq_gem driver and fix 64bit usage - Fix invalid clock name quieries for Versal - Fix zynq/zynqmp SPL low level configuration via DT selection
| * net: zynq: Free allocated buffers in case of errorMichal Simek2020-02-281-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | Driver probe function is called again and again in case of error. Malloc space is getting full which is is reported by: Insufficient RAM for page table: 0x15000 > 0x14000. Please increase the size in get_page_table_size() ### ERROR ### Please RESET the board ### The patch is freeing allocated buffers on error path to avoid panic. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: phy: dp83867: Clean force link good bitMichal Simek2020-02-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On Xilinx ZynqMP revA board initial value of PHYCR register is 0x5448 which means FORCE_LINK_GOOD is already setup. Origin code was doing write but the new code is doing read/modify/write and keep this bit untouched. That's why ethernet stop to work. The patch is cleaning this bit when PHYCR value is composed. Tested on Xilinx zcu102-revA and zcu104-rev1.0 boards. Fixes: 37d6265f2bfa ("net: phy: dp83867: refactor rgmii configuration") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
| * mtd: nand: Fix on-die ecc issues in arasan_nfc driverT Karthik Reddy2020-02-281-3/+8
| | | | | | | | | | | | | | | | | | | | Fixed wrong enumeration of nand_config structure. Added chip select function before reading the nand chip for maf/dev id's, without this unable to access id's from some of the micron chips. Also added a print statement to identify if a nand flash is using on-die ecc. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * versal: drivers: clk: Fix invalid clock name queriesRajan Vaja2020-02-281-0/+6
| | | | | | | | | | | | | | | | | | | | | | The clock driver makes EEMI call to get the name of invalid clk when executing versal_get_clock_info() function. This results in error messages. Added check for validating clock before saving clock attribute and calling versal_pm_clock_get_name() in versal_get_clock_info() function. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: zynq_gem: Use ulong instead of u32 data typeT Karthik Reddy2020-02-281-1/+1
| | | | | | | | | | | | | | | | | | | | flush_dcache_range() expects unsigned long in the arguments. Here u32 variable is unable to hold the higher address value when ddr mapped to higher addresses & flushing lower address dchache range instead which is unmapped causing to crash. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | watchdog: Don't select CONFIG_WATCHDOG and CONFIG_HW_WATCHDOG at the same timeChristophe Leroy2020-02-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 06985289d452 ("watchdog: Implement generic watchdog_reset() version") introduced an automatic selection of CONFIG_WATCHDOG by CONFIG_WDT. But for boards selecting CONFIG_HW_WATCHDOG, like boards have a powerpc 8xx, CONFIG_WATCHDOG shall not be selected as they are mutually exclusive. Make CONFIG_WATCHDOG dependent on !CONFIG_HW_WATCHDOG Fixes: 06985289d452 ("watchdog: Implement generic watchdog_reset() version") Cc: Stefan Roese <sr@denx.de> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Stefan Roese <sr@denx.de>
* | watchdog: mpc8xx: Revert the 8xx watchdog back to CONFIG_HW_WATCHDOGChristophe Leroy2020-02-282-2/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f3729ba6e7b2 ("watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup") switched the watchdog to CONFIG_WATCHDOG. But this is not compatible with the 8xx because it starts the watchdog HW timer at reset and must be serviced from the very beginning including while U-boot is executed in the firmware before relocation in RAM. Select CONFIG_HW_WATCHDOG and make hw_watchdog_reset() visible. Meanwhile, finalise the cleanup of arch/powerpc/cpu/mpc8xx/Kconfig by removing the lines put in comment in that commit, and also remove again the selection of CONFIG_MPC8xx_WATCHDOG which was removed by that commit and brought back by mistake by commit b3134ffbd944 ("watchdog: Kconfig: Sort entry alphabetically") Note that there was an 'imply WATCHDOG' in the original commit but it disappeared in the Kconfig alphabetical sorting, so no need to remove it here. Fixes: f3729ba6e7b2 ("watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup") Fixes: b3134ffbd944 ("watchdog: Kconfig: Sort entry alphabetically") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Cc: Stefan Roese <sr@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Stefan Roese <sr@denx.de>
* misc: k3_avs: Fix possible NULL pointer deferenceVignesh Raghavendra2020-02-261-0/+4
| | | | | | | | Its possible that k3_avs_priv is NULL because the driver may not have been probed yet. Therefore check if pointer is valid before dereferencing it. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* Revert "ata: fsl_ahci: Add sata DM support for Freescale powerpc socs"Peng Ma2020-02-253-1042/+0
| | | | | | | | | | | | | | This reverts commit 1ee494291880fd51ef0c5f7342e072bdb069d7ff. Commit 1ee494291880 ("ata: fsl_ahci: Add sata DM support for Freescale powerpc socs") introduced SCSI layer to call AHCI private API in order to support sata operations, In DM mode, This is not necessary for non-AHCI sata. So revert it and have already updated the driver itself to operate sata directly. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* Merge tag 'mmc-2-20-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini2020-02-2017-82/+103
|\ | | | | | | | | | | - sdhci: code clean-up and fix cache coherency problem - enable cache snooping on mpc830x - Fix build error when MMC_WRITE disabled
| * mmc: sdhci: fix missing cache invalidation after reading by DMAMasahiro Yamada2020-02-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver currently performs cache operation before the DMA start, but does nothing after the DMA completion. When reading data by DMA, the cache invalidation is needed also after finishing the DMA transfer. Otherwise, the CPU might read data from the cache instead of from the main memory when speculative memory read or memory prefetch occurs. Instead of calling the cache operation directly, this commit adds dma_unmap_single(), which performs cache invalidation internally, but drivers do not need which operation is being run. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: sdhci: use dma_map_single() instead of flush_cache() before DMAMasahiro Yamada2020-02-201-26/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, sdhci_prepare_dma() calls flush_cache() regardless of the DMA direction. Actually, cache invalidation is enough when reading data from the device. This is correctly handled by dma_map_single(), which mimics the DMA-API in Linux kernel. Drivers can be agnostic which cache operation occurs behind the scene. This commit also sanitizes the difference between the virtual address and the dma address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: sdhci: remove unneeded castsMasahiro Yamada2020-02-201-3/+2
| | | | | | | | | | | | | | | | | | host->mmc is already (struct mmc *). memalign() returns an opaque pointer, so there is no need for casting. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
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