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* watchdog: bcm6345: allow to use this driver on arm bcm6858Philippe Reynes2019-02-091-1/+1
| | | | | | | This IP is also used on some arm SoC, so we allow to use it on arm bcm6858 too. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* watchdog: bcm6345: switch to raw I/O functionsPhilippe Reynes2019-02-091-5/+5
| | | | | | | | | This driver is used on several big endian mips board. So we could use raw I/O function instead of forcing big endian access. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2019-02-0716-1792/+3765
|\ | | | | | | - SPI-NOR support
| * configs: Don't use SPI_FLASH_BAR as defaultVignesh R2019-02-071-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c, renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to not break functionality. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * mtd: spi: Add lightweight SPI flash stack for SPLVignesh R2019-02-075-263/+1116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a tiny SPI flash stack that just supports reading data/images from SPI flash. This is useful for boards that have SPL size constraints and would need to use SPI flash framework just to read images/data from flash. There is approximately 1.5 to 2KB savings with this. Based on prior work of reducing spi flash id table by Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * mtd: spi: Remove unused filesVignesh R2019-02-072-1548/+0
| | | | | | | | | | | | | | | | | | | | | | | | spi_flash and spi_flash_ids are no longer needed after SPI NOR migration. Remove them. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * mtd: spi: Switch to new SPI NOR frameworkVignesh R2019-02-078-282/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD layer. Fix up sf_dataflash to work in legacy way. And update sandbox to use new interfaces/definitions Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * mtd: spi: sf_probe: Add "jedec, spi-nor" compatible stringVignesh R2019-02-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Linux uses "jedec,spi-nor" as compatible string for JEDEC compatible SPI Flash device nodes. Therefore make U-Boot also to look for the same compatible string so that we can use Linux DTS files as is. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * mtd: spi: spi-nor-core: Add back U-Boot specific featuresVignesh R2019-02-071-3/+159
| | | | | | | | | | | | | | | | | | For legacy reasons, we will have to keep around U-Boot specific SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * mtd: spi: spi-nor-core: Add SFDP supportVignesh R2019-02-072-6/+637
| | | | | | | | | | | | | | | | | | | | | | | | Sync Serial Flash Discoverable Parameters (SFDP) parsing support from Linux. This allows auto detection and configuration of Flash parameters. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * mtd: spi: spi-nor-core: Add 4 Byte addressing supportVignesh R2019-02-071-0/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync changes from Linux SPI NOR framework to add 4 byte addressing support. This is required in order to support flashes like MT35x that no longer support legacy Bank Address Register(BAR) way of accessing >16MB region. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * mtd: spi: spi-nor-core: Add SPI MEM supportVignesh R2019-02-071-4/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many SPI controllers have special MMIO interfaces which provide accelerated read/write access but require knowledge of flash parameters to make use of it. Recent spi-mem layer provides a way to support such controllers. Therefore, add spi-mem support to spi-nor-core as a way to support SPI controllers with MMIO interface. SPI MEM layer takes care of translating spi_mem_ops to spi_xfer()s in case of legacy SPI controllers. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * mtd: spi: Port SPI NOR framework from LinuxVignesh R2019-02-071-0/+1716
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not support 4 byte addressing opcodes, SFDP table parsing and different types of quad mode enable sequences. Many newer flashes no longer support BANK registers used by sf layer to a access >16MB of flash address space. So, sync SPI NOR framework from Linux v4.19 that supports all the above features. Start with basic sync up that brings in basic framework subsequent commits will bring in more features. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * spi: Add non DM version of SPI_MEMVignesh R2019-02-073-2/+108
| | | | | | | | | | | | | | | | | | | | | | | | Add non DM version of SPI_MEM to support easy migration to new SPI NOR framework. This can be removed once DM_SPI conversion is complete. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * spi: spi-mem: Claim SPI bus before spi mem accessVignesh R2019-02-071-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It is necessary to call spi_claim_bus() before starting any SPI transactions and this restriction would also apply when calling spi-mem operations. Therefore claim and release bus before requesting transfer via exec_op. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer sizeVignesh R2019-02-071-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Extend spi_mem_adjust_op_size() to take spi->max_write_size and spi->max_read_size into account. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
| * spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modesVignesh R2019-02-071-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | SPI controllers support all types of SPI modes including dual/quad bus widths. Therefore remove constraint wrt SPI mode from spi-mem layer. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* | Merge git://git.denx.de/u-boot-marvellTom Rini2019-02-054-336/+491
|\ \ | |/ |/| | | | | | | | | | | | | | | | | - Move Armada XP / 38x PCIe driver to DM_PCI from me - Move Armada XP / 38x LCD driver to DM_VIDEO from me - Add uDPU board (Armada-3720) from Vladimir [trini: Fix warning in pci-uclass.c by removing ret from pci_uclass_child_post_bind as it no longer calls functions with a return code to catch.] Signed-off-by: Tom Rini <trini@konsulko.com>II
| * video: Armada XP: Move driver to DM_VIDEOStefan Roese2019-02-051-129/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves the Armada XP video / LCD driver to DM_VIDEO. With this move, the legacy interface board_video_init() is removed from the theadorable board code (only user of this video driver). The support via DT will be added in a separate patch. This patch also enables DM_VIDEO for the theadorable board, as this is needed to not break git bisect'ability. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * pci: pci_mvebu: Add DM_PCI support and move CONFIG_PCI_MVEBU to defconfigStefan Roese2019-02-052-197/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DM_PCI support to the MVEBU PCIe driver. This is necessary, since all PCI drivers have to be moved to DM (driver model) until the v2019.07 release. To not break git bisect'ablility, this patch also moves CONFIG_PCI_MVEBU from config headers to the defconfig files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Mario Six <mario.six@gdsys.cc> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Phil Sutter <phil@nwl.cc> Cc: Marek Behún <marek.behun@nic.cz> Cc: VlaoMao <vlaomao@gmail.com>
| * pci: Add pci_get_devfn() to extract devfn from the fdt_pci_addrStefan Roese2019-02-051-9/+19
|/ | | | | | | | | | This function will be used by the Marvell Armada XP/38x PCIe driver, which is moved to DM right now. So let's extract the functionality from pci_uclass_child_post_bind() to make it available. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge tag 'for-master-20190201' of git://git.denx.de/u-boot-rockchipTom Rini2019-02-0232-6480/+2936
|\ | | | | | | | | | | | | | | u-boot-rockchip changes for 2019.04-rc1: * support for Chromebook Bob * full pinctrl driver using DTS properties * documentation improvements * I2S support for some Rockchip SoCs
| * pinctrl: Kconfig: fix missing include of rockchip/KconfigPhilipp Tomsich2019-02-011-0/+1
| | | | | | | | | | | | | | | | After the merge of the new, generic pinctrl-code, the include for rockchip/Kconfig was missing. Add it here, so we can select the pinctrl-driver for SPL. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * pinctrl: Kconfig: sort includes alphabeticallyPhilipp Tomsich2019-02-011-5/+5
| | | | | | | | | | | | | | | | To make adding new subdirectories easier, let's enforce alphabetical ordering of the includes of Kconfig files in the respective subdirectories. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: Implement spl_gpio in the GPIO driverSimon Glass2019-02-011-0/+46
| | | | | | | | | | | | | | | | | | Allow rockchip boards to use GPIOs before driver model is ready. This is really only useful for setting GPIOs to enable the early debug console, if needed on some platforms. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: clk: Add mention of four new clocksSimon Glass2019-02-011-0/+12
| | | | | | | | | | | | | | | | These clocks are needed to get MMC running. We don't actually support setting them yet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * clk: Improve debug message in clk_set_default_rates()Simon Glass2019-02-011-2/+2
| | | | | | | | | | | | | | | | | | It is helpful to print the clock number as well as the index, so that this can be looked up in the binding file. Update the debug() statement to do this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * pinctrl: rockchip: Clean the unused rockchip pinctrl driversDavid Wu2019-02-019-6387/+0
| | | | | | | | | | | | | | | | | | | | | | If we used the pinctrl-rockchip driver, these code is not needed, so remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * pinctrl: rockchip: Add common rockchip pinctrl driverDavid Wu2019-02-0115-100/+2531
| | | | | | | | | | | | | | | | | | | | Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: Add a sound driverSimon Glass2019-02-012-1/+133
| | | | | | | | | | | | | | | | Add a sound driver for rk3288 supporting chromebook_jerry. This uses the I2S driver, and existing audio codec and the clock/pinmux support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: Add an I2S driverSimon Glass2019-02-013-0/+159
| | | | | | | | | | | | | | | | | | Add a driver for I2S which allows audio data to be sent from the SoC to the audio codec. The sample rate and other settings are hard-coded for now as there is no suitable device-tree binding available. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: rk3288: Add i2s pinctrl and clock supportSimon Glass2019-02-012-0/+62
| | | | | | | | | | | | | | | | Add support for setting pinctrl and clock for I2S on rk3288. This allows the sound driver to operate. These settings were created by rkmux.py Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | Merge tag 'mips-pull-2019-02-01' of git://git.denx.de/u-boot-mipsTom Rini2019-02-0212-279/+1123
|\ \ | | | | | | | | | | | | | | | - MIPS: mscc: jr2: small fixes - MIPS: mscc: luton: add ethernet and switch driver - MIPS: mt76xx: fix timer frequency
| * | net: Add MSCC Luton networkd driver.Horatiu Vultur2019-02-013-0/+744
| | | | | | | | | | | | | | | | | | | | | Add network driver for Microsemi Ethernet switch, it is present on Luton SoCs. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
| * | net: mscc: Remove unused variablesHoratiu Vultur2019-02-011-13/+1
| | | | | | | | | | | | | | | | | | | | | Remove unused variables in the struct ocelot_private and make miim variable static. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
| * | net: mscc: Move mac_table_add function into different file.Horatiu Vultur2019-02-014-78/+107
| | | | | | | | | | | | | | | | | | | | | Move the function mac_table_add into a different file, so it can be reused. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
| * | net: mscc: Move ocelot_send and ocelot_recv in a different file.Horatiu Vultur2019-02-014-116/+175
| | | | | | | | | | | | | | | | | | | | | This functions can be reused by other MSCC SoCs therefore, make them more generic and move them in separate files. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
| * | net: mscc: Move miim commands into separate file.Horatiu Vultur2019-02-014-71/+88
| | | | | | | | | | | | | | | | | | | | | Move miim functions that can be shared in a different file inside mscc_eswitch. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
| * | net: mscc: Move ocelot_switch to mscc_eswitch folderHoratiu Vultur2019-02-015-7/+14
| | | | | | | | | | | | | | | | | | | | | Move file ocelot_switch to mscc_eswitch to prepare to add new net drivers for other MSCC SoCs. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
* | | regulator: pbias: Handle extended drain IO when changing omap36 PBIASAdam Ford2019-02-011-2/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP36 and DM37 TRM state to disable extneded drain IO before changing the PBIAS. This patch does this before pmic writes if the CONFIG_MMC_OMAP36XX_PINS flag is set and the cpu family is omap36xx Signed-off-by: Adam Ford <aford173@gmail.com>
* | | usb: ether: call _usb_eth_halt() if initialization failsJean-Jacques Hiblot2019-02-011-1/+4
| |/ |/| | | | | | | | | | | | | | | | | | | | | If the host does not respond in time, the initialization fails. However the usb ether driver will still be registered. This will make usb_gadget_probe_driver() fail the next time the initialization is attempted because it cannot find an available UDC. Fixing this by calling _usb_eth_halt() when the init fails. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Acked-by: Lukasz Majewski <lukma@denx.de>
* | Merge tag 'video-updates-for-2019.04-rc1' of git://git.denx.de/u-boot-videoTom Rini2019-01-312-5/+3
|\ \ | |/ |/| | | | | | | - ihs and imx driver fixes - relax EDID validation checks for 0 hsync/vsync pulse width (support some quirky displays)
| * ihs_video_out: Fix error handlingMario Six2019-01-281-3/+3
| | | | | | | | | | | | | | | | | | The ihs_video_out driver's error handling is incorrect in two places (one is a missing negation, and in one place a error should be ignored). Fix these two instances. Signed-off-by: Mario Six <mario.six@gdsys.cc>
| * videomodes: Relax EDID validation checks for hsync/vsync pulse widthPriit Laes2019-01-281-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current EDID detailed timing parser errors out when either horizontal or vertical pulse sync width is 0, thus not allowing a display with EDID listed below work properly. EDID below works ok within Linux although it warns about these two fields being 0. Therefore relax the checks a bit so we can actually use this the screen out of the box. Of-course, this display itself is somewhat quirky display with following anti-features: - HPD pin is not usable - although resolution is 640x480, only top 240 pixels are visible $ xxd -p display.edid 00ffffffffffff0005a1e00301000000150f0103800f05780a0f6ea05748 9a2610474f200000010101010101010101010101010101012a08804520e0 0b1020004000953600000018000000fd0034441a2403000a202020202020 0000001000310a20202020202020202020200000001000002a4030701300 782d1100001e006b $ edid-decode display.edid EDID version: 1.3 Manufacturer: AMA Model 3e0 Serial Number 1 Digital display Maximum image size: 15 cm x 5 cm Gamma: 2.20 RGB color display First detailed timing is preferred timing Display x,y Chromaticity: Red: 0.6250, 0.3398 Green: 0.2841, 0.6044 Blue: 0.1494, 0.0644 White: 0.2802, 0.3105 Established timings supported: 640x480@60Hz 4:3 HorFreq: 31469 Hz Clock: 25.175 MHz Standard timings supported: Detailed mode: Clock 20.900 MHz, 149 mm x 54 mm 640 672 672 709 hborder 0 480 484 484 491 vborder 0 -hsync -vsync VertFreq: 60 Hz, HorFreq: 29478 Hz Monitor ranges (GTF): 52-68Hz V, 26-36kHz H, max dotclock 30MHz Dummy block Dummy block Checksum: 0x6b (valid) Signed-off-by: Priit Laes <priit.laes@paf.com> Signed-off-by: Priit Laes <plaes@plaes.org>
* | video: Add Meson Video Processing Unit DriverNeil Armstrong2019-01-3116-0/+5373
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds video output support for Amlogic GXBB/GXL/GXM chips. The supported ports are CVBS and HDMI (based on DW_HDMI). When using HDMI, only DMT modes are supported. There is support for simple-framebuffer (CONFIG_VIDEO_DT_SIMPLEFB) Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> [narmstrong: fixed defines alignment in meson_canvas.c] Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | video: dw_hdmi: add support for color conversionJorge Ramirez-Ortiz2019-01-311-1/+252
| | | | | | | | | | | | | | | | | | | | | | | | | | Some IPs like the meson VPU can only feed a particular pixel format to dw_hdmi. As of now, the driver is hardcoded to use RGB888 as input. This commit enables different pixel format inputs, with the appropriate CSC configuration. Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | video: dw_hdmi: support SoC specific read/write opsJorge Ramirez-Ortiz2019-01-311-2/+12
| | | | | | | | | | | | | | | | | | | | | | Some IPs like the meson VPU have a specific way to write to dw_hdmi registers. Make it configurable. Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com> [added commit description] Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | power: domain: meson-gx-pwrc-vpu: add missing dependsMaxime Jourdan2019-01-311-1/+1
| | | | | | | | | | | | | | | | MESON_GX_VPU_POWER_DOMAIN should depend on POWER_DOMAIN. Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | dfu: mmc: call fs functions instead of run_commandSimon Goldschmidt2019-01-301-36/+31
| | | | | | | | | | | | | | | | | | | | | | | | This unbreaks dfu mmc_file_op which is currently broken since using the load cmd on a buffer from heap is not allowed - added with commit aa3c609e2be5 ("fs: prevent overwriting reserved memory") Fixes: commit aa3c609e2be5 ("fs: prevent overwriting reserved memory") Reported-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <lukma@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2019-01-3013-7/+149
|\ \ | | | | | | | | | - Enable DM_MMC support
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