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* rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOODTrevor Woerner2020-05-158-13/+13
| | | | | | | | Have this symbol follow the pattern of all other such symbols. This patch also removes a TODO from the code. Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
* rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5XTrevor Woerner2020-05-156-6/+6
| | | | | | | Have this symbol follow the pattern of all other such symbols. This patch removes a TODO from the code. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
* Merge tag 'u-boot-stm32-20200514' of ↵WIP/14May2020Tom Rini2020-05-145-15/+42
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - stm32mp1: migrate MTD and DFU configuration in Kconfig - stm32mp1: add command stm32prog - stm32mp1: several board and arch updates - stm32mp1: activate data cache in SPL and before relocation - Many improvment for AV96 board and DHCOR SoM (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM) - clk: stm32mp1: fix CK_MPU calculation - DT alignment of stm32mp1 device tree with Linux 5.7-rc2
| * clk: stm32mp1: fix CK_MPU calculationLionel Debieve2020-05-141-3/+4
| | | | | | | | | | | | | | | | | | When the CK_MPU used PLL1_MPUDIV, the current rate is wrong. The clock must use stm32mp1_mpu_div as a shift value. Fix the check value used to enter PLL_MPUDIV. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * mmc: stm32_sdmmc2: change the displayed config namePatrick Delaunay2020-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the mmc displayed name in U-Boot for stm32_sdmmc2 driver to “STM32 SD/MMC”. This stm32_sdmmc2 driver is for version 2 of the ST HW IP SDMMC but the displayed name "STM32 SDMMC2" is confusing for user, between the instance of SDMMC and the device identifier of MMC. For example on EV1 board, we have: STM32MP1> mmc list STM32 SDMMC2: 0 (SD) STM32 SDMMC2: 1 (eMMC) Changed to more clear: STM32MP1> mmc list STM32 SD/MMC: 0 (SD) STM32 SD/MMC: 1 (eMMC) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * gpio: stm32: support gpio ops in SPLPatrick Delaunay2020-05-141-6/+1
| | | | | | | | | | | | | | | | | | The GPIO support is needed in SPL to managed the SD cart detect used on stm32mp157c-ev1 and dk2 board. So this patch activates the associated code in stm32_gpio.c. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * usb: gadget: g_dnl: add function g_dnl_set_productPatrick Delaunay2020-05-141-0/+8
| | | | | | | | | | | | | | | | | | | | | | Add a function g_dnl_set_product to change the Product string used in USB enumeration in any command based on download gadget. If the function is called with NULL pointer, the product string is set to the default value (product[] = "USB download gadget"). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * ram: stm32mp1: Add support for multiple configsMarek Vasut2020-05-141-5/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for multiple DRAM configuration subnodes, while retaining the support for a single flat DRAM configuration node. This is useful on systems which can be manufactured in multiple configurations and where the DRAM configuration can be determined at runtime. The code is augmented by a function which can be overridden on board level, allowing a match on the configuration node name, very much like the fitImage configuration node name matching works. The default match is on the single top-level DRAM configuration, if matching on subnodes is required, then this board_stm32mp1_ddr_config_name_match() must be overridden. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
* | Merge tag 'rpi-next-2020.07' of ↵Tom Rini2020-05-144-25/+30
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi - fix phy configuration for RPi4's bcmgenet - sync RPi4's env size with other RPi configs - add kconfig option to reserver more pages in the EFI mem map - add support for SDMA which is used by RPi4 - fix corner case boot bug for RPi3 32-bit
| * | mmc: sdhci: Use debug for not supported SDMA info messageMatthias Brugger2020-05-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_MMC_SDHCI_SDMA is enabled but the HW could not support it, we no longer error out. Instead we do not enable it in the host. Change the output from printf to debug as this isn't an error but only additional information now. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
| * | mmc: sdhci: not return error when SDMA is not supportedJaehoon Chung2020-05-121-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If Host controller doesn't support SDMA, it doesn't need to return error. Because it can be worked with PIO mode. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
| * | mmc: sdhci: use phys2bus macro when dma address is accessedJaehoon Chung2020-05-121-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use phys2bus macro when dma address is accessed. Some targets need to use pyhs2bus macro. (e.g, RPI4) After applied it, SDMA mode can be used. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
| * | arm: bcm283x: serial: Move ofdata reading to probe() methodSimon Glass2020-05-122-16/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We cannot rely on a parent bus that needs to be probed, until we know that it is probed. That means that code in the ofdata_to_platdata() method cannot rely on the parent bus being probed. Move the ofdata code in the two serial drivers into a probe() method. This fixes serial output on rpi_3b_32b with the following config.txt options: enable_uart=1 gpu_freq=250 Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
| * | net: bcmgenet: Don't set ID_MODE_DIS when not using RGMIINicolas Saenz Julienne2020-05-121-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is RGMII. Don't enable it for the rest of setups. This has been seen to misconfigure RPi4's PHY when booting Linux. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* | | CLK: ARC: HSDK: add separate clock map for HSDK-4xDEugeniy Paltsev2020-05-132-11/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HSDK and HSDK-4xD clock trees are slightly different. commit 1dfb2ec0d7fb ("ARC: HSDK: CGU: add support for timer clock") introduce regression for HSDK board cause crash when setting tunnel clock. Fix that. Fixes: 1dfb2ec0d7fb ("ARC: HSDK: CGU: add support for timer clock") Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | | CLK: ARC: HSDK: define clock map with DT binding constantsEugeniy Paltsev2020-05-131-27/+29
| | | | | | | | | | | | | | | | | | | | | | | | Define clock map with DT binding constants so clock map can be discontinuous. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | | CLK: ARC: HSDK: make set_clock optionalEugeniy Paltsev2020-05-131-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | We don't want to allow change some clocks, i.e. DDR clock. So allow to have set_clock to be unset in clock map. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | | CLK: ARC: HSDK: prepare for multiple clock maps supportEugeniy Paltsev2020-05-131-7/+20
| | | | | | | | | | | | | | | | | | | | | | | | The clock trees of HSDK and HSDK-4xD vary so we need to prepare CGU driver for multiple clock maps support. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | | CLK: ARC: HSDK: driver cleanupEugeniy Paltsev2020-05-131-36/+39
| | | | | | | | | | | | | | | | | | | | | Minor code cleanup to improve readability. No functional change intended. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | | CLK: ARC: HSDK: use appropriate config data typesEugeniy Paltsev2020-05-131-20/+21
| | | | | | | | | | | | | | | | | | | | | | | | * constify clocks config data where is possible * use more appropriate data types for clocks config Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | | CLK: ARC: HSDK: drop unused offsetEugeniy Paltsev2020-05-131-29/+28
| | | | | | | | | | | | | | | | | | | | | | | | Drop creg_div_oft offset as it doesn't vary (due to it is used for CPU PLL only). Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | | CLK: ARC: HSDK: avoid code duplicationEugeniy Paltsev2020-05-131-72/+40
| |/ |/| | | | | | | | | | | | | | | hsdk_axi_clk_cfg and hsdk_tun_clk_cfg clock divider structures and functions for their processing are almost the same so merge them to avoid code duplication. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usbWIP/12May2020Tom Rini2020-05-123-0/+8
|\ \ | | | | | | | | | - Two DWC3 fixes
| * | usb: dwc3: Add versal compatibility string to dwc3 glue idsSiva Durga Prasad Paladugu2020-05-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Xilinx Versal platform uses dwc3 and hence its compatible string needs to be added to dwc3 glue ids. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | usb: dwc3: add dis_del_phy_power_chg_quirkJagan Teki2020-05-122-0/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit, which specifies whether disable delay PHY power change from P0 to P1/P2/P3 when link state changing from U0 to U1/U2/U3 respectively. Reference from below Linux commit, commit <00fe081dc3a3> ("usb: dwc3: add dis_del_phy_power_chg_quirk") Cc: Marek Vasut <marex@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | Merge tag 'u-boot-amlogic-20200511' of ↵Tom Rini2020-05-121-0/+15
|\ \ | |/ |/| | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - Enable USB Host for Odroid-C2 board - Add Open-Drain/Open-Source emulation in GPIO uclass
| * gpio: emulate open drain & open source in dm_gpio_set_value()Neil Armstrong2020-05-111-0/+15
| | | | | | | | | | | | | | | | | | | | | | Handle the GPIOD_OPEN_DRAIN & GPIOD_OPEN_SOURCE flags to emulate open drain and open source by setting the GPIO line as input depending on the requested value. The behaviour is taken from the Linux gpiolib. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge tag 'ti-v2020.07-rc2' of ↵Tom Rini2020-05-112-4/+8
|\ \ | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix boot issues on Nokia RX-51 - Configure AM6 CPSW for 10Mbps in rgmii mode. - Minor changes for J721e
| * | video: omap: change include orderDario Binacchi2020-05-111-4/+4
| | | | | | | | | | | | | | | | | | | | | Apply u-boot coding style on include files order as described by the wiki https://www.denx.de/wiki/U-Boot/CodingStyle. Signed-off-by: Dario Binacchi <dariobin@libero.it>
| * | net: ethernet: ti: am65-cpsw-nuss: enable 10Mbps link speed in rgmii modeMurali Karicheri2020-05-091-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | In RGMII mode the 10Mbps link speed is supported only when CPSW2G MAC SL is configured for External Control ("in band") mode CPSW_PN_MAC_CONTROL_REG.CTL_EN(18) = 1 Hence update am65_cpsw_update_link() to follow documentation. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
* | Merge tag 'u-boot-imx-20200511' of ↵Tom Rini2020-05-1128-155/+1541
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2020.07 ---------------- - i.MX NAND and nandbxb for i.MX8M - imx8MM : new beacon devkit - imx8MQ : new pico-imx8MQ - imx8QXP : extend to enable M4, fixes - add thermal support - caches in SPL (missing board) - Fixes Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/685391011
| * | imx: imx8qm/imx8qxp: Power down the resources before SPL jump to u-bootPeng Fan2020-05-101-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure that all devices that are powered up by SPL are powered down before entering into the u-boot. Otherwise the subsystem/device will never be powered down by SCFW, due to SPL and u-boot are in different partitions. Benefiting from power domain driver, this patch implements the function "imx8_power_off_pd_devices" to power off all active devices. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | mtd: nand: raw: mxs_nand changes for nandbcbHan Xu2020-05-101-3/+40
| | | | | | | | | | | | | | | | | | | | | Add more BCH setting mode and remove the unnecessary platform constrain Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | imx8: Replace SC_R_LAST with SC_R_NONE in DTBLeonard Crestez2020-05-101-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are currently using SC_R_LAST as a marker for imx8 power domain tree nodes without a resource attached. This value is compiled into dtb as part of the linux build and used by uboot. The SC_R_LAST constant changes frequently as SCFW resources are added (by design) and every time we need to update linux and uboot headers together or boot can fail. Fix this by replacing SC_R_LAST usage with a new constant SC_R_NONE defined to be 0xFFF0. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | power: imx8: Check owned resource in power onYe Li2020-05-101-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When fspi is assigned to M4, we have to let the fspi probe failed when its power domain is failed to power up. Because not all devices have power domain (for example, external devices on the board). Current checking resource owner in power domain probe is not good, change to check it in power on. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | power: imx8: remove the resource owned check before power offPeng Fan2020-05-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For all the devices used and set ACTIVE in U-Boot, U-Boot needs to power off all of them without the check of resource owner. When we create software partition before booting Linux, the resource own checkw will return false, and cause the power domain not powered off. If without the check of resource owner, the power domain in the other software partition could be powered off with parent partition could access child partition resources. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | power: imx8-power-domain: Set DM_FLAG_DEFAULT_PD_CTRL_OFF flagYe Li2020-05-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If without this flag, calling dev_power_domain_ctrl will iteratively remove the power domain device will causes iteratively power off parent PD. This is not expected by imx8-power-domain-legacy driver. Power off parent PD is controlled by the driver internally. So set DM_FLAG_DEFAULT_PD_CTRL_OFF to avoid such issue Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | imx8: power: Add PD device lookup interface to power domain uclassPeng Fan2020-05-101-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add power_domain_lookup_name interface to power domain uclass to find a power domain device by its DTB node name, not using its associated client device. Through this interface, we can operate the power domain devices directly. This is needed for non-DM drivers. Modified from Ye's NXP downstream patch only for legacy imx8 power domain driver, since we have not migrated to use new power domain driver. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | nand: enable the Randomizer module for i.mx7 and i.mx8Alice Guo2020-05-101-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | To enable the Randomizer module, set GPMI_ECCCTRL[RANDOMIZER_ENABLE] to 1, then set GPMI_ECCCOUNT[RANDOMIZER_PAGE] to select randomizer page number needed to be randomized. Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | mxs_nand: don't check zero count when ECC reading with randomizerHan Xu2020-05-101-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | When enabled randomizer during ECC reading, the controller reported it's erased page. Checking zero count will cause data get modified to all 0xFF. Stop checking during randomizer to workaround this issue. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | MXS_NAND: Add clock support for iMX8Ye Li2020-05-101-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | Since iMX8 has enabled clock uclass, we can parse the clocks from DTB and enable them in GPMI driver. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | mtd: nand: support GPMI NAND driver for i.MX8Peng Fan2020-05-105-16/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable the GPMI NAND driver for i.MX8, i.MX8 use similar controller as i.MX8M - register definition for i.mx8 - DMA structure must be 32bit address Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | nand: mxs_nand: make imx8mm can use hardware BCH and randomizerAlice Guo2020-05-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | imx8mm needs to BCH encode and set NAND page number needed to be randomized modify conditional compilation Use CONFIG_IMX8M, so it apply to imx8mq/mm/mn Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | mtd: mxs_nand: fix the gf_13/14 definition issueHan Xu2020-05-101-0/+2
| | | | | | | | | | | | | | | | | | | | | gf_13/14 mask was not set correctly in register definition. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | mtd: nand: mxs_nand: add i.MX6QP compatible stringHan Xu2020-05-101-0/+4
| | | | | | | | | | | | | | | | | | | | | add the dedicate compatible string for i.MX6QP Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | mxs_nand: Update compatible string for i.MX6SXYe Li2020-05-101-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | The iMX6SX uses compatible string "fsl,imx6sx-gpmi-nand" for gpmi node in DTS, so update the driver for the string Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | nand: Update SPL MXS NAND mini driverYe Li2020-05-101-7/+34
| | | | | | | | | | | | | | | | | | | | | | | | Update the mini driver to add support for getting ecc info from ONFI and support read image data from page unaligned NAND address. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | mxs_nand: Add support for i.MX8MYe Li2020-05-104-9/+9
| | | | | | | | | | | | | | | | | | | | | Update the gpmi/apbh_dma/bch drivers and relevant registers for i.MX8M. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | nand: mxs: correct bitflip for erased NAND pagePeng Fan2020-05-101-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is a porting of http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/ commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38 " i.MX6QP and i.MX7D BCH module integrated a new feature to detect the bitflip number for erased NAND page. So for these two platform, set the erase threshold to gf/2 and if bitflip detected, GPMI driver will correct the data to all 0xFF. Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q with the one for i.MX6QP. " In this patch, i.MX6UL is added and threshold changed to use ecc_strength. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | nand: mxs: fix the bitflips for erased page when uncorrectable errorPeng Fan2020-05-101-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is porting from linux: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/ ?h=imx_4.1.15_1.0.0_ga&id=3d42fcece496224fde59f9343763fb2dfc5b0768 " We may meet the bitflips in reading an erased page(contains all 0xFF), this may causes the UBIFS corrupt, please see the log from Elie: ----------------------------------------------------------------- [ 3.831323] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.845026] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.858710] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.872408] UBI error: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read 16384 bytes ... [ 4.011529] UBIFS error (pid 36): ubifs_recover_leb: corrupt empty space LEB 27:237568, corruption starts at 9815 [ 4.021897] UBIFS error (pid 36): ubifs_scanned_corruption: corruption at LEB 27:247383 [ 4.030000] UBIFS error (pid 36): ubifs_scanned_corruption: first 6569 bytes from LEB 27:247383 ----------------------------------------------------------------- This patch does a check for the uncorrectable failure in the following steps: [0] set the threshold. The threshold is set based on the truth: "A single 0 bit will lead to gf_len(13 or 14) bits 0 after the BCH do the ECC." For the sake of safe, we will set the threshold with half the gf_len, and do not make it bigger the ECC strength. [1] count the bitflips of the current ECC chunk, assume it is N. [2] if the (N <= threshold) is true, we continue to read out the page with ECC disabled. and we count the bitflips again, assume it is N2. (We read out the whole page, not just a chunk, this makes the check more strictly, and make the code more simple.) [3] if the (N2 <= threshold) is true again, we can regard this is a erased page. This is because a real erased page is full of 0xFF(maybe also has several bitflips), while a page contains the 0xFF data will definitely has many bitflips in the ECC parity areas. [4] if the [3] fails, we can regard this is a page filled with the '0xFF' data. " Signed-off-by: Peng Fan <peng.fan@nxp.com>
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