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path: root/drivers/pinctrl/renesas/pfc.c
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* pinctrl: renesas: Implement get_pin_muxing() callbackLad Prabhakar2021-01-181-0/+25
| | | | | | | | Implement get_pin_muxing() callback so that pinmux status command can be used on Renesas platforms. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* pinctrl: renesas: Make sure the pin type is updated after setting the MUXLad Prabhakar2021-01-181-5/+47
| | | | | | | | | | | | | | | | | | | | | | | | By default on startup all the pin types are configured to PINMUX_TYPE_NONE (in sh_pfc_map_pins()), when pin is set as GPIO the pin type is updated to PINMUX_TYPE_GPIO. But the type is not updated when the pin is set as a function in sh_pfc_pinctrl_pin_set() or sh_pfc_pinctrl_group_set() calls (these calls only set the MUX if the pin type is PINMUX_TYPE_NONE ie unused). So with the current implementation pin functionality could be overwritten silently, for example if the same pin is added for SPI and serial. This patch makes sure of updating pin type after every successful call to sh_pfc_config_mux() and thus fixing from pin functionality to be overwritten. Also a warning message is printed if the current pin is being overwritten before abort. This also avoids pin re-muxing to same type that is for example from command line device is asked to re-probe/select (mmc dev x) we return early with success in this case as the pin is already muxed. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-131-1/+1
| | | | | | | | | | | | This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* pinctrl: renesas: Drop unused members from struct sh_pfc_pinctrlLad Prabhakar2020-11-221-4/+0
| | | | | | | Drop unused members from struct sh_pfc_pinctrl. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* pinctrl: renesas: r8a77951: Add R8A774E1 PFC supportBiju Das2020-11-221-0/+11
| | | | | | | | | | | | | Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951), however it doesn't have several automotive specific peripherals. Add a r8a77951 specific pin groups/functions along with common pin groups/functions for supporting both r8a77951 and r8a774e1 SoC. PFC changes are synced from mainline linux-5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* pinctrl: renesas: r8a77965: Add R8A774B1 PFC supportBiju Das2020-11-221-0/+11
| | | | | | | | | | | | | Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965), however it doesn't have several automotive specific peripherals. Add a r8a77965 specific pin groups/functions along with common pin groups/functions for supporting both r8a77965 and r8a774b1 SoC. PFC changes are synced from mainline linux-5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* Merge tag 'dm-pull-20jul20-take2a' of ↵Tom Rini2020-07-271-1/+1
|\ | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-dm binman support for FIT new UCLASS_SOC patman switch 'test' command minor fdt fixes patman usability improvements
| * treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada2020-07-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | pinctrl: renesas: Enable R8A774A1 PFC tablesAdam Ford2020-07-251-0/+11
|/ | | | | | | | | | The PFC tables for the R8A774A1 are already available, but they not enabled. This patch adds the Kconfig option and builds the corresponding file when PINCTRL_PFC_R8A774A1 is enabled. Signed-off-by: Adam Ford <aford173@gmail.com>
* Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini2020-07-241-1/+1
| | | | | | | | | | This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
* treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada2020-07-201-1/+1
| | | | | | | | | | | | | | | | | | | | When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* common: Drop linux/bitops.h from common headerWIP/2020-05-18-reduce-size-of-common.hSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/bug.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-051-0/+1
| | | | | | | | | | | | At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Require users of devres to include the headerSimon Glass2020-02-051-0/+1
| | | | | | | | | | At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* pinctrl: renesas: Add R8A77980 V3H PFC tablesMarek Vasut2019-08-091-0/+11
| | | | | | | Import R8A77980 V3H PFC tables from Linux 5.2.7 , commit 5697a9d3d55f. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: renesas: fix R-Car gpio0_00 operation fails with 'gpio -input' commandtitron2019-07-291-2/+2
| | | | | | | | | | Fix GPIO bank 0 pin 0 request/release off by one error. Without this patch, it is not possible to request/release GPIO bank 0 pin 0. Signed-off-by: Tiezhuang Dong <tiezhuang.dong.yh@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Eugeniu Rosca <roscaeugeniu@gmail.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
* pinctrl: renesas: Remove sh_pfc_config_mux_for_gpio()Marek Vasut2019-05-041-5/+0
| | | | | | | | | | | | | | This function is now replaced by common pin controller GPIO configuration functionality, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com> Cc: Eugeniu Rosca <roscaeugeniu@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick DELAUNAY <patrick.delaunay@st.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Simon Glass <sjg@chromium.org>
* pinctrl: renesas: Implement gpio_request_enable/gpio_disable_freeMarek Vasut2019-05-041-1/+39
| | | | | | | | | | | | | | | Implement the gpio_request_enable/gpio_disable_free callbacks to let the GPIO driver call the pin control framework and let it reconfigure pins as GPIOs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com> Cc: Eugeniu Rosca <roscaeugeniu@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick DELAUNAY <patrick.delaunay@st.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Simon Glass <sjg@chromium.org>
* pinctrl: renesas: Set pin type in sh_pfc_config_mux_for_gpioMarek Vasut2019-05-041-2/+8
| | | | | | | | | | | | | | Add missing cfg->type = PINMUX_TYPE_GPIO upon successfully setting pin as a GPIO to retain the pin configuration information. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com> Cc: Eugeniu Rosca <roscaeugeniu@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick DELAUNAY <patrick.delaunay@st.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Simon Glass <sjg@chromium.org>
* pinctrl: renesas: Add R8A77965 pin control tablesMarek Vasut2019-04-091-2/+10
| | | | | | | Add pin control tables for R8A77965 from Linux 5.0 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: renesas: Fix DRV register offsetMarek Vasut2018-11-021-1/+1
| | | | | | | | | Use fixed 4bit size for generating the DRV register element mask, not the size of the value, which can be smaller. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: renesas: Fix register usage in sh_pfc_{read,write}Marek Vasut2018-06-191-2/+2
| | | | | | | | The sh_pfc_{read,write}() must operate on the register address directly rather than on an offset, fix this to prevent illegal access. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: renesas: Sync Gen3 PFC tables with Linux v4.17Marek Vasut2018-06-141-12/+17
| | | | | | | Sync the PFC tables with Linux v4.17. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: renesas: Initial R8A77990 PFC supportMarek Vasut2018-06-011-0/+11
| | | | | | | | This patch adds initial pinctrl driver to support for the R8A77990 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini2018-04-271-2/+0
| | | | | | | | We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
* pinctrl: rmobile: Add R8A77965 M3N entriesMarek Vasut2018-03-051-0/+3
| | | | | | | Add entries for the R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: rmobile: Import R8A7794 E2 PFC tablesMarek Vasut2018-01-241-0/+11
| | | | | | | | Import PFC tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: rmobile: Import R8A7792 V2H PFC tablesMarek Vasut2018-01-241-0/+11
| | | | | | | | Import PFC tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tablesMarek Vasut2018-01-241-0/+22
| | | | | | | | Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: rmobile: Import R8A7790 H2 PFC tablesMarek Vasut2018-01-241-1/+12
| | | | | | | | Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: rmobile: Add R8A77995 D3 PFC tablesMarek Vasut2017-12-091-0/+11
| | | | | | | Add PFC tables for R8A77995 D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: rmobile: Add R8A77970 V3M PFC tablesMarek Vasut2017-12-091-0/+11
| | | | | | | Add PFC tables for R8A77970 V3M SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pfc: rmobile: Add hook to configure pin as GPIOMarek Vasut2017-11-301-0/+29
| | | | | | | | Add hook into the PFC driver to allow the GPIO driver to toggle GPSR registers into GPIO mode when GPIO is requested. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: rmobile: Add support for setting single pinsMarek Vasut2017-11-301-0/+31
| | | | | | | | Add code to handle single pins nodes from DT in addition to already support groups handling. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: rmobile: Add pinconf to Renesas RCar pincontrol driverMarek Vasut2017-10-041-0/+187
| | | | | | | | | | Add pinconf support to the PFC driver, so that it can handle DT props bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: rmobile: Add Renesas RCar pincontrol driverMarek Vasut2017-09-281-0/+565
Add PFC pincontrol driver for the Renesas RCar Gen3 R8A7795 and R8A7796 SoCs. This driver uses the PFC pin tables from Linux, thus letting us share the occassional fixes to those tables. This driver also has a DT support, so the pinmux is configured from DT instead of the ad-hoc setup in board file. This driver is meant to replace the pinmux part of SH_GPIO_PFC driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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