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* global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespaceTom Rini2022-11-1010-24/+24
| | | | | | | Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespaceTom Rini2022-11-109-31/+31
| | | | | | Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com>
* net: mvneta: Add support for AlleyCat5Chris Packham2022-11-072-2/+43
| | | | | | | | | Add support for the AlleyCat5 SoC. This lacks the mbus from the other users of the mvneta.c driver so a new compatible string is needed to allow for a different window configuration. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* treewide: Remove the unnecessary space before semicolonBin Meng2022-11-021-2/+2
| | | | | | %s/return ;/return; Signed-off-by: Bin Meng <bmeng@tinylab.org>
* net/ftgmac100: Add NC-SI mode supportSamuel Mendoza-Jonas2022-10-211-4/+10
| | | | | | | | | | | | | | Update the ftgmac100 driver to support NC-SI instead of an mdio phy where available. This is a common setup for Aspeed AST2x00 platforms. NC-SI mode is determined from the device-tree if either phy-mode sets it or the use-ncsi property exists. If set then normal mdio setup is skipped in favour of the NC-SI phy. Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: NC-SI setup and handlingSamuel Mendoza-Jonas2022-10-212-1/+9
| | | | | | | | | | Add the handling of NC-SI ethernet frames, and add a check at the start of net_loop() to configure NC-SI before starting other network commands. Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* Merge tag 'xilinx-for-v2023.01-rc1-v3' of ↵Tom Rini2022-10-113-11/+16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2023.01-rc1 (round 3) fpga: - Create new uclass - Get rid of FPGA_DEBUG and use logging infrastructure zynq: - Enable early EEPROM decoding - Some DT updates zynqmp: - Use OCM_BANK_0 to check config loading permission - Change config object loading in SPL - Some DT updates net: - emaclite: Enable driver for RISC-V xilinx: - Fix static checker warnings - Fix GCC12 warning sdhci: - Read PD id from DT
| * net: Fix static checker warningsVenkatesh Yadav Abbarapu2022-10-052-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here are the smatch warning messages: drivers/net/xilinx_axi_emac.c:324 axiemac_phy_init() error: 'phydev' dereferencing possible ERR_PTR() drivers/net/zynq_gem.c:340 zynq_phy_init() error: 'priv->phydev' dereferencing possible ERR_PTR() Fix by adding error checking before dereferencing the pointer. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220929045605.23964-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * net: emaclite: fix handling for IP packets with specific lengthsSamuel Obuch2022-10-051-1/+3
| | | | | | | | | | | | | | | | | | | | | | The maximum length is capped similarly to the emaclite_send function. Avoid integer underflow for values of ip->ip_len < 30, the minimum length of an IP packet is 21 bytes. Signed-off-by: Samuel Obuch <samuel.obuch@codasip.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Link: https://lore.kernel.org/r/20220927112103.155689-3-samuel.obuch@codasip.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * net: emaclite: fix xemaclite_alignedread/write functionsSamuel Obuch2022-10-051-5/+4
| | | | | | | | | | | | | | | | | | | | | | Use __raw_read* and __raw_write* functions to ensure read/write is passed to the memory-mapped regions, as non-volatile accesses may get optimised out. Signed-off-by: Samuel Obuch <samuel.obuch@codasip.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Link: https://lore.kernel.org/r/20220927112103.155689-2-samuel.obuch@codasip.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * net: emaclite: enable for more architecturesSamuel Obuch2022-10-051-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function ioremap_nocache seems to be defined only for MIPS and Microblaze architectures. Therefore, the function call in the emaclite driver causes this driver to be unusable with other architectures, for example RISC-V. Use ioremap function instead of ioremap_nocache, and include linux/io.h instead of asm/io.h, so that ioremap function is automatically created, if not defined by the architecture. We can switch to the ioremap function, as Microblaze's ioremap_nocache is just empty and in MIPS implementations of ioremap_nocache and ioremap are the same. Signed-off-by: Samuel Obuch <samuel.obuch@codasip.com> Link: https://lore.kernel.org/r/20220927112103.155689-1-samuel.obuch@codasip.com Signed-off-by: Michal Simek <michal.simek@amd.com>
* | net: ti: am65-cpsw-nuss: Enable MDIO manual modeRavi Gunasekaran2022-10-061-1/+22
| | | | | | | | | | | | | | | | For the TI SoCs affected by errata i2329, enable MDIO manual mode by default Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* | net: ti: cpsw-mdio: Add workaround for errata i2329Ravi Gunasekaran2022-10-065-8/+258
|/ | | | | | | | | | | | | | | | | | | | | | | In certain TI SoCs, on the CPSW and ICSS peripherals, there is a possibility that the MDIO interface returns corrupt data on MDIO reads or writes incorrect data on MDIO writes. There is also a possibility for the MDIO interface to become unavailable until the next peripheral reset. The workaround is to configure the MDIO in manual mode and disable the MDIO state machine and emulate the MDIO protocol by reading and writing appropriate fields in MDIO_MANUAL_IF_REG register of the MDIO controller to manipulate the MDIO clock and data pins. More details about the errata i2329 and the workaround is available in: https://www.ti.com/lit/er/sprz487a/sprz487a.pdf Add implementation to disable MDIO state machine, configure MDIO in manual mode and provide software MDIO read and writes via MDIO bitbanging. Allow the MDIO to be initialized based on the need for manual mode. Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* dm: core: Drop ofnode_is_available()Simon Glass2022-09-295-5/+5
| | | | | | | This function is also available as ofnode_is_enabled(), so use that instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* blk: Rename if_type to uclass_idSimon Glass2022-09-252-7/+7
| | | | | | Use the word 'uclass' instead of 'if_type' to complete the conversion. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: mediatek: add support for MediaTek MT7981/MT7986Weijie Gao2022-09-232-0/+32
| | | | | | | | | This patch adds support for MediaTek MT7981 and MT7986. Both chips uses PDMA v2. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* net: mediatek: add support for PDMA v2Weijie Gao2022-09-232-21/+86
| | | | | | | | | | | This patch adds support for PDMA v2 hardware. The PDMA v2 has extended the DMA descriptor to 8-words, and some of its fields have changed comparing to the v1 hardware. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* net: mediatek: stop using bitfileds for DMA descriptorsWeijie Gao2022-09-232-96/+80
| | | | | | | | | | | This patch is a preparation for adding a new version of PDMA of which the DMA descriptor fields has changed. Using bitfields will result in a complex modification. Convert bitfields to u32 units can solve this problem easily. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: mediatek: use a struct to cover variations of all SoCsWeijie Gao2022-09-232-17/+64
| | | | | | | | | | | | | | Using a single soc id to control different initialization and TX/RX flow for all SoCs is not extensible if more hardware variations are added in the future. This patch introduces a struct to replace the original mtk_soc to allow the driver be able handle newer hardwares. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* Merge branch 'master' into nextTom Rini2022-09-194-67/+29
|\ | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
| * net: fm: Add support for FIT firmwareSean Anderson2022-09-071-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fman microcode is executable code (AFAICT) loaded into a coprocessor. As such, if verified boot is enabled, it must be verified like other executable code. However, this is not currently done. This commit adds verified boot functionality by encapsulating the microcode in a FIT, which can then be signed/verified as normal. By default we allow fallback to unencapsulated firmware, but if CONFIG_FIT_SIGNATURE is enabled, then we make it mandatory. Because existing Layerscape do not use this config (instead enabling CONFIG_CHAIN_OF_TRUST), this should not break any existing boards. An example (mildly-abbreviated) its is provided below: / { #address-cells = <1>; images { firmware { data = /incbin/(/path/to/firmware); type = "firmware"; arch = "arm64"; compression = "none"; signature { algo = "sha256,rsa2048"; key-name-hint = "your key name"; }; }; }; configurations { default = "conf"; conf { description = "Load FMAN microcode"; fman = "firmware"; }; }; }; Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * net: Convert fit verification to use fit_get_data_*Sean Anderson2022-09-072-66/+4
| | | | | | | | | | | | | | | | | | Several ethernet drivers load firmware from FIT images. Convert them to use the fit_get_data helpers. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * net: enetc: Fix use after free issue in fsl_enetc.cSiarhei Yasinski2022-09-061-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If ethernet connected to SFP, like this: &enetc_port0 { phy-connection-type = "sgmii"; sfp = <&sfp0>; managed = "in-band-status"; status = "okay"; }; Then enetc_config_phy returns -ENODEV and the memory containing the mdio interface is freed. It's better to unregister and free mdio resources. Signed-off-by: Siarhei Yasinski <siarhei.yasinski@sintecs.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | cyclic: Use schedule() instead of WATCHDOG_RESET()Stefan Roese2022-09-182-17/+17
| | | | | | | | | | | | | | | | | | | | Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
* | net: gem: Check rate before setting it upMichal Simek2022-09-131-4/+7
|/ | | | | | | | On QEMU setting rate for fixed clock is failing. That's why check a rate first if the rate is the same there is no need to ask for the change. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/bc465ffd4904bfd65208b782daa06732b915db54.1661502645.git.michal.simek@amd.com
* net: Make DM_ETH be selected by NETDEVICETom Rini2022-08-201-57/+21
| | | | | | | | | | | | | | | | The deadline for DM_ETH migration passed 2 years ago. Now that platforms which cannot be migrated have been either removed or had drivers disabled, and platforms that needed minor help to migrate have been forcefully migrated, we can complete the migration. This entails select'ing DM_ETH under NETDEVICES, and then removing now extraneous depends on lines. In a few places, we can now either remove options or just simplify later dependencies. Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Ramon Fried <rfried.dev@gmail.com>
* net: ks8851_mll: Remove legacy non-DM_ETH code and callersTom Rini2022-08-201-75/+0
| | | | | | | | | As this driver has been converted to DM_ETH and the migration deadline is 2 years passed, remove the legacy code and callers. Cc: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Ramon Fried <rfried.dev@gmail.com>
* fsl-mc: Update dependencies for DM_ETHTom Rini2022-08-201-0/+2
| | | | | | | | | | | | | | | | When using DM_ETH, which should be the default now, we need to always have DM_MDIO and FSL_LS_MDIO enabled, so select them. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Wasim Khan <wasim.khan@nxp.com> Cc: Udit Agarwal <udit.agarwal@nxp.com> Cc: Ashish Kumar <Ashish.Kumar@nxp.com> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Manish Tomar <Manish.Tomar@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* net: lpc32xx_eth.c ethernet driverTom Rini2022-08-203-657/+0
| | | | | | | | | This driver has not been converted to DM_ETH. The migration deadline passed 2 years ago. Cc: Trevor Woerner <twoerner@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Ramon Fried <rfried.dev@gmail.com>
* net: Remove smc91111 ethernet driverTom Rini2022-08-123-1940/+0
| | | | | | | | | | | | This driver has not been converted to DM_ETH. The migration deadline passed 2 years ago. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: David Feng <fenghua@phytium.com.cn> Cc: Liviu Dudau <liviu.dudau@foss.arm.com> Cc: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Ramon Fried <rfried.dev@gmail.com>
* Convert CONFIG_SYS_FSL_QMAN_V3 et al to KconfigTom Rini2022-08-121-0/+4
| | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_FSL_NGPIXIS CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RMU CONFIG_SYS_FSL_SINGLE_SOURCE_CLK CONFIG_SYS_FSL_SRIO_LIODN CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_USB1_PHY_ENABLE CONFIG_SYS_FSL_USB2_PHY_ENABLE CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY Signed-off-by: Tom Rini <trini@konsulko.com>
* common: Drop display_options.h from common headerSimon Glass2022-08-101-0/+1
| | | | | | Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: dwc_eth_qos: Add eqos_get_enetaddr callback for stm32Patrice Chotard2022-08-081-0/+1
| | | | | | | | | | Add .eqos_get_enetaddr callback defined as eqos_null_ops() to avoid illegal access. Fixes: a624251461bf ("net: dwc_eth_qos: introduce eqos hook eqos_get_enetaddr") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: dwc_eth_qos: Add eqos_get_enetaddr callback for tegra186Patrice Chotard2022-08-081-0/+1
| | | | | | | | | | Add .eqos_get_enetaddr callback defined as eqos_null_ops() to avoid illegal access. Fixes: a624251461bf ("net: dwc_eth_qos: introduce eqos hook eqos_get_enetaddr") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: ave: Add capability of rgmii-id modeKunihiko Hayashi2022-08-081-1/+13
| | | | | | | | | | | | | This allows you to specify the type of rgmii-id that will enable phy internal delay in ethernet phy-mode. This adds all RGMII cases to all of get_pinmode() except LD11, because LD11 SoC doesn't support RGMII due to the constraint of the hardware. When RGMII phy mode is specified in the devicetree for LD11, the driver will abort with an error. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: phy: possible NULL dereference in fixed_phy_create()Heinrich Schuchardt2022-08-081-3/+3
| | | | | | | | | | We check if phydev is NULL. Only but if it is non-NULL we set one component of phydev. But even if it is NULL we set another. We should not dereference NULL in either case. Fixes: e24b58f5ed4f ("net: phy: don't require PHY interface mode during PHY creation") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Marek Behún <kabel@kernel.org>
* net: dwc_eth_qos: cosmetic: reorder include filesPatrick Delaunay2022-08-081-1/+1
| | | | | | | Reorder include files in the U-Boot expected order. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: phy: Remove inline definitions from convinience functionsRamon Fried2022-08-081-0/+174
| | | | | | | | | | | | The convinience functions are not that small and they caused bloated text segments because of their usage. There was no need to inline them in the first place, as they're not part of a fastpath. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Marek Behún <kabel@kernel.org> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
* net: ftgmac100: use bus name in mdio error messagesZev Weiss2022-08-081-2/+2
| | | | | | | | | | | | | Previously we'd been using a device name retrieved via ftgmac100_data->phydev, but the mdio read/write functions may be called before that member is initialized in ftgmac100_phy_init(), leading to a NULL pointer dereference while printing the error message issued if the mdio access fails. We can instead use bus->name, which is already available at that point. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Fixes: 538e75d3fc54 ("net: ftgmac100: add MDIO bus and phylib support") Reviewed-by: Cédric Le Goater <clg@kaod.org>
* net: nuvoton : Add NPCM7xx EMAC driverJim Liu2022-08-083-0/+751
| | | | | | | NPCM750 provides identical ethernet MAC controllers for WAN/LAN applications. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: mpc8xx_fec: Migrate to DM_ETHChristophe Leroy2022-08-082-91/+99
| | | | | | | Migrate mpc8xx_fec driver to DM_ETH. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: dwc_eth_qos: remove use of DWC_NET_PHYADDRRasmus Villemoes2022-08-081-3/+0
| | | | | | | | | | | | | | | | | | | | | | Only two boards in the tree set the macro DWC_NET_PHYADDR. Both have CONFIG_DM_ETH_PHY=y, so should set the phy address in DT if necessary. The imx8mp_evk does set the correct address in device tree. The other board seems to be a copy-paste-adapt from an old version of the imx8mp_evk config header, given the "#ifdef CONFIG_DWC_ETH_QOS" block that has been removed from imx8mp_evk header in commit 127fb454955. Its device tree doesn't even enable (i.e., set 'status = "okay"') the &eqos node. But the other ethernet device, &fec, does get enabled, and does have a phy sitting at address 4 (and it also has a corresponding legacy #define CONFIG_FEC_MXC_PHYADDR 4). So I believe it should be completely safe to remove it from there as well. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> [trini: Re-apply to top of tree, update imx93_evk.h] Signed-off-by: Tom Rini <trini@konsulko.com>
* net: dwc_eth_qos: lift parsing of max-speed DT property to common codeRasmus Villemoes2022-08-081-2/+2
| | | | | | | | | | | | | | | I have an iMX8MP with a ti,dp83867 phy in front of the eqos interface. The phy is Gbit capable - however, the C and D differential pairs are not physically routed to the RJ45 connector. So I need to prevent the phy from advertising 1000Mbps. The necessary code is almost already there in the form of a phy_set_supported() call in eqos_start(), but the max-speed DT property is currently only parsed in eqos_probe_resources_stm32(). Lift that parsing to eqos_probe(). Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: dwc_eth_qos: fix double resource leak in eqos_remove()Rasmus Villemoes2022-08-081-1/+1
| | | | | | | | | Not only does eqos_remove() fail to free the buffers that have been allocated by eqos_probe_resources_core(), it repeats those allocations and thus drops twice as much memory on the floor. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: dm9000: Correctly handle empty FIFOMarek Vasut2022-08-081-2/+2
| | | | | | | | | | | Assign packet pointer only in case the MAC reports anything in the FIFO. In case the MAC indicates empty FIFO, return 0 to pass that information to the network stack. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: phy: marvell: Add support for 88E1240 PHYStefan Roese2022-08-081-0/+21
| | | | | | | | | | | | | | This patch adds basic support for the Marvell 88E1240 PHY. This will be used by the upcoming ethernet support addition for the Marvell MIPS Octeon EBB7304 platform. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Marek Behún <marek.behun@nic.cz>
* net: phy: marvell: Support reg config via "marvell, reg-init" DT propertyStefan Roese2022-08-081-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the "marvell,reg-init" DT property, which is used to describe board specific Marvell PHY register configurations in the board dts file. This DT property is supported in the Linux Kernel since a longer time. Adding it to U-Boot now, enables the boards which describe the register settings in their DT files here as well. I've included calling this marvell_of_reg_init() to all foo_config() functions in this patch as well. If CONFIG_DM_ETH is not set, there is no ofnode, or no "marvell,reg-init" property, the PHY initialization is unchanged. The function marvell_of_reg_init() is a port of the Linux version. Please note that I explicitly did not add error checking and handling to the U-Boot version, as this is basically not done for phy_read/write in this Marvell PHY code. This will be used by the upcoming ethernet support on the MIPS Octeon EBB 7304 board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Marek Behún <marek.behun@nic.cz> Reviewed-by: Marek Behún <marek.behun@nic.cz>
* Convert CONFIG_FSL_MEMAC et al to KconfigTom Rini2022-08-043-1/+8
| | | | | | | | This converts the following to Kconfig: CONFIG_FSL_MEMAC CONFIG_SYS_MEMAC_LITTLE_ENDIAN Signed-off-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_SYS_FMAN_V3 to KconfigTom Rini2022-08-041-0/+8
| | | | | | | This converts the following to Kconfig: CONFIG_SYS_FMAN_V3 Signed-off-by: Tom Rini <trini@konsulko.com>
* net: dwc_eth_qos: introduce eqos hook eqos_get_enetaddrPeng Fan2022-07-263-4/+18
| | | | | | | i.MX has specific hook to get MAC address, so introduce a hook and move i.MX code to its own driver Signed-off-by: Peng Fan <peng.fan@nxp.com>
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