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path: root/drivers/net/ldpaa_eth
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* common: Drop asm/global_data.h from common headerWIP/2021-02-02-drop-asm_global_data-when-unusedSimon Glass2021-02-021-0/+1
| | | | | | | | | | | | Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'v2021.01-rc5' into nextTom Rini2021-01-051-0/+1
|\ | | | | | | | | | | Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
| * armv8: lx2162a: Add Soc changes to support LX2162AMeenakshi Aggarwal2020-12-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | LX2162 is LX2160 based SoC, it has same die as of LX2160 with different packaging. LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module, microSD card, eMMC support, serial console, qspi nor flash, qsgmii, sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes interface to support three PCIe gen3 interface. Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> [Fixed whitespace errors] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass2020-12-131-2/+2
| | | | | | | | | | | | | | This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2020-12-131-1/+1
| | | | | | | | | | | | Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-131-1/+1
| | | | | | | | | | | | | | | | | | | | We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-131-2/+2
|/ | | | | | | | | | | | This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: lx2160a.c: Update to set ECx_PMUX precedenceRazvan Ionut Cirjan2020-10-231-2/+2
| | | | | | | | | | | | As per hardware documentation, ECx_PMUX has precedence over SerDes protocol. For LX2160/LX2162 if DPMACs 17 and 18 are enabled as SGMII through SerDes protocol but ECx_PMUX configured them as RGMII, then the ports will be configured as RGMII and not SGMII. Signed-off-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* net: ldpaa_eth: Include device_compat.hSean Anderson2020-10-151-7/+7
| | | | | | Necessary for dev_xxx. Signed-off-by: Sean Anderson <seanga2@gmail.com>
* drivers: net: ldpaa_eth: lx2160a: fix bug in checking if a DPMAC is enabledGrigore Popescu2020-09-241-2/+2
| | | | | | | | | | The next DPMAC was always verified if it is enabled. In case of DPMAC@6, the DPMAC@7 is verified. As DPMAC@7 is disabled, DPMAC@6 will be considered disabled and not detected by uboot. Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* treewide: convert bd_t to struct bd_info manuallyMasahiro Yamada2020-07-171-1/+1
| | | | | | | | | | | Some code was not converted by coccinelle, somehow. I manually fixed up the remaining, and comments, README docs. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> [trini: Add arch/arm/mach-davinci/include/mach/sdmmc_defs.h and include/fdt_support.h] Signed-off-by: Tom Rini <trini@konsulko.com>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/bug.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* drivers: net: ldpaa: add DTS based probing supportIoana Ciornei2020-04-292-32/+206
| | | | | | | | | | | | | | | | When CONFIG_DM_ETH is enabled DPAA2 network interfaces will now probe based on DTS nodes with the "fsl,qoriq-mc-dpmac" compatible. In this case, transform the ldpaa_eth driver into a UCLASS_ETH driver and reuse the _open()/_tx()/_stop() functions already inplemented. For the moment, the ldpaa_eth driver will support both configurations: with or without CONFIG_DM_ETH enabled. Any 'struct eth_device' occurrence now has a matching 'struct udevice' made mutually exclusive based on the state of CONFIG_DM_ETH. Signed-off-by: Florin Laurentiu Chiculita <florinlaurentiu.chiculita@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* common: Move ARM cache operations out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | | | These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move mii_init() function out of common.hSimon Glass2019-12-022-0/+2
| | | | | | | This function belongs in mii.h so move it over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers: net: ldpaa_eth: fix resource leakPankaj Bansal2019-05-081-0/+1
| | | | | | | | | | if an error occurs in ldpaa_eth_init, need to free all resources before returning the error. Threfore, free net_dev before returning from ldpaa_eth_init. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers: net: ls1088ardb: Fix EC1 and EC2 RCW offsetPramod Kumar2019-03-151-2/+2
| | | | | | | | Fix EC1 and EC2 read from correct offset 26, instead of 25 Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* drivers: net: ldpaa_eth: check if the dpmac is enabledPankaj Bansal2019-03-151-2/+2
| | | | | | | | | | | | | | | | | | | | some dpmacs in armv8a based freescale layerscape SOCs can be configured via both serdes(sgmii, xfi, xlaui etc) bits and via EC*_PMUX(rgmii) bits in RCW. e.g. dpmac 17 and 18 in LX2160A can be configured as SGMII from serdes bits and as RGMII via EC1_PMUX/EC2_PMUX bits Now if a dpmac is enabled by serdes bits then it takes precedence over EC*_PMUX bits. i.e. in LX2160A if we select serdes protocol that configures dpmac17 as SGMII and set the EC1_PMUX as RGMII, then the dpmac is SGMII and not RGMII. Therefore, in fsl_rgmii_init function of SOC, we will check if the dpmac is enabled or not? if it is (fsl_serdes_init has already enabled the dpmac), then don't enable it. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* armv8: lx2160a: Add LX2160A SoC SupportPriyanka Jain2018-12-062-1/+109
| | | | | | | | | | | | | | | | | | | | | LX2160A Soc is based on Layerscape Chassis Generation 3.2 architecture with features: 16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC, 2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers, 3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs, 4 TZASC instances, etc. SoC personalites: LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* ldpaa_eth.c: Fix warning when PHYLIB is not enabledTom Rini2018-10-121-3/+7
| | | | | | | | We need to #ifdef some variables to avoid warning about them being unused. Fixes: 1a048cd65645 ("driver: net: fsl-mc: Add support of multiple phys for dpmac") Signed-off-by: Tom Rini <trini@konsulko.com>
* driver: net: fsl-mc: Add support of multiple phys for dpmacPankaj Bansal2018-10-102-43/+94
| | | | | | | | | | | | | | | | | Till now we have had cases where we had one phy device per dpmac. Now, with the upcoming products (LX2160AQDS), we have cases, where there are sometimes two phy devices for one dpmac. One phy for TX lanes and one phy for RX lanes. to handle such cases, add the support for multiple phys in ethernet driver. The ethernet link is up if all the phy devices connected to one dpmac report link up. also the link capabilities are limited by the weakest phy device. i.e. say if there are two phys for one dpmac. one operates at 10G without autoneg and other operate at 1G with autoneg. Then the ethernet interface will operate at 1G without autoneg. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* driver: net: fsl-mc: Modify the dpmac link detection methodPankaj Bansal2018-10-101-62/+57
| | | | | | | | | | | | when there is no phy present for a dpmac, a dummy phy device is created. when we move to multiple phy method, we need to create as many dummy phy devices. Change this method so that we don't need to create dummy phy devices. We always report linkup if no phy is present. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* driver: net: fsl-mc: fix error handing in init_phyPankaj Bansal2018-10-101-1/+9
| | | | | | | | if an error occurs during init_phy, we should free the phydev structure which has been allocated by phy_connect. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* driver: net: fsl-mc: remove unused strcture elementsPankaj Bansal2018-10-103-27/+34
| | | | | | | | | | | | | The phydev structure is present in both ldpaa_eth_priv and wriop_dpmac_info. the phydev in wriop_dpmac_info is not being used As the phydev is created based on phy_addr and bus members of wriop_dpmac_info, it is appropriate to keep phydev in wriop_dpmac_info. Also phy_regs is not being used, therefore remove it Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* driver: net: fsl-mc: modify the label namePankaj Bansal2018-10-101-4/+4
| | | | | | | The goto label name is misspelled it should be DPMAC not DPAMC Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* fsl/mc: Limit the ethernet name to ETH_NAME_LENPankaj Bansal2018-08-081-2/+2
| | | | | | | | | | | The ethernet name should be within the ETH_NAME_LEN, as this is the buffer space allocated to ethernet name. Otherwise, this causes buffer overflow. Reported-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* driver: net: fsl-mc: updated copyright infoYogesh Gaur2018-05-092-2/+2
| | | | | | | | Updated copyright info for the issues reported after running check-legal test. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-076-13/+6
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* driver: net: fsl-mc: flib changes for MC 10.3.0Yogesh Gaur2017-12-062-130/+158
| | | | | | | | | | | | | | | | | | | | | | | Existing MC driver framework is based on MC-9.x.x flib. This patch migrates MC obj (DPBP, DPNI, DPRC, DPMAC etc) to use latest MC flib which is MC-10.3.0. Changes introduced due to migration: 1. To get OBJ token, pair of create and open API replaces create APIs 2. Pair of close and destroy APIs replaces destroy APIs 3. For version read, get_version APIs replaces get_attributes APIs 4. dpni_get/reset_statistics APIs replaces dpni_get/set_counter APIs 5. Simplifies struct dpni_cfg and removes dpni_extended_cfg struct 6. Single API dpni_get_buffer_layout/set_buffer_layout replaces dpni_get_rx/set_rx, tx related, tx_conf_buffer_layout related APIs. New API takes a queue type as an argument. 7. Similarly dpni_get_queue/set_queue replaces dpni_get_rx_flow/set_rx_flow , tx_flow related, tx_conf related APIs Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* drivers: net: ldpaa_eth: Correct error handler for qbman_swp_acquire()Ashish Kumar2017-11-141-1/+1
| | | | | | | | | | The zero value returned from qbman_swp_acquire() is an error condition meaning no free buffer for allocation. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Kushwaha Prabhakar <prabhakar@freescale.com> [YS: revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1088aqds: Change phy mode to PHY_INTERFACE_MODE_RGMII_IDAshish Kumar2017-10-271-2/+2
| | | | | | | | | | | Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID PHY_INTERFACE_MODE_RGMII_TXID. These change where introduced in phy driver in commit 05b29aa0cb68 ("net: phy: realtek: fix enabling of the TX-delay for RTL8211F"). Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: fsl-layerscape: Support to add RGMII for ls1088aqdsAshish Kumar2017-09-112-0/+36
| | | | | | | | | | | | This patch adds support for RGMII protocol NXP's LDPAA2 support RGMII protocol. LS1088A is the first Soc supporting both RGMII and SGMII. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1088a: Add NXP LS1088A SoC supportAshish Kumar2017-09-112-0/+88
| | | | | | | | | | | | | | | | LS1088A is compliant with the Layerscape Chassis Generation 3 with eight ARM v8 Cortex-A53 cores in 2 cluster, CCI-400, one 64-bit DDR4 SDRAM memory controller with ECC, Data path acceleration architecture 2.0 (DPAA2), Ethernet interfaces (SGMIIs, RGMIIs, QSGMIIs, XFIs), QSPI, IFC, PCIe, SATA, USB, SDXC, DUARTs etc. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> [YS: Revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
* driver: net: ldpaa: Update priv->phydev after free()Prabhakar Kushwaha2017-08-141-1/+3
| | | | | | | | | | Even after memory free of phydev, priv is still pointing to the obsolete address. So update priv->phydev as NULL after memory free. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* armv8: ls2080a: Drop macro CONFIG_LS2080AYork Sun2017-04-171-1/+1
| | | | | | Use CONFIG_ARCH_LS2080A instead. Signed-off-by: York Sun <york.sun@nxp.com>
* arm: fsl-layerscape: Move QSGMII wriop_init to SoC filePrabhakar Kushwaha2017-03-281-0/+30
| | | | | | | | | | MAC number used per QSGMII is not fixed. It may wary from SoC to SoC. So move QSGMII wriop_init_dpmac() to SoC file. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* driver: net: ldpaa_eth: Fix missing bracket issuePriyanka Jain2016-11-211-1/+2
| | | | | | | | Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
* drivers: net: ldpaa: Memset pools_params as "0" before usePrabhakar Kushwaha2016-05-031-0/+1
| | | | | | | | Memset pools_params as "0" to avoid garbage value in dpni_set_pools. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reported-by: Jose Rivera <german.rivera@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun2016-04-061-1/+0
| | | | | | | | | | | | LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* driver: net: ldpaa_eth: Add support of PHY frameworkPrabhakar Kushwaha2016-03-211-34/+87
| | | | | | | | | | | This patch integrate DPAA2 ethernet driver existing PHY framework. Call phy_connect and phy_config as per available DPMAC id defined in SerDes Protcol. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* driver: net: ldpaa: Add debug info of printing DPMAC statsPrabhakar Kushwaha2016-01-271-0/+78
| | | | | | | | | | | | Add debug information prints to provide DPMAC statistics - Number of bytes received - Number of received and discard frames - Number of bytes transferred - Number of frames transferred etc. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* driver: net: ldpaa: Increase num of buffers for a poolPrabhakar Kushwaha2016-01-271-1/+1
| | | | | | | | | | Management Complex FW 9.0 set the hardware depletion to be 20 buffers in order to support multiple pools in DPNI. This requires driver to fill the pool with at least 21 to be able to receive frames. So, Increase number of buffers for a pool. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* driver: net: ldpaa: Report back only error frames for txPrabhakar Kushwaha2016-01-271-0/+12
| | | | | | | | | | | Management Complex FW 9.0 puts a new requirement to provide Tx confirmation and error queue configuration by calling dpni_set_tx_conf API. Configure report of only error frames for a tx frame. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* driver: net: fsl-mc: flib changes for MC FW 9.0.0Prabhakar Kushwaha2016-01-271-3/+1
| | | | | | | | | | | | | MC firmware version 9.0.0 contains - Support of new APIs - Update in existing APIs - Change in Major and minor version of DPAA2 objects This patch contains modifications in FLIB files to support new MC firmware version. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* driver: net: fsl-mc: Add version check for MC objectsPrabhakar Kushwaha2016-01-271-0/+28
| | | | | | | | Check and compare version of management complex's object with the version supported by Freescale ldpaa2 ethernet driver. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Fix GCC format-security errors and convert sprintfs.Ben Whitten2016-01-141-2/+2
| | | | | | | | | | | With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal. Simple uses of sprintf are also converted to use strcpy. Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-301-0/+1
| | | | | | | | | | | | | Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
* armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-302-1/+1
| | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
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