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* Revert "mmc: sdhci: set to INT_DATA_END when there are data"Yuezhang.Mo@sony.com2021-09-101-2/+1
| | | | | | | | | | | | | | | | This reverts commit 17ea3c862865c0d704646f67dbf8412f9ff54f59. In eMMC specification, for the response-with-busy(R1b, R5b) command, the DAT0 will driven to LOW as BUSY status, and in sdhci specification, the transfer complete bit should be wait for BUSY status de-assert. All response-with-busy commands don't contain data, the data judgement is no need. Signed-off-by: Yuezhang.Mo <Yuezhang.Mo@sony.com> Reviewed-by: Andy Wu <Andy.Wu@sony.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: sdhci: Change prototype of set_delay to return errorsAshok Reddy Soma2021-08-061-2/+8
| | | | | | | | | | | | set_delay() has return type as void. If there are any errors while setting tapdelay's it won't be able to return them. Change the prototype of set_delay() in sdhci_ops structure and return the errors from wherever it is called. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed modeFaiz Abbas2021-07-271-0/+3
| | | | | | | | | | Enable HS400 speed mode by writing to HOST_CONTROL2 register. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/20210405144428.12159-1-a-govindraju@ti.com
* mmc: sdhci: skip cache invalidation if DMA is not usedYuezhang.Mo@sony.com2021-02-191-0/+2
| | | | | | | | | | | | | If DMA(SDMA or ADMA) is not used, the cache invalidation after reading is no need, should be skipped. Otherwise U-Boot may hang at the cache invalidation. Found this issue and tested this fix on DragonBoard 410c. Fixes: commit 4155ad9aac94 ("mmc: sdhci: fix missing cache invalidation after reading by DMA") Signed-off-by: Yuezhang.Mo <Yuezhang.Mo@sony.com> Reviewed-by: Andy Wu <Andy.Wu@sony.com>
* mmc: Introduce mmc_phys_to_bus()/mmc_bus_to_phys()Nicolas Saenz Julienne2021-02-181-4/+6
| | | | | | | | | | This will allow us to use DM variants of phys_to_bus()/bus_to_phys() when relevant. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* mmc: sdhci: Add helper functions for UHS modesFaiz Abbas2021-02-041-0/+95
| | | | | | | | | Add a set_voltage() function which handles the switch from 3.3V to 1.8V for SD card UHS modes. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* Revert "mmc: zynq: parse dt when probing"Ashok Reddy Soma2020-10-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830. This is partial revert of the above commit. mmc_of_parse() is reading no-1-8-v from device tree and if set, it is clearing the UHS speed capabilities of cfg->host_caps. cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 | MMC_MODE_HS400 | MMC_MODE_HS400_ES); This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104, SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50. Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(), these speed flags are getting set again in cfg->host_caps in sdhci_setup_cfg(). The reason for this is, SDHCI_SUPPORT_XXX flags are cleared only if controller is not capable of supporting MMC_VDD_165_195 volts. if (caps & SDHCI_CAN_VDD_180) cfg->voltages |= MMC_VDD_165_195; if (!(cfg->voltages & MMC_VDD_165_195)) caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_DDR50); It means "no-1-8-v", which is read from DT is not coming in to effect. So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to clear UHS speeds based on no-1-8-v from device tree. Hence revert the functionality related to no-1-8-v only, rest is fine in the patch. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* mmc: sdhci: move the ADMA2 table handling into own moduleMichael Walle2020-10-121-55/+8
| | | | | | | | There are other (non-SDHCI) controllers which supports ADMA2 descriptor tables, namely the Freescale eSDHC. Instead of copying the code, move it into an own module. Signed-off-by: Michael Walle <michael@walle.cc>
* mmc: sdhci: Use upper/lower_32_bits macrosMichal Simek2020-08-201-4/+4
| | | | | | | Instead of recasting and shifting use macros which are designed for taking upper/lower 32bit value from 64bit variable. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: sdhci: Enable high speed conditional on the corresponding bitFaiz Abbas2020-08-201-1/+4
| | | | | | | | | | | The capabilities register has a field to indicate whether the host supports high speed mode or not. Add high speed host_caps based on this bit instead of enabling it by default. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Michal Simek <michal.simek@xilnx.com> Tested-by: Michal Simek <michal.simek@xilnx.com> (zcu104 with sdhci-caps-mask = <0 0x200000>;)
* mmc: Drop duplicate dm.h inclusionSimon Glass2020-08-031-1/+0
| | | | | | We only need to include this header once. Drop the duplicate. Signed-off-by: Simon Glass <sjg@chromium.org>
* mmc: sdhci: Fix HISPD bit handlingJagan Teki2020-06-241-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SDHCI HISPD bits need to be configured based on desired mmc timings mode and some HISPD quirks. So, handle the HISPD bit based on the mmc computed selected mode(timing parameter) rather than fixed mmc card clock frequency. Linux handle the HISPD similar like this in below commit but no SDHCI_QUIRK_BROKEN_HISPD_MODE, commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling") This eventually fixed the mmc write issue observed in rk3399 sdhci controller. Bug log for refernece, => gpt write mmc 0 $partitions Writing GPT: mmc write failed ** Can't write to device 0 ** ** Can't write to device 0 ** error! Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Peng Fan <peng.fan@nxp.com> Peng Fan: added back "ctrl &= ~SDHCI_CTRL_HISPD;" per Jaehoon's suggestion Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> # roc-rk3399-pc Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* common: Drop linux/bitops.h from common headerWIP/2020-05-18-reduce-size-of-common.hSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop net.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | | | | | | Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* mmc: sdhci: Use debug for not supported SDMA info messageMatthias Brugger2020-05-131-2/+2
| | | | | | | | | | | If CONFIG_MMC_SDHCI_SDMA is enabled but the HW could not support it, we no longer error out. Instead we do not enable it in the host. Change the output from printf to debug as this isn't an error but only additional information now. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* mmc: sdhci: not return error when SDMA is not supportedJaehoon Chung2020-05-121-4/+3
| | | | | | | | | | If Host controller doesn't support SDMA, it doesn't need to return error. Because it can be worked with PIO mode. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* mmc: sdhci: use phys2bus macro when dma address is accessedJaehoon Chung2020-05-121-2/+4
| | | | | | | | | | | Use phys2bus macro when dma address is accessed. Some targets need to use pyhs2bus macro. (e.g, RPI4) After applied it, SDMA mode can be used. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* mmc: zynq: parse dt when probingBenedikt Grassl2020-04-271-2/+1
| | | | | | | | | | | | | Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes is not evaluated. This results in the bus width staying at its default value (4 bit in HS200 mode). Fix this by calling mmc_of_parse. This function also checks for the "no-1-8-v" and "max-frequency" entries. Remove the handling of those nodes from this driver. Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* sdhci: Add sdhci_deferred_probe() APIFaiz Abbas2020-03-091-0/+15
| | | | | | | | | Add the sdhci_deferred_probe() function to register as the deferred_probe() callback to the mmc core. It will in turn call the deferred_probe() callback of the platform drivers as declared in the sdhci_ops. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* mmc: sdhci: fix missing cache invalidation after reading by DMAMasahiro Yamada2020-02-201-0/+4
| | | | | | | | | | | | | | | | This driver currently performs cache operation before the DMA start, but does nothing after the DMA completion. When reading data by DMA, the cache invalidation is needed also after finishing the DMA transfer. Otherwise, the CPU might read data from the cache instead of from the main memory when speculative memory read or memory prefetch occurs. Instead of calling the cache operation directly, this commit adds dma_unmap_single(), which performs cache invalidation internally, but drivers do not need which operation is being run. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* mmc: sdhci: use dma_map_single() instead of flush_cache() before DMAMasahiro Yamada2020-02-201-26/+25
| | | | | | | | | | | | | | | | Currently, sdhci_prepare_dma() calls flush_cache() regardless of the DMA direction. Actually, cache invalidation is enough when reading data from the device. This is correctly handled by dma_map_single(), which mimics the DMA-API in Linux kernel. Drivers can be agnostic which cache operation occurs behind the scene. This commit also sanitizes the difference between the virtual address and the dma address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* mmc: sdhci: remove unneeded castsMasahiro Yamada2020-02-201-3/+2
| | | | | | | | | host->mmc is already (struct mmc *). memalign() returns an opaque pointer, so there is no need for casting. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: sdhci: use lower_32_bit2() and upper_32_bits() for setting adma_addrMasahiro Yamada2020-02-201-2/+3
| | | | | | | | Use {lower,upper}_32_bits() instead of the combination of cast and shift. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: sdhci: reduce code duplication for aligned bufferMasahiro Yamada2020-02-201-14/+8
| | | | | | | | | | The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER). Unify the code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: sdhci: put the aligned buffer pointer to struct sdhci_hostMasahiro Yamada2020-02-201-14/+13
| | | | | | | | | Using the global variable does not look nice. Add a new field sthci::align_buffer to point to the bounce buffer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* common: Move ARM cache operations out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | | | These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* mmc: sdhci: make sdhci_get_cd staticBaruch Siach2019-11-271-1/+1
| | | | | | | sdhci_get_cd() is not referenced anywhere else. Limit its scope to sdhci.c. Signed-off-by: Baruch Siach <baruch@tkos.co.il>
* mmc: sdhci: Add support for dt caps & caps maskT Karthik Reddy2019-09-061-9/+14
| | | | | | | | | | | | The sdhci capabilities registers can be incorrect. The sdhci-caps-mask and sdhci-caps dt properties specify which bits of the registers are incorrect and what their values should be. This patch makes the sdhci driver use those properties to correct the caps. Also use "dev_read_u64_default" instead of "dev_read_u32_array" for caps mask. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: sdhci: fix chip detect gpio property nameBaruch Siach2019-07-311-1/+1
| | | | | | | | | | | The standard property name for chip-detect gpio is "cd-gpios". All in-tree DT files use only this name. Fixes: 451931ea700 ("mmc: sdhci: Read cd-gpio from devicetree") Cc: T Karthik Reddy <t.karthik.reddy@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timingsFaiz Abbas2019-07-171-0/+28
| | | | | | | | | | The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific to arasan/zynq controllers. Add the same to sdhci.h. Also create a common API to set UHS timings in HOST_CONTROL2. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* mmc: sdhci: Make set_ios_post() return intFaiz Abbas2019-07-171-1/+1
| | | | | | | Make set_ios_post() return int to faciliate error handling in platform drivers. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* mmc: sdhci: Make sdhci_set_clock() non staticFaiz Abbas2019-07-171-1/+1
| | | | | | | | | | | | The am654_sdhci driver needs to switch the clock off before disabling its phy dll and needs to re-enable the clock before enabling the phy again. Therefore, make the sdhci_set_clock() function accessible in the am654_sdhci driver. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* mmc: sdhci: Add support for sdhci-caps-maskFaiz Abbas2019-07-171-3/+15
| | | | | | | | | | Add Support for masking some bits in the capabilities register of a host controller. Also remove the redundant readl() into caps1. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* mmc: sdhci: Implement SDHCI card detectT Karthik Reddy2019-07-151-0/+32
| | | | | | | Card detect function implemented for SDHCI framework. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: sdhci: Read cd-gpio from devicetreeT Karthik Reddy2019-07-151-0/+6
| | | | | | | | This patch reads cd-gpio property from devicetree Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* mmc: sdhci: Add Support for ADMA2Faiz Abbas2019-05-031-23/+115
| | | | | | | | | | | The Standard Host Controller Interface (SDHCI) specification version 3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests. This significantly improves read and write throughput. Add Support for the same. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* mmc: sdhci: Move DMA handling to prepare_dma() functionFaiz Abbas2019-05-031-42/+50
| | | | | | | | In preparation for addition of ADMA2 support, cleanup SDMA handling by moving it to a new sdhci_prepare_dma() function. Also add a flags field in sdhci_host to indicate if DMA is enabled. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* mmc: sdhci: Fix MMC HS200 tuning command failuresSiva Durga Prasad Paladugu2018-06-151-4/+4
| | | | | | | | | | | This patch fixes the mmc tuning command failures when tuning pattern data needs to read back for comparision against the expected bit pattern. Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* mmc: sdhci: Update sdhci_send_command() to handle HS200Siva Durga Prasad Paladugu2018-05-311-3/+6
| | | | | | | | This patch updates sdhci_send_command() to handle MMC HS200 tuning command. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: sdhci: Check that ops are definedRamon Fried2018-05-141-2/+2
| | | | | | | The check is necessary to avoid NULL pointer dereference. Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
* mmc: sdhci: Read capabilities register1 and update host capsSiva Durga Prasad Paladugu2018-05-111-1/+27
| | | | | | | | | This patch reads the capabilities register1 and update the host caps accordingly for mmc layer usage. This patch mainly reads for UHS capabilities inorder to support SD3.0. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: sdhci: Invoke platform specific tuning and delay routinesSiva Durga Prasad Paladugu2018-05-111-0/+24
| | | | | | | | This patch adds support to invoke any platform specific tuning and delay routines if available. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: sdhci: Handle execute tuning command in sdhci_send_commandSiva Durga Prasad Paladugu2018-05-111-2/+6
| | | | | | | | This patch upadted sdhci_send_command to handle execute tuning command. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: sdhci: Add support for disabling clockSiva Durga Prasad Paladugu2018-05-111-0/+3
| | | | | | | | | This patch adds support to disable clock if clk_disable was set and then enable or set clock if the clock was changed or clock was disabled when clock needs to be enabled. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: Changed the datatype of the variable to handle 64-bit archVipul Kumar2018-05-111-1/+1
| | | | | | | | | This patch changed the datatype of variable "start" from uint to ulong to work properly on 64-bit machines as well. Also the return type of get_timer() function is ulong. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* mmc: sdhci: add SDHCI_QUIRK_BROKEN_HISPD_MODEHannes Schmelzer2018-05-021-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Some IP-core implementations of the SDHCI have different troubles on the silicon where they are placed. On ZYNQ platform for example Xilinx doesn't accept the hold timing of an eMMC chip which operates in High-Speed mode and must be forced to operate in non high-speed mode. To get rid of this "SDHCI_QUIRK_BROKEN_HISPD_MODE" is introduced. For more details about this refer to the Xilinx answer-recor #59999 https://www.xilinx.com/support/answers/59999.html This commit: - doesn't set HISPD bit on the host-conroller - reflects this fact within the host-controller capabilities Upon this the layer above (mmc-driver) can setup the card correctly. Otherwise the MMC card will be switched into high-speed mode and causes possible timing violation on the host-controller side. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
* mmc: sdhci: change data transfer failure into debug messageMasahiro Yamada2018-01-221-2/+2
| | | | | | | | | | | | During the tuning, drivers repeat data transfer, changing timing parameters in the controller hardware. So, the tuning commands (CMD19 for SD, CMD21 for eMMC) fail, and this is not a problem at all. Showing "Error detected..." in normal operation just make users upset. This should not be shown. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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