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* drivers/ddr/fsl: Fix workaround for A009803York Sun2018-01-301-1/+1
* drivers/ddr/fsl: Fix DDR4 RDIMM supportYork Sun2018-01-303-22/+40
* Merge git://git.denx.de/u-boot-socfpgaTom Rini2018-01-271-4/+4
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| * ddr: altera: silence PHY calibration unless in debug modeGoldschmidt Simon2018-01-251-4/+4
* | Merge git://git.denx.de/u-boot-spiTom Rini2018-01-261-4/+4
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| * wait_bit: use wait_for_bit_le32 and remove wait_for_bitÁlvaro Fernández Rojas2018-01-241-4/+4
* | ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCsRajesh Bhagat2018-01-231-1/+3
* | ddr: marvell: update ddr controller init and freqChris Packham2018-01-193-21/+34
* | ddr: marvell: update additional ODT settingChris Packham2018-01-191-8/+14
* | ddr: marvell: use correct TREFI valueChris Packham2018-01-191-1/+1
* | ddr: marvell: only assert M_ODT[0] on write for a single CSChris Packham2018-01-193-8/+13
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* armv8: ls1088a: Add NXP LS1088A SoC supportAshish Kumar2017-09-111-1/+1
* env: Rename getenv/_f() to env_get()Simon Glass2017-08-163-8/+8
* arm: mvebu: ddr3_debug: remove self assignmentsxypron.glpk@gmx.de2017-08-131-9/+0
* arm: mvebu: remove self assignmentxypron.glpk@gmx.de2017-08-131-2/+0
* driver/ddr: Add support for setting timing in hws_topology_mapMarek Behún2017-07-122-0/+15
* treewide: remove unneeded semicolonsMasahiro Yamada2017-06-161-1/+1
* driver: ddr: fsl: Fix compiling error for DDR2York Sun2017-06-121-0/+4
* common: arm: freescale: layerscape: Move header files out of common.hSimon Glass2017-06-054-4/+8
* common: freescale: Move arch-specific declarationsSimon Glass2017-06-055-0/+13
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-04-181-36/+36
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| * drivers: ddr: fsl: fix unused-const-variable warningsThomas Schaefer2017-04-171-36/+36
* | ddr: fsl: incorrect logical constraint in populate_memctl_optionsxypron.glpk@gmx.de2017-04-181-1/+1
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* Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2017-04-143-1/+9
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| * arm: socfpga: Convert Altera DDR SDRAM driver to use KconfigLey Foon Tan2017-04-143-1/+9
* | board_f: Rename initdram() to dram_init()Simon Glass2017-04-131-2/+2
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* board_f: Drop return value from initdram()Simon Glass2017-04-051-0/+2
* ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLSYork Sun2017-01-049-64/+64
* ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to KconfigYork Sun2017-01-041-0/+14
* powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun2017-01-041-0/+15
* arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun2017-01-041-0/+21
* fsl_ddr: Move DDR config options to driver KconfigYork Sun2017-01-042-1/+123
* fsl/ddr: Add erratum_a009942_check_cpo and clean related erratumShengzhou Liu2016-12-053-31/+134
* fsl/ddr: Fix compiling warningShengzhou Liu2016-12-051-32/+25
* powerpc: MPC8555: Remove macro CONFIG_MPC8555York Sun2016-11-232-2/+2
* powerpc: mpc8541: Remove macro CONFIG_MPC8541York Sun2016-11-232-2/+2
* ddr: altera: Configuring SDRAM extra cycles timing parametersChin Liang See2016-10-271-0/+3
* Various, accumulated typos collected from around the tree.Robert P. J. Day2016-10-061-1/+1
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-09-264-40/+213
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| * driver: ddr: fsl_mmdc: Pass board parameters through data structureYork Sun2016-09-261-19/+19
| * ddr: fsl: fix a compile issueShaohui Xie2016-09-141-1/+6
| * driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012aShengzhou Liu2016-09-142-0/+157
| * driver/ddr/fsl: Revise workaround A008511 for A009803York Sun2016-09-141-36/+47
| * driver/ddr/fsl: Add more debug registersYork Sun2016-09-142-3/+3
* | drivers: squash lines for immediate returnMasahiro Yamada2016-09-233-25/+5
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* driver/ddr/fsl: Fix timing_cfg_2York Sun2016-08-021-1/+1
* Various, unrelated tree-wide typo fixes.Robert P. J. Day2016-07-161-1/+1
* driver/ddr/fsl: Check condition for erratum A-009803Shengzhou Liu2016-06-031-19/+23
* drivers/ddr/fsl: Disabling data init if ECC is not enabledYork Sun2016-06-031-1/+2
* drivers/ddr/fsl: Fix timing_cfg_2 registerYork Sun2016-06-031-1/+1
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