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* clk: renesas: Import R8A7794 E2 clock tablesMarek Vasut2018-01-243-0/+284
* clk: renesas: Import R8A7792 V2H clock tablesMarek Vasut2018-01-243-0/+257
* clk: renesas: Import R8A7791/R8A7793 M2 clock tablesMarek Vasut2018-01-243-0/+308
* clk: renesas: Import R8A7790 H2 clock tablesMarek Vasut2018-01-243-0/+303
* clk: renesas: Add Gen2 clock coreMarek Vasut2018-01-245-0/+339
* clk: renesas: Add DIV6P1 clock typeMarek Vasut2018-01-241-0/+6
* clk: renesas: Split out code shared between Gen2 and Gen3Marek Vasut2018-01-244-167/+203
* clk: renesas: Make clock tables Kconfig configurableMarek Vasut2018-01-242-5/+33
* clk: renesas: Split SMSTPCR and RMSTPCR tablesMarek Vasut2018-01-246-30/+57
* clk: renesas: Pull Gen3 specific bits into separate headerMarek Vasut2018-01-246-41/+64
* clk: renesas: Make PLL configurations per-SoCMarek Vasut2018-01-246-51/+178
* clk: renesas: Make clk_ids per-driverMarek Vasut2018-01-246-40/+143
* clk: renesas: Split RCar Gen3 driverMarek Vasut2018-01-247-903/+1052
* clk: Makefile: Sort entries alphabeticallyMario Six2018-01-211-10/+10
* clk: Remove superfluous gd declarationsMario Six2018-01-212-4/+0
* clk: clk_fixed_rate: Fix style violationMario Six2018-01-211-2/+2
* clk: clk-uclass: Fix style violationsMario Six2018-01-211-10/+10
* ARC: HSDK: CGU: Add 'Hz' when printing clock frequencyEugeniy Paltsev2018-01-191-3/+3
* ARC: HSDK: CGU: Use plat data instead of priv dataEugeniy Paltsev2018-01-191-1/+1
* ARC: HSDK: CGU: Update AXI, TUN, ARC clock optionsEugeniy Paltsev2018-01-191-6/+163
* board: stm32f429-disco: switch to DM STM32 clock driverPatrice Chotard2018-01-101-1/+6
* rockchip: clk: bind reset driverElaine Zhang2018-01-098-0/+70
* Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini2017-12-132-8/+286
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| * clk: rmobile: Add R8A77995 D3 clock tablesMarek Vasut2017-12-091-3/+164
| * clk: rmobile: Add R8A77970 V3M clock tablesMarek Vasut2017-12-092-4/+121
| * clk: rmobile: Fix typo in R8A7796 RPC clock table entryMarek Vasut2017-12-091-1/+1
* | ARC: clk: introduce HSDK CGU clock driverEugeniy Paltsev2017-12-113-0/+571
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* rockchip: rk3128: add clock driverKever Yang2017-11-302-1/+598
* Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini2017-11-301-0/+60
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| * clk: rmobile: Add R8A7796 xHCI clockMarek Vasut2017-11-301-0/+1
| * clk: rmobile: Move preboot clock shutdown to the driverMarek Vasut2017-11-301-0/+59
* | clk: at91: clk-generated: fix incorrect index of clk sourceWenyou Yang2017-11-291-6/+8
* | clk: at91: clk-generated: select absolute closest rateLudovic Desroches2017-11-291-3/+1
* | clk: at91: Kconfig: fix the dependency of AT91_UTMIWenyou Yang2017-11-291-3/+3
* | clk: clk_stm32fx: add clock configuration for mmc usagePatrice Chotard2017-11-291-1/+100
* | dm: misc: bind STM32F4/F7 clock from rcc MFD driverPatrice Chotard2017-11-291-41/+13
* | clk: stm32fx: migrate define from rcc.h to driverPatrice Chotard2017-11-291-1/+18
* | clk: stm32f7: rename clk_stm32f7.c to clk_stm32f.cPatrice Chotard2017-11-293-9/+13
* | clk: stm32f7: add STM32F4 supportPatrice Chotard2017-11-291-43/+66
* | clk: stm32f7: add dedicated STM32F7 compatible stringPatrice Chotard2017-11-291-0/+1
* | clk: stm32f7: retrieve PWR base address from DTPatrice Chotard2017-11-291-11/+21
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* rockchip: clk: rk3399: change extract_bits to bitfield_extractPhilipp Tomsich2017-11-261-6/+2
* rockchip: clock: update sysreset driver bindingKever Yang2017-11-218-24/+112
* clk: clk_stm32f7: fix PLL clock division factorPatrice Chotard2017-11-171-7/+9
* stm32: fix STMicroelectronics copyrightPatrice Chotard2017-11-062-4/+5
* rockchip: rk3399: init CPU clock when rkclk_init()Kever Yang2017-11-011-78/+79
* dm: clk: fix PWR_CR3 register's bit 2 namePatrice Chotard2017-10-161-4/+4
* dm: clk: remove CLK() macro for clk_stm32h7Patrice Chotard2017-10-161-115/+108
* clk: uniphier: add NAND controller clockMasahiro Yamada2017-10-151-0/+12
* clk: uniphier: add PXs3 clock dataMasahiro Yamada2017-10-153-0/+23
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