| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: sifive: Drop GEMGXL clock driver | Anup Patel | 2019-07-19 | 3 | -69/+0 |
| * | clk: sifive: Sync-up main driver with upstream Linux | Anup Patel | 2019-07-19 | 1 | -36/+60 |
| * | clk: sifive: Sync-up DT bindings header with upstream Linux | Anup Patel | 2019-07-19 | 1 | -1/+1 |
| * | clk: sifive: Sync-up WRPLL library with upstream Linux | Anup Patel | 2019-07-19 | 1 | -13/+13 |
| * | clk: sifive: Factor-out PLL library as separate module | Anup Patel | 2019-07-19 | 5 | -498/+1 |
| * | clk: sifive: Add clock driver for GEMGXL MGMT | Bin Meng | 2019-06-01 | 3 | -0/+69 |
| * | clk: sifive: fu540-prci: Change include order | Jagan Teki | 2019-05-09 | 1 | -1/+1 |
| * | clk: Add SiFive FU540 PRCI clock driver | Anup Patel | 2019-02-27 | 5 | -0/+1119 |
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index : delta/u-boot.git | |
| gitlab.denx.de: u-boot/u-boot.git |
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