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path: root/drivers/clk/renesas/r8a7796-cpg-mssr.c
Commit message (Expand)AuthorAgeFilesLines
* clk: renesas: Make reset controller modemr register offset configurableMarek Vasut2021-05-211-0/+1
* clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12Marek Vasut2021-05-211-22/+36
* clk: renesas: Only ever access documented bits in clock driver teardownMarek Vasut2021-04-251-11/+11
* dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-131-1/+1
* common: Drop linux/bitops.h from common headerWIP/2020-05-18-reduce-size-of-common.hSimon Glass2020-05-181-0/+1
* clk: renesas: Synchronize Gen3 tables with Linux 5.0Marek Vasut2019-04-091-34/+50
* clk: renesas: Add R8A77965 clock tablesMarek Vasut2019-04-091-19/+0
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
* clk: renesas: Add R8A77965 M3N entriesMarek Vasut2018-03-051-0/+19
* clk: renesas: Split SMSTPCR and RMSTPCR tablesMarek Vasut2018-01-241-6/+12
* clk: renesas: Pull Gen3 specific bits into separate headerMarek Vasut2018-01-241-0/+1
* clk: renesas: Make PLL configurations per-SoCMarek Vasut2018-01-241-0/+56
* clk: renesas: Make clk_ids per-driverMarek Vasut2018-01-241-0/+33
* clk: renesas: Split RCar Gen3 driverMarek Vasut2018-01-241-0/+246
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