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* Merge branch '2019-07-26-ti-imports'WIP/27Jul2019Tom Rini2019-07-278-63/+188
|\ | | | | | | | | - Bring in the rest of the J271E platform - Various OMAP3/AM3517, DA850 fixes
| * ARM: am3517_evm: Fix pin muxing to enable EHCI Host in the futureAdam Ford2019-07-271-13/+13
| | | | | | | | | | | | | | | | | | This patch enables the pinmuxing to support gpio_57 for phy reset and fixes the pinmuxing for the ECHI tranceiver. The clocks don't appear to by fully enabled yet, so OMAP-EHCI on am3517 is still not yet working, but we're one step closer. Signed-off-by: Adam Ford <aford173@gmail.com>
| * ARM: omap3_logic: Enable OMAP EHCI support for SOM-LV BoardsAdam Ford2019-07-271-0/+19
| | | | | | | | | | | | | | | | | | The SOM-LV boards support the OMAP EHCI driver using port 2. With the driver updated to support device tree, this patch sets the corresponding pin muxing for the tranceiver as well as the reset pin. Signed-off-by: Adam Ford <aford173@gmail.com>
| * ARM: am3517-evm: Remove non-DM legacy codeAdam Ford2019-07-261-11/+0
| | | | | | | | | | | | | | | | | | With both SPL and U-Boot now supporting DM, we can start removing legacy code. This patch removes the legacy MMC initalization and legacy I2C initialization since both are now available via DM and device tree. Signed-off-by: Adam Ford <aford173@gmail.com>
| * ARM: da850-evm: Remove repeated pinmuxing callsAdam Ford2019-07-261-4/+0
| | | | | | | | | | | | | | | | arch_cpu_init() initializes the pinmuxing which is called fairly early in the start sequences, so the board_init function doesn't need to do it again. This patch removes the call from board_init. Signed-off-by: Adam Ford <aford173@gmail.com>
| * ARM: da850-evm: Remove duplicate UART initializationAdam Ford2019-07-261-5/+0
| | | | | | | | | | | | | | | | The Low Level init functions start the UART, so it doesn't need to happen during board_init. This patch removes it from board_init. Signed-off-by: Adam Ford <aford173@gmail.com>
| * ARM: am3517-evm: Remove manual ethernet reset codeAdam Ford2019-07-261-30/+4
| | | | | | | | | | | | | | | | The reset line going to the ethernet controller is controlled by a global reset controlling multiple peripherals. There is no need to manually invoke the reset. Signed-off-by: Adam Ford <aford173@gmail.com>
| * configs: j721e_evm_a72: Add initial supportLokesh Vutla2019-07-261-0/+1
| | | | | | | | | | | | | | | | Add initial defconfig support for J721e that runs on A72. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Add MAINTAINERS entry] Signed-off-by: Tom Rini <trini@konsulko.com>
| * configs: j721e_evm_r5: Add initial supportLokesh Vutla2019-07-261-0/+6
| | | | | | | | | | | | | | | | Add initial defconfig support for J721e that runs on R5. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Add MAINTAINERS file] Signed-off-by: Tom Rini <trini@konsulko.com>
| * board: ti: j721e: Enable fixing up msmc sram nodeSuman Anna2019-07-261-0/+14
| | | | | | | | | | | | | | | | | | Create a ft_board_setup() api that gets called as part of DT fixup before jumping to kernel. In this ft_board_setup() call fdt_fixup_msmc_ram that update msmc sram node. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * board: ti: j721e: Add board support for j721e evmLokesh Vutla2019-07-263-0/+131
| | | | | | | | | | | | | | | | Add board specific initialization for j721e evm Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
* | Merge tag 'u-boot-imx-20190719' of ↵Tom Rini2019-07-2716-330/+115
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20190719 - CCF for i.MX6 - nandbcb command to write SPL into NAND - Switch to DM (i.MX28) - Boards: Toradex, engicam, DH - Fixes for i.MX8 - Fixes for i.MX7ULP Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
| * ARM: imx6: DHCOM i.MX6 PDK: Switch to DM for I2CLudwig Zenz2019-07-191-103/+12
| | | | | | | | | | | | | | | | | | | | | | | | This patch enables DM I2C for DHCOM i.MX6 PDK2 boards and removes non DM I2C code. The I2C EEPROM with ethaddr (MAC) is defined in the device tree. Use UCLASS_I2C_EEPROM to find the device by fixed hardware path and read the ethaddr. Tested with DHCOM i.MX6dl and DHCOM i.MX6q. Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * ARM: imx6: DHCOM i.MX6 PDK: enable pad pull ups of SS lines of spi used for bootLudwig Zenz2019-07-191-2/+7
| | | | | | | | | | | | | | | | | | | | It turned out that after a reset the boot process from the spi bootflash is disturbed by other spi slave devices connected to DHCOM SPI1, which uses the same spi interface with a different SS line. Therefore the pad pull ups are enabled. Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
| * toradex: configblock: avoid line continuationsMarcel Ziswiler2019-07-191-9/+6
| | | | | | | | | | | | | | | | | | Fix issue as reported by checkpatch.pl. Leave long lines as line continuation in text output is not recommended. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * toradex: configblock: fix apalis imx8 targetMarcel Ziswiler2019-07-191-1/+14
| | | | | | | | | | | | | | | | | | | | The Apalis iMX8 was missing the interactive part should a customer have bricked his module and want to re-create the configuration block. Fix this. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * toradex: configblock: fix colibri imx8x targetMarcel Ziswiler2019-07-191-4/+14
| | | | | | | | | | | | | | | | | | | | | | The Colibri iMX8X target got re-named late in the cycle which we forgot to reflect here. Furthermore, it was missing the interactive part should a customer have bricked his module and want to re-create the configuration block. Fix this. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * toradex: configblock: generic wi-fi/bt handlingMarcel Ziswiler2019-07-191-7/+9
| | | | | | | | | | | | | | | | | | | | Make the interactive Wi-Fi/BT handling generic by pulling it out of the Colibri iMX6ULL interactive part to be re-used for Apalis iMX8 and Colibri iMX8X. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * toradex: configblock: initialize MMC before switching partitionStefan Agner2019-07-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the module is in serial downloader mode, we do no longer read the environment from eMMC. Therefor, the eMMC is unitialized when trying to read the config block. Use mmc_init to initialize the selected MMC device before using it. Note: In case the MMC has already been initialized, the mmc_init detects that and returns immediately. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * ARM: imx6: DHCOM i.MX6 PDK: config SPL to load U-Boot fitImage with mulitple DTsLudwig Zenz2019-07-191-0/+15
| | | | | | | | | | | | | | | | | | Configure fitImage for U-Boot with a device tree for imx6 quad/dual and duallite/solo. This enables to support the imx6 derivates quad/dual/duallite/solo with a single binary. Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * ARM: imx: dh-imx6: Enable DM regulatorMarek Vasut2019-07-191-17/+0
| | | | | | | | | | | | | | | | | | | | Enable DM support for regulators and fixed regulator driver and convert USB Vbus control over to the regulators defined in DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ludwig Zenz <lzenz@dh-electronics.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by: Ludwig Zenz <lzenz@dh-electronics.com>
| * board: engicam: Remove bogus check for mmc for imx6ul isiotShyam Saini2019-07-191-2/+0
| | | | | | | | | | | | | | | | imx6ul-isiot-mmc.dts was removed in uboot version v2018.03 and from then onwards IMX6UL isiot uses imx6ul-isiot-emmc.dts for mmc, so remove unnecessary check for mmc. Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
| * mx6sxsabresd: imximage.cfg: Handle the CONFIG_SECURE_BOOT caseBreno Matheus Lima2019-07-191-0/+7
| | | | | | | | | | | | | | | | | | Secure boot is not enabled in mx6sxsabresd imximage.cfg, add support for it. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
| * arm: imx8: don't duplicate build_info()Anatolij Gustschin2019-07-194-52/+0
| | | | | | | | | | | | | | | | | | Move build_info() to common place. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * arm: imx8: factor out uart init codeAnatolij Gustschin2019-07-194-53/+12
| | | | | | | | | | | | | | | | | | | | | | New imx8 boards started adding duplicated UART init code. Factor out this to common function sc_pm_setup_uart(). Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * pico-imx7d: Enable DM_USBJoris Offouga2019-07-191-13/+0
| | | | | | | | | | | | | | This patch enable usb support with device-tree Signed-off-by: Joris Offouga <offougajoris@gmail.com> Reviewed-by: Jun Nie <jun.nie@linaro.org>
| * ARM: display5: Remove U_BOOT_DEVICE definition of serial_mxcLukasz Majewski2019-07-191-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Before the wide DM/DTS adoption in the U-Boot proper, the display5 has been using only DM_SERIAL to provide serial console in pre-relocation. After moving to full DM/DTS adoption in the U-Boot proper the U_BOOT_DEVICE definition is not needed anymore, as it has been replaced with udevice creation from provided DTS description. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * ARM: display5: Fix CS check after moving some SPI related CONFIGs to KconfigLukasz Majewski2019-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | After commit 14453fbfadc2 ("Convert CONFIG_SF_DEFAULT_* to Kconfig") and commit abe66b1b5dec ("Convert CONFIG_ENV_SPI_* to Kconfig") ,which moved some SPI related CONFIG_* defines to Kconfig the display5 board has become unbootable as the SPI CS check condition had wrong value. This commit fixes this check and allows proper SPI NOR flash operation in SPL. Signed-off-by: Lukasz Majewski <lukma@denx.de>
| * opos6uldev: remove board_ehci_hcd_init functionSébastien Szymanski2019-07-191-21/+0
| | | | | | | | | | | | | | | | This function sets the polarity of the PWR signal which is not used on the opos6uldev board. Remove it. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
| * mx7ulp_evk: Update DDR freq to 352.8Mhz for ULP B0Ye Li2019-07-192-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On i.MX7ULP B0, the DDR clock target is increased from 320Mhz to 380Mhz. We update DDR clock relevant settings to approach the target. But since the limitation on LCDIF pix clock for HDMI output (refer "mx7ulp_evk: Change APLL and its PFD0 frequencies"), we set DDR clock to 352.8Mhz (25.2Mhz * 14) by using the clock path: APLL PFD0 -> DDR CLK -> NIC0 -> NIC1 -> LCDIF clock To reduce the impact to entire system, the NIC0_DIV and NIC1_DIV are kept, so the divider 14 is calculated as: 14 = (NIC0_DIV + 1) * (NIC1_DIV + 1) * (LCDIF_PCC_DIV + 1) NIC0_DIV: 1 NIC1_DIV: 0 LCDIF_PCC_DIV: 6 APLL and APLL PFD0 settings: PFD0 FRAC: 27 APLL MULT: 22 APLL NUM: 1 APLL DENOM: 20 This patch applies the new settings for both DCD and plugin. There is no DDR script change on this new frequency. Overnight memtester is passed. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * mx7ulp: Select the SCG1 APLL PFD as a system clock sourceYe Li2019-07-192-2/+2
| | | | | | | | | | | | | | | | | | Due to the APLL out glitch issue, the APLLCFG PLLS bit must be set to select SCG1 APLL PFD for generating system clock to align with the design. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
| * mx7ulp_evk: Change APLL and its PFD0 frequenciesYe Li2019-07-192-2/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support HDMI display on EVK board, the LCDIF pix clock must be 25.2Mhz. Since the its PCC divider range is from 1-8, the max rate of LCDIF PCC source clock is 201.6Mhz. This limits the source clock must from NIC1 bus clock or NIC1 clock, other sources from APLL PFDs are higher than this max rate. The NIC1 bus clock and NIC1 clock are from DDRCLK whose parent source is APLL PFD0, so we must change the APLL PFD0 and have impact to DDRCLK, NIC1 and NIC1 bus. Eventually, this requests to set the APLL PFD0 frequency to 302.4Mhz (25.2 * 12), with settings: PFD0 FRAC: 32 APLL MULT: 22 APLL NUM: 2 APLL DENOM: 5 Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Fancy Fang <chen.fang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * mx7ulp_evk: Update LPDDR3 scriptYe Li2019-07-192-18/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Update LPDDR3 script with the changes below: -Update the precharge command to CMD=01 at the DDR initialization phase -remove unimplemented registers Write data bit delay --refer to the DDR_TRIM bits in IOMUXC1_DDR_SW_PAD_CTL_PAD_DDRn Test: One EVK board passes overnight stress test. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * mx7ulp: Fix APLL num and denom setting issueYe Li2019-07-192-24/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | For the current APLL setting, as we want the APLL PFD0 to meet DDR clock 320Mhz requirement. We set MULT to 20, NUM to 4 and DENOM to 2, to get final 22 multiplier. But according to the RM, the NUM should always be less than the DENOM. So our setting violates the rule. Actually the ROM has already set the MULT to 22 and leave NUM/DENOM in default value. The calculated APLL PFD0 clock is 318.9888Mhz, which also meet the DDR requirement. To fix the issue, we remove the PLL settings in DCD to use default value from ROM, and only set the PFD0 FRAC. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * ARM: imx6q_logic: With SPL_OF_CONTROL enabled, remove MMC initAdam Ford2019-07-191-11/+1
| | | | | | | | | | | | | | | | | | Since the board uses SPL_OF_CONTROL now, we don't need to explicitly initialize the MMC driver, but we still need to pinmux the corresponding pins. This patch removes the initialization code and leave just the muxing behind. Signed-off-by: Adam Ford <aford173@gmail.com>
* | net: davinci_emac: convert to using the driver modelBartosz Golaszewski2019-07-254-23/+1
| | | | | | | | | | | | | | | | | | | | Now that we removed all legacy boards selecting TI_EMAC we can completely convert the driver code to using the driver model. This patch also updates all remaining users of davinci_emac. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm & da850-evm Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* | Add support for the NXP LS1021A-TSN boardJianchao Wang2019-07-257-0/+409
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LS1021A-TSN is a development board built by VVDN/Argonboards in partnership with NXP. It features the LS1021A SoC and the first-generation SJA1105T Ethernet switch for prototyping implementations of a subset of IEEE 802.1 TSN standards. Supported boot media: microSD card (via SPL), QSPI flash. Rev. A of the board uses a Spansion S25FL512S_256K serial flash, which is 64 MB in size and has an erase sector size of 256KB (therefore, flashing the RCW would erase part of U-Boot). Rev. B and C of the board use a Spansion S25FL256S1 serial flash, which is only 32 MB in size but has an erase sector size of 64KB (therefore the RCW image can be flashed without erasing U-Boot). To avoid the problems above, the U-Boot base address has been selected at 0x100000 (the start of the 5th 256KB erase sector), which works for all board revisions. Actually 0x40000 would have been enough, but 0x100000 is common for all Layerscape devices. eTSEC3 is connecting directly to SJA1105 via an RGMII fixed-link, but SJA1105 is currently not supported by uboot. Therefore, eTSEC3 is disabled. Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Jianchao Wang <jianchao.wang@nxp.com> Signed-off-by: Changming Huang <jerry.huang@nxp.com> Signed-off-by: Vladimir Oltean <olteanv@gmail.com> [Vladimir] Code taken from https://github.com/openil/u-boot (which itself is mostly copied from ls1021a-iot) and adapted with the following changes: - Add a008850 errata workaround - Converted eTSEC, MMC to DM to avoid all build warnings - Plugged in distro boot feature, including support for extlinux.conf - Added defconfig for QSPI boot - Added the board/freescale/ls1021atsn/README.rst for initial setup - Increased CONFIG_SYS_MONITOR_LEN so that the SPL malloc pool does not get overwritten during copying of the u-boot.bin payload from MMC to DDR. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | arm: ls1021atwr: Convert to use driver model TSEC driverBin Meng2019-07-251-38/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have added driver model support to the TSEC driver, convert ls1021atwr board to use it. This depends on previous DM series for ls1021atwr: http://patchwork.ozlabs.org/patch/561855/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> [Vladimir] Made the following changes: - Added 'status = "disabled";' for all Ethernet ports in ls1021a.dtsi - Fixed the confusion between the SGMII/TBI PCS for enet0 and enet1 - a mistake ported over from Linux. Each SGMII PCS lies on the private MDIO bus of the interface (and the RGMII enet2 has no SGMII PCS). - Added CONFIG_DM_ETH to all ls1021atwr_* defconfigs - Completely removed non-DM_ETH support from ls1021atwr - Changed "compatible" string from "fsl,tsec-mdio" to "fsl,etsec2-mdio" and from "fsl,tsec" to "fsl,etsec2" to match Linux
* | doc: arch: Convert README.sandbox to reSTBin Meng2019-07-241-508/+0
| | | | | | | | | | | | | | Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge tag 'rockchip-for-v2019.07' of ↵WIP/21Jul2019Tom Rini2019-07-217-51/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - rk3399 lpddr4 support - rk3399-rock960 board support improvement - Eliminate pyelftools dependency by make_fit_atf.py - clean up rockchip dts to use -u-boot.dtsi - use ARM arch/generic timer instead of rk_timer - clean up Kconfig options for board support
| * | rockchip: Remove obsolete references to pyelftoolsChris Webb2019-07-201-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | make_fit_atf.py no longer requires pyelftools, and nothing else in the rockchip build requires it either, so remove references to installing it from the documentation. Signed-off-by: Chris Webb <chris@arachsys.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
| * | rockchip: board: rk3288: remove board_boot_order()Kever Yang2019-07-205-43/+0
| | | | | | | | | | | | | | | | | | | | | Prefer to use dts config instead, remove all board_boot_order() for rk3288 boards. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: rock960-rk3399: fix mail format in MAINTAINER fileKever Yang2019-07-191-2/+2
| |/ | | | | | | | | | | | | The mail format should have '<>', or else the patman won't recognize it correctley. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | riscv: sifive: fu540: Enable SiFive SPI and MMC SPI driversBhargav Shah2019-07-191-0/+6
| | | | | | | | | | | | | | | | | | | | | | This patch enables SiFive SPI and MMC SPI drivers for the SiFive Unleashed board. Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* | riscv: sifive: fu540: Setup ethaddr env variable using OTPAnup Patel2019-07-191-0/+122
| | | | | | | | | | | | | | | | This patch extends SiFive FU540 board support to setup ethaddr env variable based on board serialnum read from OTP. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | clk: sifive: Drop GEMGXL clock driverAnup Patel2019-07-191-1/+0
|/ | | | | | | | | | The GEMGXL clock driver is now directly part of Cadence MACB ethernet driver in upstream Linux kernel. There is no separate GEMGXL clock driver in upstream Linux kernel hence we drop GEMGXL clock driver from U-Boot as well. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch '2019-07-17-master-imports'Tom Rini2019-07-181-0/+1
|\ | | | | | | | | | | | | | | - Various FS/disk related fixes with security implications. - Proper fix for the pci_ep test. - Assorted bugfixes - Some MediaTek updates. - 'env erase' support.
| * qemu-riscv: enable VIRTIO_PCIDavid Abdurachmanov2019-07-181-0/+1
| | | | | | | | | | | | | | | | libvirt v.5.3.0 with QEMU 4.0.0 or above uses PCI automatically and thus devices (network, storage, etc) are connected via PCI. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | board: ti: am654: Use EEPROM-based board detectionAndreas Dannenberg2019-07-172-0/+248
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TI AM654x EVM base board and the associated daughtercards have on- board I2C-based EEPROMs containing board configuration data. Use the board detection infrastructure introduced earlier to do the following: 1) Parse the AM654x EVM base board EEPROM and populate items like board name and MAC addresses into the TI common EEPROM data structure residing in SRAM scratch space 2) Check for presence of daughter card(s) by probing the associated presence signals via an I2C-based GPIO expander. Then, if such a card is found, parse the data such as additional Ethernet MAC addresses from its on-board EEPROM and populate into U-Boot accordingly 3) Dynamically create an U-Boot ENV variable called overlay_files containing a list of daugherboard-specific DTB overlays based on daughercards found. This patch adds support for the AM654x base board ("AM6-COMPROCEVM") as well as for the IDK ("AM6-IDKAPPEVM"), OLDI LCD ("OLDI-LCD1EVM") PCIe/USB3.0 ("SER-PCIEUSBEVM"), 2 Lane PCIe/USB2.0 ("SER-PCIE2LEVM"), and general purpuse ("AM6-GPAPPEVM") daughtercards. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ti: common: am6: Add support for setting MAC addressesAndreas Dannenberg2019-07-172-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | The AM654x EVM based on the TI K3 family of SoCs has an updated board detection EEPROM structure that contains a TLV record of dedicated MAC addresses rather than a range of MAC addresses as it was used on earlier platforms such as DRA7. Add a basic function that allows us setting up Ethernet MAC addresses into the U-Boot environment based on the MAC address record contained in the common TI EEPROM structure. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
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