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* ARM: rmobile: Remove SCIF clock configuration from board filesMarek Vasut2017-09-242-4/+0
| | | | | | | | | The configuration is now fully performed by the SCIF and clk drivers, so remove it from the board file. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: rmobile: Remove AVB clock configuration from board filesMarek Vasut2017-09-242-6/+0
| | | | | | | | | The configuration is now fully performed by the AVB and clk drivers, so remove it from the board file. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: rmobile: Remove SD clock configuration from board filesMarek Vasut2017-09-242-35/+0
| | | | | | | | | The configuration is now fully performed by the SD and clk drivers, so remove it from the board file. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: rmobile: Move HSUSB configuration to board on ULCBMarek Vasut2017-09-121-0/+16
| | | | | | | | | | | | In order to use ehci-generic driver, move the configuration of HSUSB block into the board file. This configuration should not have been in the Gen3 EHCI USB driver in the first place, so move it to the board file until there is a proper infrastructure and driver for the HSUSB block. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: rmobile: Move HSUSB configuration to board on Salvator-XMarek Vasut2017-09-121-0/+16
| | | | | | | | | | | | In order to use ehci-generic driver, move the configuration of HSUSB block into the board file. This configuration should not have been in the Gen3 EHCI USB driver in the first place, so move it to the board file until there is a proper infrastructure and driver for the HSUSB block. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* board: Add stm32h7 SoC, discovery and evaluation boards supportPatrice Chotard2017-09-228-0/+179
| | | | | | | | | | | This patch adds support for stm32h7 soc family, stm32h743 discovery and evaluation boards. For more information about STM32H7 series, please visit: http://www.st.com/en/microcontrollers/stm32h7-series.html Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: STiH410-B2260: add fastboot supportPatrice Chotard2017-09-221-0/+42
| | | | | | | | | Add usb_gadget_handle_interrupts(), board_usb_init(), board_usb_cleanup() and g_dnl_board_usb_cable_connected() callbacks needed for FASTBOOT support Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* nds32: board: Fix andestech adp-ae3xx.c make fail problem.rick2017-09-211-0/+1
| | | | | | Add #include <asm/mach-types.h> to fix it. Signed-off-by: rick <rick@andestech.com>
* Merge git://www.denx.de/git/u-boot-imxTom Rini2017-09-2019-74/+416
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| * toradex: imx6: Move g_dnl_bind_fixup() into common SPL codeFabio Estevam2017-09-202-26/+0
| | | | | | | | | | | | | | | | Instead of having every board file to add its own g_dnl_bind_fixup() implementation, move it to the common imx6 SPL code. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Ɓukasz Majewski <lukma@denx.de>
| * board: ge: bx50v3: set eth0 MAC addressIan Ray2017-09-204-1/+363
| | | | | | | | | | | | | | | | Define i2c mux configuration. Add new vpd_reader which is used to read vital product data. Read VPD from EEPROM and set eth0 MAC address. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Jose Alarcon <jose.alarcon@ge.com>
| * detect and setup solidrun hummingboard2Dennis Gilmore2017-09-201-2/+33
| | | | | | | | | | | | | | | | | | | | | | The hummingboard2 is slightly different to the cubox i and to the hummingboard. The GPIO pin info to probe came from solidruns for of u-boot on github. https://github.com/SolidRun/u-boot-imx6/blob/imx6/board/solidrun/mx6_cubox-i/mx6_cubox-i.c#L569-L589 I have tested on a hummingboard-edge witha imx6 solo and 512mb of ram. Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
| * imx6: drop duplicated bss memset and board_init_r() callAnatolij Gustschin2017-09-188-42/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bss section is cleared in crt0.S. board_init_r() is also entered from crt0 code. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <lukma@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * pico-imx7d: Add "how to boot with NXP 4.1 Kernel"Vanessa Maegima2017-09-181-0/+17
| | | | | | | | | | | | | | | | The NXP 4.1 kernel needs to boot with secure boot. Add information on how to enable secure boot mode. Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
| * imx: imx7d: remove CamelCase from ENET_xMHz macrosEric Nelson2017-09-183-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Update these macros to use all upper-case to avoid checkpatch warnings: ENET_25MHz, ENET_50MHz, ENET_125MHz, Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* | rockchip: puma_rk3399: increase serialno_str sizeKlaus Goger2017-09-181-1/+1
| | | | | | | | | | | | | | Increase serialno_str to 17 bytes so it can hold the 16 bytes long serial nummer and the terminating null byte added by snprintf. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
* | rk3288: Add Vyasa initial board supportJagan Teki2017-09-184-0/+32
| | | | | | | | | | | | | | | | | | | | This patch adds support for Vyasa RK3288 initial board from Amarula Solutions. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: board: puma_rk3399: update README flash instructionsKlaus Goger2017-09-181-8/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | Puma supports other boot sources then SD-Card. Update README to include the required steps. * how to package a SPI-NOR SPL * how to flash eMMC with rkdeveloptool Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: board: lion_rk3368: update README flash instructionsKlaus Goger2017-09-181-2/+22
| | | | | | | | | | | | | | | | | | | | Add a section to the README on how to flash the on-board eMMC with the rkdeveloptool. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | x86: Support Intel Cherry Hill boardBin Meng2017-09-166-0/+653
|/ | | | | | | | | | | | | | | | | This adds support to Intel Cherry Hill board, a board based on Intel Braswell SoC. The following devices are validated: - serial port as the serial console - on-board Realtek 8169 ethernet controller - SATA AHCI controller - EMMC/SDHC controller - USB 3.0 xHCI controller - PCIe x1 slot with a graphics card - ICH SPI controller with an 8MB Macronix SPI flash - Integrated graphics device as the video console Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* blk: Remove various places that do flush cache after readBin Meng2017-09-151-2/+0
| | | | | | | | | | | | | | | | All these places seem to inherit the codes from the MMC driver where a FIXME was put in the comment. However the correct operation after read should be cache invalidate, not flush. The underlying drivers should be responsible for the cache operation. Remove these codes completely. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: York Sun <york.sun@nxp.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: York Sun <york.sun@nxp.com>
* GPT: create block device for sandbox testingAlison Chaiken2017-09-141-0/+5
| | | | | | | | | Provide a Python function that creates a small block device for the purpose of testing the cmd/gpt.c or cmd/part.c functions in the u-boot sandbox. Signed-off-by: Alison Chaiken <alison@peloton-tech.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm: am57xx: cl-som-am57x: Use new pinctrl macrosSuman Anna2017-09-141-52/+53
| | | | | | | | | | | | | | | | | | Commit 6ae4c3efbd62 ("ARM: DRA7: Add pinctrl register definitions") has added new macros for pinmux configuration in line with the kernel definitions. Fixup the current pinctrl data for the CompuLab CL-SOM-AM57x board to use these new macros to facilitate the removal of the old macros. NOTE: The PEN and PDIS macro values used previously were actually defined inversely, a value of 1 in bit position 16 actually means that the internal pullup/pulldown is disabled and not enabled as inferred by PEN. So, previous pinmux config data such as (PDIS | PTU) is confusing as it actually was meant for enabling internal pullup. The data is fixed up only to be equivalent to the previous data. Signed-off-by: Suman Anna <s-anna@ti.com>
* configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignmentWenyou Yang2017-09-148-14/+14
| | | | | | | | To remove the assignment of CONFIG_SYS_EXTRA_OPTIONS option, which is deprecated, use the CONFIG_XXXX_BOOT options to indicate the boot media, and the SoC is selected by the board. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
* board: atmel: Add SAMA5D27 SOM1 EK boardWenyou Yang2017-09-144-0/+218
| | | | | | | | | | | The SAMA5D27-SiP (System in Package) integrates the SAMA5D2 with 1Gbit DDR2-SDRAM in a single package. The SAMA5D27 SOM1 embeds a 64Mbit QSPI flash, KSZ8081 Phy and Mac-address EEPROM. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: sama5d2_xplained: Make SPL work on spiflashWenyou Yang2017-09-141-0/+10
| | | | | | | | | | | | Because before switching to a lower clock source, we must switch the clock source first instead of last. So before configuring the PMC_MCKR register, invoke at91_mck_init_down() first. As said in datasheet, the the size of SPL must not exceed the maximum size allowed(64Kbytes). Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* atmel: common: Add function to display via DM_VIDEO's APIWenyou Yang2017-09-142-0/+73
| | | | | | | | | Add a function to display the company's logo and board information via the API from DM_VIDEO. This function can be shared by other atmel boards, so locate it in board/atmel/common folder. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: davinci: Update da8xxevm MaintainersAdam Ford2017-09-131-8/+2
| | | | | | | | | | | | | The e-mail addresses for DA8XXEVM BOARD and DA850_AM18XXEVM BOARD are invalid. Remove DA8XXEVM. Update DA850_AM18XXEVM to have me be the maintainer since I work for Logic PD and have access to OMAP-L138 and AM1808 EVM kits. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_MAC_ADDR_IN_SPIFLASH et al to KconfigAdam Ford2017-09-131-0/+24
| | | | | | | | This converts the following to Kconfig: CONFIG_MAC_ADDR_IN_SPIFLASH CONFIG_MAC_ADDR_IN_EEPROM Signed-off-by: Adam Ford <aford173@gmail.com>
* davinci: da850evm: Make EEPROM MAC code configurableAdam Ford2017-09-131-1/+4
| | | | | | | | | | | There was a check for CONFIG_MAC_ADDR_IN_EEPROM and a check for CONFIG_MAC_ADDR_IN_SPIFLASH, however some of the EEPROM related code wasn't encapsulated inside the #if defined statement so the EEPROM code could get executed even when it wasn't explicitly enabled or wanted. Signed-off-by: Adam Ford <aford173@gmail.com>
* omap3: omap3_logic: Finish enabling fastboot on MUSBAdam Ford2017-09-131-0/+31
| | | | | | | | Either the USB and Fastboot were never finished, or somehow it got lost. This puts enough hooks back into omap3logic to enable fastboot and hopefully prepare it for Kconfig conversion. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: DRA72x: Add support for detection of DRA71x SR 2.1Vishal Mahaveer2017-09-121-0/+3
| | | | | | | | | DRA71x processors are reduced pin and software compatible derivative of DRA72 processors. Add support for detection of SR2.1 version of DRA71x family of processors. Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* davinci: da850-evm: switch to using TI_COMMON_CMD_OPTIONSAdam Ford2017-09-121-2/+2
| | | | | | | | Like the OMAP-L138 LCDK before it, let's move the da850-evm and the variations to TI_COMMON_CMD_OPTIONS to cut back one some of the defconfig entries. Signed-off-by: Adam Ford <aford173@gmail.com>
* omap3: am3517_evm: Enable TI_COMMON_CMD_OPTIONAdam Ford2017-09-121-0/+2
| | | | | | | | Enable TI_COMMON_CMD_OPTIONS and remove similar options from the defconfig. Updated with savedefconfig. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
* ARM: k2g: Add FIT image handler for PMMC firmwareAndrew F. Davis2017-09-121-0/+21
| | | | | | | | The PMMC firmware should be bundled into a FIT image on HS devices to allow authentication/decryption, add a handler to process this PMMC firmware. Signed-off-by: Andrew F. Davis <afd@ti.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-09-1217-11/+1607
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| * armv8: ls1088aqds: Add support of EC1 and EC2Prabhakar Kushwaha2017-09-111-0/+34
| | | | | | | | | | | | | | | | | | | | EC1 and EC2 are RGMII interface on ls1088aqds platform. This patch add support of RGMII with PHY and MDIO Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: Support to add RGMII for ls1088aqdsAshish Kumar2017-09-111-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for RGMII protocol NXP's LDPAA2 support RGMII protocol. LS1088A is the first Soc supporting both RGMII and SGMII. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1088aqds: Add support of LS1088AQDSAshish Kumar2017-09-118-5/+843
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support of LS1088AQDS platform. The LS1088A QorIQTM Development System (QDS) is a high-performance computing, evaluation, and development platform that supports the LS1088A QorIQ Architecture processor. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1088ardb: Add support for LS1088ARDB platformAshish Kumar2017-09-119-0/+711
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin platform that supports the LS1088A family SoCs. This patch add basic support of the platform. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> [YS: Disabled NAND in board header file] Reviewed-by: York Sun <york.sun@nxp.com> WIP: disable NAND for LS1088ARDB
| * armv8: LS2080ARDB: Add secure boot defconfig for QSPI boot.Udit Agarwal2017-09-111-0/+5
| | | | | | | | | | | | Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> [YS: dropped redundant commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * LS2080ARDB: QSPI boot: Secure Boot image validationUdit Agarwal2017-09-112-4/+7
| | | | | | | | | | | | | | | | | | | | Adds header address for PPA to be validated during ESBC phase for ARCH_LS2088 and QSPI_BOOT. Moves sec_init prior to ppa_init(). It must be initialized before the PPA. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> [YS: revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl-layerscape: Consolidate registers space defination for CCI-400 busAshish Kumar2017-09-114-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2017-09-121-4/+3
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| * | sandbox: Convert SANDBOX_BITS_PER_LONG to KconfigBin Meng2017-09-111-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | Convert SANDBOX_BITS_PER_LONG to Kconfig and assign it a correct number depending on which host we are going to build and run. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | board: sama5d4_xplained: Set mac address from eepromWenyou Yang2017-09-111-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Add the code to set the ethernet mac address from eeprom by using the common code from the common folder. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | board: sama5d2_xplained: Replace code to set mac addressWenyou Yang2017-09-111-42/+4
| | | | | | | | | | | | | | | | | | | | | | | | Replace the code to set the ethernet mac address with the code from the common folder. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | board: atmel: Create board/$(VENDOR)/common folderWenyou Yang2017-09-113-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | Create board/$(VENDOR)/common folder to accommodate the common code shared by other atmel boards, now put the code to set ethernet mac address from eeprom, which uses the i2c eeprom driver. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | board: ti: am57xx: Add dt support for BeagleBoard-X15 revCLokesh Vutla2017-09-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add support for selecting proper dtb for am57xx BeagleBoard X15 revC u-boot from FIT Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | board: ti: am571x: Add 666MHz support for AM571x IDKSteve Kipisz2017-09-111-2/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM571x supports DDR running at 666MHz. Right now it is clocked at 532MHz which is lower than what is supported. In order to have maximum performance on AM571-IDK, switch DDR to 666MHz. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>