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* sunxi: Add Bananapi M2+ H5 boardChen-Yu Tsai2019-02-181-1/+2
| | | | | | | | | | | | | | | | As the H5 is pin compatible with the H3, vendors tend to upgrade their existing H3 products with an H5 SoC swap. This is the case with the Bananapi M2+ H5. Add the following to support it: - device tree file: synced from Linux v5.0-rc1, - defconfig: copy of bananapi_m2_plus_h3_defconfig with only SoC family and default device tree file name changed - MAINTAINERS entry Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sunxi: Rename Sinovoip BPI M2 Plus to Bananapi M2 Plus H3Chen-Yu Tsai2019-02-181-5/+6
| | | | | | | | | | | | | | | | | | | | | The brand Sinovoip is used for Sinovoip's original VOIP products, while the Bananapi brand is for the single board computers they produce. This has been verified by Bananapi. Rename the board from "Sinovoip BPI M2 Plus" to "Bananapi M2 Plus". For the defconfig file, all lowercase is used. To support the H5 variant of this board, the "H3" suffix is added to the defconfig name. Also add myself as one of the board maintainers. As the device tree files were already correctly named, they do not require any changes. Signed-off-by: Chen-Yu Tsai <wens@csie.org> [jagan: removed unneeded message from commit body] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sunxi: board: do MMC pinmux setup for DM_MMC buildsAndre Przywara2019-01-291-0/+15
| | | | | | | | | | | | | | | | | | | Enabling DM_MMC skips the call to mmc_pinmux_setup() in board.c, as this is supposed to be handled by the MMC driver, using DT information. However we don't have a pinctrl driver yet, but would still like to keep the working pinmux setup for our MMC devices. So bring this particular call back to the DM_MMC code flow. When booting from either SD card or eMMC, the SPL does the setup for us, but when booting from SPI or USB we must not skip this part. Fixes, boot via FEL or SPI flash, where the SPL won't setup the pinmux Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> [jagan: add Fix details on commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* board: sun50i-h5: Add Emlid Neutis N5 supportAleksandr Aleksandrov2019-01-181-0/+5
| | | | | | | | | | | | | | | Emlid Neutis N5 is a SoM based on Allwinner H5, has a WiFi & BT module, DDR3 RAM and eMMC. - add neutis-devboard target to dtb makefile - add dtsi file for Neutis N5 needs - add config file for Neutis N5 Dev board Signed-off-by: Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [jagan: update proper commit head] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* sunxi: board: Add i2c initialization for sun50iStefan Mavrodiev2019-01-181-0/+12
| | | | | | | | | | | | | | | To use TWI0/1/2 the user can select CONFIG_I2C#_ENABLE. However even the controller is enabled, the mux for the pins are not set. This patch follows the existing mux method. Since the pads are different, separate check is added for each i2c. Tested with A64-SOM204 board. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* Revert "sunxi: board: Print error after power initialization fails"From: Karl Palsson2018-12-301-10/+8
| | | | | | | | | | | | | | | | | | | | | | Commit a8011eb84dfa("sunxi: board: Print error after power initialization fails") moved the DRAM init after the increase of the CPU clock frequency. This lead to various DRAM initialisation failures on some boards (hangs or wrong size reported, on a NanoPi Duo2 and OrangePi Zero, for instance). Lowering the CPU frequency significantly (for instance to 408 MHz) seems to work around the problem, so this points to some timing issues in the DRAM code. Debugging this sounds like a larger job, so let's just revert this patch to bring back those boards. Beside this probably unintended change the patch just moved the error message around, so reverting this is not a real loss. This reverts commit a8011eb84dfac5187cebf00ed8bc981bdb5c1fa1. Tested-By: Priit Laes <plaes@plaes.org> Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2018-12-101-1/+1
|\ | | | | | | - DWC3 and UDC cleanup
| * dm: usb: create a new UCLASS ID for USB gadget devicesJean-Jacques Hiblot2018-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host controllers, not gadget devices. Adding a new UCLASS for gadget devices alone. Also move the generic DM code for USB gadgets in a separate file for clarity. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
* | lib: merge CRC16-CCITT into u-boot/crc.hPhilipp Tomsich2018-12-081-1/+1
| | | | | | | | | | | | | | | | | | This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for rolling CRC16 into the hash infrastructure. Given that CRC8, CRC32 and CRC32-C already have their prototypes in a single header file, it seems a good idea to also include CRC16-CCITT in the same. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | sunxi: update README.sunxi64Andre Przywara2018-12-071-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the Allwinner port in the official mainline ARM Trusted Firmware repository has reached feature parity with the "legacy" ATF port, let's use the opportunity to update the Allwinner 64-bit build instructions. This changes: - Update ATF build instructions to use the mainline repo. - Add quick command lines for TL;DR people. - Mention Allwinner H6 build target. - Mention pre-built FEL binaries. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | sunxi: board: Print error after power initialization failsOlliver Schinagl2018-12-071-8/+10
|/ | | | | | | | | | | | | | Currently during init, we enable all power, then enable the dram and after that check whether there was an error during power-up. This makes little sense, we should enable power and then check if power was brought up properly before we continue to initialize other things. This patch moves the DRAM init after the power failure check. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
* sunxi: Update MAINTAINERS file for recent boardsTom Rini2018-11-161-0/+6
| | | | | | | | Add entries for the pine64-lts and pinebook configs. Cc: Vasily Khoruzhick <anarsoul@gmail.com> Cc: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* board: allwinner: sun50i-h6: Add Orangepi Lite2 supportJagan Teki2018-11-131-0/+5
| | | | | | | | | | | | | | | | OrangePi Lite2 is Allwinner H6 based open-source SBC, which support: - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 - GPU Mali-T720 - 1GB LPDDR3 RAM - AXP805 PMIC - AP6356S Wifi/BT - USB 2.0, USB 3.0 Host, OTG - HDMI port - 5V/2A DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
* sun50i: A64: add support for R_I2C controllerVasily Khoruzhick2018-11-131-0/+6
| | | | | | | | | | | | | | Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has two groups of pinmuxes on PL bank, so it's called R_I2C. Add support for this I2C controller and the pinmux which doesn't conflict with RSB. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Vagrant Cascadian <vagrant@debian.org> Acked-by: Jagan Teki <jagan@openedev.com>
* sunxi: add support for Banana Pi M2 Zero boardJun Nie2018-10-311-0/+5
| | | | | | | | | | | | Banana Pi M2 Zero is a board by Sinovoip with Allwinner H2+ SoC, 16-bit 512MiB DDR3 memory, a MicroSD slot, two MicroUSB ports (one OTG and one powering-only) and a miniHDMI port. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jun Nie <jun.nie@linaro.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> [jagan: Fixed board MAINTAINERS file] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* sunxi: store DRAM size in SPL headerAndre Przywara2018-10-291-1/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the moment we rely on the infamous get_ram_size() function to learn the actual DRAM size in U-Boot proper. This function has two issues: 1) It only works if the DRAM size is a power of two. We start to see boards which have 3GB of (usable) DRAM, so this does not fit anymore. 2) As U-Boot has no notion of reserved memory so far, it will happily ride through the DRAM, possibly stepping on secure-only memory. This could be a region of DRAM reserved for OP-TEE or some other secure payload, for instance. It will most likely crash in that case. As the SPL DRAM init routine has very accurate knowledge of the actual DRAM size, lets propagate this wisdom to U-Boot proper. We re-purpose a currently reserved word in our SPL header for that. The SPL itself stores the detected DRAM size there, and bumps the SPL header version number in that case. U-Boot proper checks for a valid SPL header and a high enough version number, then uses the DRAM size from there. If the SPL header field is not sufficient, we fall back to the old DRAM scanning routine. Part of the DRAM might be present and probed by SPL, but not accessible by the CPU. They're restricted in the main U-Boot binary, when accessing the DRAM size from SPL header. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sunxi: board.c: refactor SPL header checksAndre Przywara2018-10-291-11/+30
| | | | | | | | | | | | | So far we have two users which want to look at the SPL header. We will get more in the future. Refactor the existing SPL header checks into a common function, to simplify reusing the code. Now that this is easy, add proper version checks to the DT name parsing. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
* sunxi: Extend SPL header versioningAndre Przywara2018-10-291-2/+2
| | | | | | | | | | | | | | | | | | | | On Allwinner SoCs we use some free bytes at the beginning of the SPL image to store various information. We have a version byte to allow updates, but changing this always requires all tools to be updated as well. Introduce the concept of semantic versioning [1] to the SPL header: The major part of the version number only changes on incompatible updates, a minor number bump indicates backward compatibility. This patch just documents the major/minor split, adds some comments to the header file and uses the versioning information for the existing users. [1] https://semver.org Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
* sunxi: disable Pine A64 model detection code on other boardsIcenowy Zheng2018-10-291-0/+3
| | | | | | | | | | | | | | | | | | The Pine A64 Plus/non-Plus model detection code is now built on all 64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in use. Disable them when the board is Pine A64 by adding a Kconfig option that is only selected on Pine A64. On GCC 7.3.1 this makes the size of the function reduces 184 bytes, and saves a 104 byte strstr() function, then makes SPL on H6 succeed to build. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sunxi: docs: Mention CONFIG_NAND requirementPriit Laes2018-10-241-3/+3
| | | | | | Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sunxi: Fix typos of spelling AllwinnerPriit Laes2018-10-241-1/+1
| | | | | | Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* board: sunxi: Remove unused local variablesJagan Teki2018-08-201-2/+0
| | | | | | | | variables buf from board_mmc_init, and ret from misc_init_r were unused on the functions, so remove it. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* board: sun50i: h6: Add OrangePi One Plus initial supportJagan Teki2018-07-311-0/+5
| | | | | | | | | | | | | | | | OrangePi One Plus is Allwinner H6 based open-source SBC, which support: - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 - GPU Mali-T720 - 1GB LPDDR3 RAM - AXP805 PMIC - 1Gbps GMAC via RTL8211 - USB 2.0 Host, OTG - HDMI port - 5V/2A DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
* sunxi: add support for Pine H64 boardIcenowy Zheng2018-07-311-0/+5
| | | | | | | | | | | | | | | Pine H64 is a SBC with Allwinner H6 SoC produced by Pine64. It features 1GiB/2GiB/4GiB(3GiB usable) DRAM, two USB 2.0 ports, one USB 3.0 port and a mPCIE slot. Add support for it. The device tree is from Linux next-20180720. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
* sunxi: add MMC support for H6Icenowy Zheng2018-07-311-0/+7
| | | | | | | | | | | The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
* sunxi: change ATF position for H6Icenowy Zheng2018-07-311-2/+8
| | | | | | | | | | | | | | H6 has different SRAM A2 address, so the ATF load address is also different. Add judgment code to sunxi 64-bit FIT generation script. It will judge the SoC by the device tree's name. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
* sun50i: h5: Add initial Orange Pi Zero Plus supportHauke Mehrtens2018-06-161-0/+5
| | | | | | | | | | | | | | | | | | | | | | Orange Pi Zero Plus is an open-source single-board computer using the Allwinner H5 SOC. H5 Orangepi Zero Plus has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot - 16MBit SPI Nor flash - Debug TTL UART - 1GBit/s Ethernet (RTL8211E) - Wifi (RTL8189FTV) - USB 2.0 Host - USB 2.0 OTG + power supply The device tree file is copied from the Linux kernel 4.17. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sun8i: h2: Add initial Orange Pi R1 supportHauke Mehrtens2018-06-161-0/+5
| | | | | | | | | | | | | | | | | | | | | | | Orange Pi R1 is an open-source single-board computer using the Allwinner H2+ SOC. H2+ Orange Pi R1 has - Quad-core Cortex-A7 - 256MB DDR3 - micrSD slot - 128MBit SPI Nor flash - Debug TTL UART - 100MBit/s Ethernet (H2+) - 100MBit/s Ethernet (RTL8152B) - Wifi (RTL8189ETV) - USB 2.0 OTG + power supply This board is very similar to the Orange Pi Zero. The device tree file is copied from the Linux kernel 4.17. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* board: sun50i: Add Amarula A64-Relic initial supportJagan Teki2018-06-041-0/+6
| | | | | | | | | | | | | | | | | Amarula A64-Relic is A64 based IoT device, which support - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 1GB DDR3 RAM - 8GB eMMC - AP6330 Wifi/BLE - MIPI-DSI - CSI: OV5640 sensor - USB OTG - 12V DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
* sunxi: Drop legacy usb_phy.cJagan Teki2018-05-281-7/+0
| | | | | | | | | Allwinner PHY USB code is now part of generic-phy framework, so drop existing legacy handling like arch/arm/mach-sunxi.c and related code areas. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
* board: sunxi: Use generic-phy for board_usb_cable_connectedJagan Teki2018-05-281-1/+32
| | | | | | | | Allwinner PHY USB code is now part of generic-phy framework, so use it in board_usb_cable_connected. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
* Merge git://git.denx.de/u-boot-sunxiTom Rini2018-05-091-1/+8
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| * board: sunxi: sun8i-v40: Add Bananapi M2 Berry supportJagan Teki2018-05-071-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Banana Pi BPI-M2 Berry is a quad-core mini single board computer built with Allwinner V40 SoC. It features - Quad Core ARM Cortex A7 CPU V40 - 1GB of RAM . - microSD/SATA port.. - onboard WiFi and BT - 4 USB A 2.0 ports - 1 USB OTG port - 1 HDMI port - 1 audio jack - DC power port Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * sunxi: Add Libre Computer Board ALL-H3-CC H5 ver.Chen-Yu Tsai2018-05-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a device tree file for the H5 version of the Libre Computer Board ALL-H3-CC. It is the same board first introduced in commit afe27544125e ("sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H5 SoC, and has 4Gb DDR3 chips instead of 2Gb ones. The device tree utilizes the common board design file for ALL-H3-CC, providing just the model strings and SoC specifics. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sunxi: Add Libre Computer Board ALL-H3-CC H2+ ver.Chen-Yu Tsai2018-05-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a device tree file for the H2+ version of the Libre Computer Board ALL-H3-CC. It is the same board first introduced in commit afe27544125e ("sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H2+ SoC, and has only two 2Gb DDR3 chips instead of four. The device tree utilizes the common board design file for ALL-H3-CC, providing just the model strings and SoC specifics. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-072-5/+2
|/ | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* sunxi: README.sunxi64: Add hint about non-debug of ARM Trusted FirmwareAndre Przywara2018-04-041-0/+6
| | | | | | | | | | | | | | | | As we are running into issues where the final U-Boot FIT image file is exceeding our size limit, add a hint to the README.sunxi64 file to point out the possibility of building non-debug versions of the ATF binary. These are about 12KB smaller than the standard debug build, and so allow successful U-Boot builds for many boards with the Allwinner H5 SoC. Please note that under normal circumstances the debug build is still recommended, as it gives valuable clues in case something goes wrong in the ATF. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sunxi: spl: remove DMA related settings of the NAND controllerMiquel Raynal2018-04-031-5/+0
| | | | | | | | | Code has been changed to do not use DMA anymore with the NAND controller, instead PIO is used. Then, DMA-specific initialization may be dropped. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* sunxi: spl: deassert the NAND controller reset lineMiquel Raynal2018-04-031-0/+4
| | | | | | | Ensure the NAND controller reset line is deasserted before use. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* sunxi: Add A20-SOM204-EVB-eMMC boardStefan Mavrodiev2018-03-131-0/+1
| | | | | | | | | | | | A20-SOM204 board has option with onboard 16GB eMMC. The chip is wired to MMC2 slot. This patch adds defconfig and dts files for this board. The dts is same with mainline kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sunxi: Add A20-SOM204-EVB boardStefan Mavrodiev2018-03-131-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is new System-On-Module platform with universal dimm socket for easy insertation. The EVB board is designed to be universal with future modules. Base features of A20-SOM204 board includes: * 1GB DDR3 RAM * AXP209 PMU * KSZ9031 Gigabit PHY * AT24C16 EEPROM * Status LED * LCD connector * GPIO connector There will be variants with the following options: * Second LAN8710A Megabit PHY * 16MB SPI Flash memory * eMMC card * ATECC508 crypto device The EVB board has: * Debug UART * MicroSD card connector * USB-OTG connector * Two USB host * RTL8723BS WiFi/BT combo * IrDA transceiver/receiver * HDMI connector * VGA connector * Megabit ethernet transceiver * Gigabit ethernet transceiver * SATA connector * CAN driver * CSI camera * MIC and HP connectors * PCIe x4 connector * USB3 connector * Two UEXT connectors * Two user LEDs Some of the features are multiplexed and cannot be used the same time: CAN and Megabit PHY. Others are not usable with A20 SoC: PCIe and USB3. This patch adds defconfig and dts files for this board. The dts is same with mainline kernel, except some nodes are removed to make file compatible with existing dtsi file. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* ARM: sunxi: Build u-boot-sunxi-with-spl.bin on ARM64 as wellTuomas Tynkkynen2018-03-131-2/+1
| | | | | | | | | | | | In README.sunxi64 we tell the user how to optionally create u-boot-sunxi-with-spl.bin by manually running cat. Instead, have the build system create the file automatically just like it does for 32-bit sunxi boards. Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>Masahiro Yamada2018-03-051-1/+1
| | | | | | | | | | | | | | | | | Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* MAINTAINERS: Update email address for Maxime RipardMaxime Ripard2018-02-041-3/+3
| | | | | | | Free Electrons is no more and is now known as Bootlin, change my email address accordingly. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* sunxi: Transition from the MMC to a FAT-based environmentMaxime Ripard2018-01-271-0/+16
| | | | | | | | | | | | | | | | | | The current environment has been hardcoded to an offset that starts to be an issue given the current size of our main U-Boot binary. By implementing a custom environment location routine, we can always favor the FAT-based environment, and fallback to the MMC if we don't find something in the FAT partition. We also implement the same order when saving the environment, so that hopefully we can slowly migrate the users over to FAT-based environment and away from the raw MMC one. Eventually, and hopefully before we reach that limit again, we will have most of our users using that setup, and we'll be able to retire the raw environment, and gain more room for the U-Boot binary. Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* sunxi: arm64: correct usage of DT node address in FIT generationAndre Przywara2018-01-151-8/+8
| | | | | | | | | | | The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Adjust the FIT build script for 64-bit Allwinner boards to remove the bogus addresses from the node names and avoid the warnings. This avoids a warning with recent versions of the dtc tool. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: maintainers: Add myself for the TBS A711Maxime Ripard2018-01-101-0/+5
| | | | | | | | | Support for that board got introduced recently without the maintainers part. Let's fix that. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver.Chen-Yu Tsai2018-01-101-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Libre Computer Board ALL-H3-CC from Libre Technology is a Raspberry Pi B+ form factor single board computer based on the Allwinner H3 SoC. The board has 1GB DDR3 SDRAM, provided by 4 2Gb chips. The mounting holes and connectors are in the exact same position as on the Raspberry Pi B+. Raspberry Pi B+ like peripherals supported on this board include: - Power input through micro-USB connector (without USB OTG) - Native 100 Mbps ethernet using the internal PHY, as opposed to USB-based on the RPi - 4x USB 2.0 host ports, directly connected to the SoC, as opposed to being connected through a USB 2.0 hub on the RPi - TV and audio output on a 3.5mm TRRS jack - HDMI output - Micro-SD card slot - Standard RPi B+ GPIO header, with the standard peripherals routed to the same pins. * 5V, 3.3V power, and ground * I2C0 on the H3 is routed to I2C1 pins on the RPi header * I2C1 on the H3 is routed to I2C0 pins on the RPi header * UART1 on the H3 is routed to UART0 pins on the RPi header * SPI0 on the H3 is routed to SPI0 pins on the RPi header, with GPIO pin PA17 replacing the missing Chip Select 1 * I2S1 on the H3 is routed to PCM pins on the RPi header - Additional peripherals from the H3 are available on different pins. These include I2S0, JTAG, PWM1, SPDIF, SPI1, and UART3 In addition, there are a number of new features: - Console UART header - Consumer IR receiver - Camera interface (not compatible with RPi) - Onboard microphone - eMMC expansion module port - Heatsink mounting holes This patch adds defconfig and dts files for this board. The dts file is the same as the one submitted for inclusion in Linux, with some minor revisions to match the dtsi file and old EMAC bindings in U-boot. Since the OTG controller is wired to a USB host port, and the H3 has proper USB hosts to handle host mode, the MUSB driver is not enabled. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* sunxi: Fix A20-OLinuXino-MICRO LAN8710 supportStefan Mavrodiev2017-12-071-0/+4
| | | | | | | | | | | >From revision J the board uses new phy chip LAN8710. Compared with RTL8201, RA17 pin is TXERR. It has pullup which causes phy not to work. To fix this PA17 is muxed with GMAC function. This makes the pin output-low. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* sun50i: h5: Add NanoPi Neo Plus2 DT initial supportAntony Antony2017-11-211-0/+5
| | | | | | | | | | | | | | Add initial DT for NanoPi NEO Plus2 by FriendlyARM - Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU - 1 GB DDR3 RAM - 8GB eMMC flash (Samsung KLM8G1WEPD-B031) - micro SD card slot - Gigabit Ethernet (external RTL8211E-VB-CG chip) - 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module) - 2x USB 2.0 host ports Signed-off-by: Antony Antony <antony@phenome.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
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