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* ARM: at91: ma5d4: Support both SF and eMMC SoMsMarek Vasut2017-06-291-2/+24
| | | | | | | | | Discern the SoMs based on the presence of SPI flash to support both variants of the SoM, one booting from SPI NOR and one booting from eMMC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: at91: ma5d4: Boot from MMC2 when using SAM-BAMarek Vasut2017-06-291-0/+18
| | | | | | | | | | | Continue loading U-Boot from MMC2 when the SPL was loaded using SAM-BA loader. This allows the board to boot system from the removable media instead of the eMMC, which is useful for commissioning purposes. When booting from the eMMC, always boot from it as it is not possible to boot from the SD interface directly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: at91: ma5d4: Swap SD/MMC controller orderMarek Vasut2017-06-291-3/+2
| | | | | | | | | The SDHCI1 is the primary boot controller on rev. 2.1 SoM, which is the version available on the market. Swap the controller order to match this and future versions of the SoM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: at91: ma5d4: Init SD/MMC controller in SPLMarek Vasut2017-06-291-0/+6
| | | | | | | | Init the controllers, otherwise the board cannot boot from SD/MMC. This boot option is new on rev. 2.1 SoM . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: at91: ma5d4: Reset CAN controllers lateMarek Vasut2017-06-291-6/+6
| | | | | | | | | The CAN controllers need slight delay between toggling of their reset line. Move this action into board_init(), otherwise timer will not be initialized and the board might hang. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: at91: ma5d4: Switch DDR2 controller to sequencial address decodingMarek Vasut2017-06-291-1/+0
| | | | | | | | | | | According to the datasheet, sequential mapping is used for DDR SDRAM, while interleaved mapping is used for regular SDRAM. Incorrect configuration of this bit does indeed cause sporadic memory instability. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Wenyou Yang <wenyou.yang@atmel.com>
* ARM: atmel: Rename MA5D4EVKMarek Vasut2017-06-294-0/+437
| | | | | | The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2017-04-147-0/+1328
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| * ARM: socfpga: Rename MCVEVKMarek Vasut2017-04-147-0/+1328
| | | | | | The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2017-04-131-1/+3
| | | | | | Drop CONFIG_STACKSIZE from include/configs/imx6_logic.h Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: mx5: Rename M53EVKMarek Vasut2017-04-055-0/+523
| | | | | | The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de>
* ARM: mxs: Rename M28EVKMarek Vasut2017-04-056-0/+425
The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de>
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