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* arm: dts: add missing vexpress device treesHeinrich Schuchardt2019-04-266-0/+2222
| | | | | | | | | | | | | | | | | | | | | Add the device trees for * vexpress_ca5x2_defconfig * vexpress_ca9x4_defconfig * vexpress_ca15_tc2_defconfig as available in Linux 5.1 rc5. We are using the vexpress_ca15_tc2_defconfig and vexpress_ca9x4_defconfig for Travis testing via QEMU. The UEFI base Embedded Base Boot Requirements Specification (EBBR) requires that an embedded board either provides a device tree or an ACPI table. All block devices are meant to be moved to the driver model. On ARM this requires a device tree. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* arm: lpc32xx: Fix timer initializationGregory CLEMENT2019-04-261-0/+3
| | | | | | | | | | | | The match controller register is not cleared during initialization. However, some bits of this register may reset the TC if tnMRx match it. As we can't make any assumption about how U-Boot is launched by the first stage bootloader (such as S1L) clearing this register ensure that the timers work as expected. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm: mach-k3: Add secure device build supportAndrew F. Davis2019-04-262-0/+69
| | | | | | | | | K3 HS devices require signed binaries for boot, use the SECDEV tools to sign the boot artifacts during build. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
* arm: mach-k3: Add secure device supportAndrew F. Davis2019-04-263-1/+65
| | | | | | | | | | | K3 devices have High Security (HS) variants along with the non-HS already supported. Like the previous generation devices (OMAP/Keystone2) K3 supports boot chain-of-trust by authenticating and optionally decrypting images as they are unpacked from FIT images. Add support for this here. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
* arm: K3: Avoid use of MCU_PSRAM0 before SYSFW is loadedAndrew F. Davis2019-04-262-8/+8
| | | | | | | | | | | | | | On HS devices the 512b region of reset isolated memory called MCU_PSRAM0 is firewalled by default. Until SYSFW is loaded we cannot use this memory. It is only used to store a single value left at the end of SRAM by ROM that will be needed later. Save that value to a global variable stored in the .data section. This section is used as .bss will be cleared between saving this value and using it. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* Merge git://git.denx.de/u-boot-marvellTom Rini2019-04-2612-88/+184
|\ | | | | | | | | | | | | | | | | | | | | - Add DM based generic watchdog start and reset implementation and remove all ad-hoc implementations (Stefan) - Move mv_sdhci to DM (Pierre) - Misc turris_omnia updates (Pierre) - Change openrd targets to correctly build again (size changes and fixes to the dts targets) and bring it back into Travis builds (Stefan) - Add Kirkwood db-88f6281-bp board (Chris)
| * watchdog: at91sam9_wdt: Remove now superfluous wdt start and resetStefan Roese2019-04-262-47/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | With the new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). The watchdog servicing is enabled via CONFIG_WATCHDOG. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Eugen Hristev <eugen.hristev@microchip.com>
| * watchdog: mpc8xx_wdt: Watchdog driver and macros cleanupStefan Roese2019-04-262-4/+4
| | | | | | | | | | | | | | | | | | | | | | With the generic watchdog driver now implemented, this patch removes some legacy stuff from the MPC8xx watchdog driver and its Kconfig integration. CONFIG_MPC8xx_WATCHDOG is completely removed and hw_watchdog_reset() is made static, as the watchdog will now get serviced via the DM infrastructure if enabled via CONFIG_WATCHDOG. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Christophe Leroy <christophe.leroy@c-s.fr>
| * watchdog: Implement generic watchdog_reset() versionStefan Roese2019-04-261-36/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch tries to implement a generic watchdog_reset() function that can be used by all boards that want to service the watchdog device in U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG. Without this approach, new boards or platforms needed to implement a board specific version of this functionality, mostly copy'ing the same code over and over again into their board or platforms code base. With this new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). This patch also adds a new flag to the GD flags, to flag that the watchdog is ready to use and adds the pointer to the watchdog device to the GD. This enables us to remove the global "watchdog_dev" variable, which was prone to cause problems because of its potentially very early use in watchdog_reset(), even before the BSS is cleared. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Marek Behún" <marek.behun@nic.cz> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Maxim Sloyko <maxims@google.com> Cc: Erik van Luijk <evanluijk@interact.nl> Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Simon Glass <sjg@chromium.org> Cc: "Álvaro Fernández Rojas" <noltari@gmail.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
| * ARM: kirkwood: add db-88f6281-bp boardChris Packham2019-04-265-0/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is Marvell's Kirkwood development board. It has the following features - 512M DDR2 - 2 PCI connectors - 1 x1 PCI-e interface - 1 Gigabit Ethernet Port - 2 SATA Ports - USB 2.0 Interface - SDIO - 128M NAND Flash - 16M SPI Flash It can be strapped to boot from SPI or NAND so there are two defconfigs (one per boot media). Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: kirkwood: dts: Add openrd-* dtb makefile build targetsStefan Roese2019-04-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following Kirkwood dtb build targets are currently missing: kirkwood-openrd-base.dtb kirkwood-openrd-client.dtb kirkwood-openrd-ultimate.dtb This patch adds them to the Makefile to fix the build error. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chris Packham <judge.packham@gmail.com> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * mmc: mv_sdhci: add driver model supportPierre Bourdon2019-04-262-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The new DM implementation currently does not support the Sheeva 88SV331xV5 specific quirk present in the legacy implementation. The legacy code is thus kept for this SoC and others not yet migrated to DM_MMC. Signed-off-by: Pierre Bourdon <delroth@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2019-04-263-2/+27
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| * arm: socfpga: mailbox: Fix off-by-one error on command length checkingLey Foon Tan2019-04-251-2/+2
| | | | | | | | | | | | | | | | | | | | A mailbox command contains 1-u32 header + arguments. The "len" variable only contains the length of the arguments, but not the 1-u32 header. Include the length of header when checking the ring buffer space to prevent off-by-one error. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
| * arm: socfpga: gen5: reduce SPL pre-reloc mallocSimon Goldschmidt2019-04-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By enabling debug prints in malloc_simple, we can see that SPL for socfpga gen5 does by far not need the 8 KiB malloc pool currently allocated for SPL in pre-reloc phase. On socfpga_socrates, 1304 bytes are currently used (and this increases by ~200 bytes only for the sdram/reset fixes in socfpga-next). To prevent wasting precious SRAM space, let's reduce the initial heap used for SPL to 2 KiB. This is still some hundred bytes more than currently used. Also, the gen5 SPL enables stack and heap in DDR memory pretty early. Only the initial uclass/dm parsing, serial console and DDR initialization is done in the initial heap, so these 2 KiB should be enough for all boards. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
| * arm: socfpga: imply/default common config optionsSimon Goldschmidt2019-04-252-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit moves common config options used in all socfpga boards to select/imply in Kconfig. This both cleans up the defconfig files as well as makes future changes easier. Options implied/defaulted for all sub-arches: - SPL, SPL_DM, USE_TINY_PRINTF, NR_DRAM_BANKS Options implied/defaulted for implied for A10 & gen5: - FPGA_SOCFPGA, SYS_MALLOC_F_LEN, SYS_TEXT_BASE Options implied/defaulted for gen5: - SPL_STACK_R, SPL_SYS_MALLOC_SIMPLE, SPL_STACK_R_ADDR Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* | Merge tag 'pull-24apr19' of git://git.denx.de/u-boot-dmTom Rini2019-04-245-17/+72
|\ \ | | | | | | | | | | | | | | | Various minor sandbox iumprovements Fixes for tracing with sandbox Refactoring for boot_get_fdt()
| * | dm: core: Change platform specific translation-offset handlingStefan Roese2019-04-232-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Testing has shown that the current DM implementation of a platform / board specific translation offset, as its needed for the SPL on MVEBU platforms is buggy. The translation offset is confingured too late, after the driver bind functions are run. This may result in incorrect address translations. With the current implementation its not possible to configure the offset earlier, as the DM code has not run at all. This patch now removed the set_/get_translation_offset() calls and moves the translation offset into the GD variable translation_offset. This variable will get used when CONFIG_TRANSLATION_OFFSET is enabled. This option is enabled only for MVEBU on ARM32 platforms, where its currenty needed and configured in the SPL. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Pierre Bourdon <delroth@gmail.com> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Tested-by: Pierre Bourdon <delroth@gmail.com> Tested-by: Baruch Siach <baruch@tkos.co.il>
| * | sandbox: Drop the printf() in setup_ram_buf()Simon Glass2019-04-231-3/+1
| | | | | | | | | | | | | | | | | | This was really intended for debugging. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | sandbox: Correct maths in allocation routinesSimon Glass2019-04-231-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allocation routines were adjusted to ensure that the returned addresses are a multiple of the page size, but the header code was not updated to take account of this. These routines assume that the header size is the same as the page size which is unlikely. At present os_realloc() does not work correctly due to this bug. The only user is the hostfs 'ls' command, and only if the directory contains a unusually long filename, which likely explains why this bug was not caught earlier. Fix this by doing the calculations using the obtained page size. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | sandbox: Improve debugging in initcall_run_list()Simon Glass2019-04-233-2/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present if one of the initcalls fails on sandbox the address printing is not help, e.g.: initcall sequence 0000557678967c80 failed at call 00005576709dfe1f (err=-96) This is because U-Boot gets relocated high into memory and the relocation offset (gd->reloc_off) does not work correctly for sandbox. Add support for finding the base address of the text region (at least on Linux) and use that to set the relocation offset. This makes the output better: initcall sequence 0000560775957c80 failed at call 0000000000048134 (err=-96) Then you use can use grep to see which init call failed, e.g.: $ grep 0000000000048134 u-boot.map stdio_add_devices Of course another option is to run it with a debugger such as gdb: $ gdb u-boot ... (gdb) br initcall.h:41 Breakpoint 1 at 0x4db9d: initcall.h:41. (2 locations) Note that two locations are reported, since this function is used in both board_init_f() and board_init_r(). (gdb) r Starting program: /tmp/b/sandbox/u-boot [Thread debugging using libthread_db enabled] Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1". U-Boot 2018.09-00264-ge0c2ba9814-dirty (Sep 22 2018 - 12:21:46 -0600) DRAM: 128 MiB MMC: Breakpoint 1, initcall_run_list (init_sequence=0x5555559619e0 <init_sequence_f>) at /scratch/sglass/cosarm/src/third_party/u-boot/files/include/initcall.h:41 41 printf("initcall sequence %p failed at call %p (err=%d)\n", (gdb) print *init_fnc_ptr $1 = (const init_fnc_t) 0x55555559c114 <stdio_add_devices> (gdb) Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Merge tag 'u-boot-stm32-mcu-20190423' of https://github.com/pchotard/u-bootTom Rini2019-04-2428-1127/+2625
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | STM32 MCUs update: - DT rework and alignment with DT kernel v4.20 - mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20 - mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20 - configs: update for F746/769 boards
| * | | ARM: dts: stm32: Update sdmmc binding for stm32mp157c-ed1Patrice Chotard2019-04-231-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update some sdmmc properties which have been updated with v4.19 DT bindings: - st,dirpol becomes st,sig-dir - st,negedge becomes st,neg-edge - st,pin-ckin becomes st,use-ckin Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: stm32: Update sdmmc binding for stm32h743i-evalPatrice Chotard2019-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update some sdmmc properties which have been updated with v4.19 DT bindings: - st,dirpol becomes st,sig-dir - st,negedge becomes st,neg-edge - st,pin-ckin becomes st,use-ckin Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: stm32: Restore old usart1 clock bindings for stm32f7Patrice Chotard2019-04-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As U-boot stm32f clock driver doesn't support new bindings for auxiliary clocks (clocks = <&rcc 1 ....>), restore old bindings for usart1 to get console output. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: stm32: Sync DT with v4.20 kernel for stm32h7Patrice Chotard2019-04-235-132/+639
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Synchronize stm32h7 device tree with kernel v4.20. U-boot DT files and pinctrl bindings are updated, useless nodes are removed and gpio compatible added. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: Migrate U-boot nodes to U-boot DT files for stm32h7Patrice Chotard2019-04-237-201/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to prepare and ease future DT synchronization with kernel DT, migrate all U-boot specific nodes/properties/addons to U-boot DT files. As sdmmc is not yet supported on kernel side, sdmmc nodes are located in eval-u-boot and disco-u-boot DT files. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7Patrice Chotard2019-04-2311-500/+1287
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Synchronize stm32f7 device tree with kernel v4.20. All pinctrl bindings are updated. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: stm32: Migrate U-boot nodes to U-boot DT files for stm32f7Patrice Chotard2019-04-238-598/+718
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to prepare and ease future DT synchronization with kernel DT, migrate all U-boot specific nodes/properties/addons to U-boot DT files. Migrate also DT nodes which are not yet available on kernel DT side as ethernet, ltdc and qspi nodes. Fix ethernet_mii pins and add missing qspi_pins for stm32746g-eval Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: stm32: Sync DT files with v4.20 kernel for stm32f4Patrice Chotard2019-04-237-37/+138
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize stm32f7 device tree with kernel v4.20. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM:dts: stm32: sort nodes by alphabetical order in f4 u-boot filesPatrice Chotard2019-04-232-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | Sort nodes alphabetically to be coherent with all others STM32 DT files. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* | | | Merge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogicTom Rini2019-04-2417-21/+1418
|\ \ \ \ | |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add support for Amlogic p200 & p201 Reference Designs - Add Amlogic SoC information display - Add support for the Libretech-AC AML-S805X-AC board - Add Amlogic AXG reset compatible - Add I2C support for Amlogic AXG - Fix AXG PIN and BANK pinctrl definitions - Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset - Add initial support for Amlogic G12A SoC and U200 board - Enable PHY_REALTEK for selected boards - Fix Khadas VIM2 README
| * | | ARM: dts: Import Amlogic G12A u200 DT from Linux 5.1-rc1Neil Armstrong2019-04-233-1/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Import Linux 5.1-rc1 DT from 9e98c678c2d6 ("Linux 5.1-rc1") for the meson-g12a-u200 board, the meson-g12a.dtsi and the corresponding bindings. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | | ARM: meson: add G12a supportJerome Brunet2019-04-234-1/+225
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Amlogic G12A SoC, which is a mix between the new physical memory mapping of AXG and the functionnalities of the previous Amlogic GXL/GXM SoCs. To handle the internal ethernet PHY, the Amlogic G12A SoCs now embeds a dedicated PLL to feed the internal PHY. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | | clk: meson: add g12a supportJerome Brunet2019-04-231-0/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for the Amlogic G12A clock controller based on the AXG driver. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | | regmap: fix regmap_read_poll_timeout warning about sandbox_timer_add_offsetNeil Armstrong2019-04-231-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When fixing sandbox test for regmap_read_poll_timeout(), the sandbox_timer_add_offset was introduced but only defined in sandbox code thus generating warnings when used out of sandbox : include/regmap.h:289:2: note: in expansion of macro 'regmap_read_poll_timeout_test' regmap_read_poll_timeout_test(map, addr, val, cond, sleep_us, \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/spi/meson_spifc.c:169:8: note: in expansion of macro 'regmap_read_poll_timeout' ret = regmap_read_poll_timeout(spifc->regmap, REG_SLAVE, data, ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/spi/meson_spifc.c: In function 'meson_spifc_txrx': include/regmap.h:277:4: warning: implicit declaration of function 'sandbox_timer_add_offset' [-Wimplicit-function-declaration] This fix adds a timer_test_add_offset() only defined in sandbox, and renames the previous sandbox_timer_add_offset() to it. Cc: Simon Glass <sjg@chromium.org> Reported-by: Tom Rini <trini@konsulko.com> Fixes: df9cf1cc08 ("test: dm: regmap: Fix the long test delay") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | ARM: dts: Import libretech-ac DT from Linux 5.0Neil Armstrong2019-04-103-9/+310
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import Linux 5.0 DT from 1c163f4c7b3f ("Linux 5.0") for the meson-gxl-s805x-libretech-ac board and the corresponding changes in meson-gxl.dtsi. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | | ARM: meson: display Amlogic SoC InformationJulien Masson2019-04-102-1/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Amlogic SoCs have a registers containing the die revision and packaging type to determine the SoC family and package marketing name like S905X for the GXL SoC Family. This code is taken from the Linux meson-gx-socinfo driver and adapted to U-Boot printing. Signed-off-by: Julien Masson <jmasson@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [narmstrong: also updated new p200/p201 defconfigs]
| * | | ARM: dts: meson: add u-boot.dtsi for p200 and p201Mohammad Rasim2019-04-102-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds *-u-boot.dtsi files for p200 and p201 boards These are just copies of arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | | ARM: dts: meson: add p200 and p201 boardsMohammad Rasim2019-04-104-0/+374
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the device trees for p200 and p201 boards. Synced from kernel 5.0.0 Commit: a667cb7a94d4 ("Merge branch 'akpm' (patches from Andrew)") Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | | ARM: board: meson: rename odroid-c2 to p200Mohammad Rasim2019-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames the odroid-c2 to p200 and set it as the default GXBB board Other boards (odroid-c2 and nanopi-k2) will inherit from p200 Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | | | ARMv8: PSCI: Fix PSCI_TABLE relocation issueLars Povlsen2019-04-231-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes relaction isses with the PSCI_TABLE entries in the psci_32_table and psci_64_table. When using 32-bit adress pointers relocation was not being applied to the tables, causing PSCI handlers to point to the un-relocated code area. By using 64-bit data relocation is properly applied. The handlers are thus in the "secure data" area, which is protected by /memreserve/ in the FDT. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
* | | | ARM: MediaTek: Add support for MT8516 SoCFabien Parent2019-04-236-0/+295
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for MediaTek MT8516 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | | poplar: enable Ethernet driver supportShawn Guo2019-04-231-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'phy' reset of gmac device in kernel device tree is not generic enough for u-boot to use, so we need to overwrite the 'resets' property as needed. With this device tree fixup and poplar_defconfig changes, Ethernet starts working on Poplar board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | dt: bcm963158: enable led controllerPhilippe Reynes2019-04-231-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the led controller in the device tree of the board bcm963158. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* | | | dt: bcm63158: add led controllerPhilippe Reynes2019-04-231-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Add the led controller in the bcm63158 device tree. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* | | | dt: bcm968580xref: enable led controllerPhilippe Reynes2019-04-231-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the led controller in the device tree of the board bcm968580xref. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* | | | dt: bcm6858: add led controllerPhilippe Reynes2019-04-221-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Add the led controller in the bcm6858 device tree. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* | | | arm: arm64 32bit address relocationIbai Erkiaga2019-04-221-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current relocation code is limited to 21bit PC-relative addressing which might not be enough for bigger code sizes. The following patch increases the addressing to 32bit PC-relative. This feature is specially interesting if U-Boot is build without optimiation (-O0) as the text section is increased significativelly. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
* | | | arm: fix hvc callIbai Erkiaga2019-04-221-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HVC call makes use of 6 mandatory arguments rather than 7 in the same way as SMC calls. The 7th argument is optional (Client ID) for both HVC and SMC but is implemented as 16-bit parameter and register R7 or W7. The aim of this patch is just fix compilation error due to an invalid asm code in the HVC call so that's why the 7th argument is removed. The issue does not report any error in a normal build as hvc_call is not used at all and is optimized by the compiler. Using -O0 triggers the error so the patch is intended to fix issues on a ongoing effor to build U-Boot with -O0. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
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