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* dm: Rename dev_addr..() functionsSimon Glass2017-06-013-3/+3
| | | | | | | | | | | | | | | | | | | These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion. In the end we will have: 1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use. Note this involves changing some dead code - the imx_lpi2c.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Use dm.h header when driver mode is usedSimon Glass2017-06-013-3/+3
| | | | | | | | This header includes things that are needed to make driver build. Adjust existing users to include that always, even if other dm/ includes are present Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2017-05-3112-1/+729
|\ | | | | | | | | Please pull another update for Broadcom MIPS. This contains new SoC's, new boards and new drivers and some bugfixes.
| * mips: bmips: fix BCM3380 periph clock frequencyÁlvaro Fernández Rojas2017-05-311-1/+1
| | | | | | | | | | | | | | | | Instead of having a peripheral clock of 50 MHz like the BCM63xx family, it has a 48 MHz clock. This fixes uart baud rate calculation for BCM3380. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
| * mips: bmips: add board descriptionsÁlvaro Fernández Rojas2017-05-311-0/+24
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add BMIPS Sagem F@ST1704 boardÁlvaro Fernández Rojas2017-05-313-0/+63
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add support for Broadcom MIPS BCM6338 SoC familyÁlvaro Fernández Rojas2017-05-313-1/+132
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add BMIPS Netgear CG3100D boardÁlvaro Fernández Rojas2017-05-313-0/+109
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add support for Broadcom MIPS BCM3380 SoC familyÁlvaro Fernández Rojas2017-05-312-0/+166
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add BMIPS Comtrend CT-5361 boardÁlvaro Fernández Rojas2017-05-313-0/+62
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add support for Broadcom MIPS BCM6348 SoC familyÁlvaro Fernández Rojas2017-05-313-1/+141
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * mips: bmips: add wdt-reboot driver support for BCM63268Álvaro Fernández Rojas2017-05-311-0/+5
| | | | | | | | | | | | | | This driver allows rebooting the SoC by calling wdt_expire_now op. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * mips: bmips: add wdt-reboot driver support for BCM6328Álvaro Fernández Rojas2017-05-311-0/+5
| | | | | | | | | | | | | | This driver allows rebooting the SoC by calling wdt_expire_now op. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * mips: bmips: add wdt-reboot driver support for BCM6358Álvaro Fernández Rojas2017-05-311-0/+5
| | | | | | | | | | | | | | This driver allows rebooting the SoC by calling wdt_expire_now op. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * mips: bmips: add bcm6345-wdt driver support for BCM63268Álvaro Fernández Rojas2017-05-311-0/+6
| | | | | | | | | | | | | | This driver controls the watchdog present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * mips: bmips: add bcm6345-wdt driver support for BCM6328Álvaro Fernández Rojas2017-05-311-0/+6
| | | | | | | | | | | | | | This driver controls the watchdog present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * mips: bmips: add bcm6345-wdt driver support for BCM6358Álvaro Fernández Rojas2017-05-311-0/+6
| | | | | | | | | | | | | | This driver controls the watchdog present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2017-05-314-64/+91
|\ \ | | | | | | | | | Mostly including the Armada 37xx pinctrl / gpio driver.
| * | arm64: mvebu: Replace board specific with generic memory bank decodingStefan Roese2017-05-311-62/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dram_init and dram_init_banksize functions were using a board specific implementation for decoding the memory banks from the fdt. This change makes the dram_init* functions use a generic implementation of decoding and populating memory bank and size data. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nathan Rossi <nathan@nathanrossi.com> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm64: mvebu: armada-7040-db: Enable 10GB port 0 / SFI (KR)Stefan Roese2017-05-311-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the mvpp2 port 0 usage on the Armada 7k DB by setting the correct PHY type (KR / SFI) for the COMPHY driver and enabling the ethernet0 device node in the dts. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
| * | arm64: mvebu: armada37xx: add pinctrl definitionGregory CLEMENT2017-05-312-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start to populate the device tree of the Armada 37xx with the pincontrol configuration used on the board providing a dts. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
| * | arm64: mvebu: Add pinctrl nodes for Armada 3700Gregory CLEMENT2017-05-311-0/+42
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the nodes for the two pin controller present in the Armada 37xx SoCs. Initially the node was named gpio1 using the same name that for the register range in the datasheet. However renaming it pinctr_nb (nb for North Bridge) makes more sens. Minor changes for U-Boot because of the slightly different dts version done by Stefan Roese. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
* | Kconfig: Finish migration of hashing commandsDaniel Thompson2017-05-314-0/+10
|/ | | | | | | | | | | | Currently these (board agnostic) commands cannot be selected using menuconfig and friends. Fix this the obvious way. As part of this, don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v' and "we have a hashing command" as this makes the Kconfig logic odd. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> [trini: Re-apply, add imply for a few cases, run moveconfig.py, also migrate CRC32_VERIFY] Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-05-2611-7/+166
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| * armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-bootSantan Kumar2017-05-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adjusts memory map for images on LS2080ARDB and LS2080AQDS NOR flash as below Image Flash Offset RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 PHY firmware 0x00980000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 Kernel.itb 0x01000000 Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043AAlison Wang2017-05-231-4/+4
| | | | | | | | | | | | | | | | | | | | This patch is to adjust the memory mapping for FLash/SD card on LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN firmware load address, QE firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb: Add LS2081ARDB board supportPriyanka Jain2017-05-234-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC supportPriyanka Jain2017-05-234-1/+20
| | | | | | | | | | | | | | | | | | | | | | The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and is built on layerscape architecture. It is 40-pin derivative of LS2084A (non-AIOP personality of LS2088A). So feature-wise it is same as LS2084A. LS2041A is a 4-core personality of LS2081A. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb: Add QSPI-boot supportPriyanka Jain2017-05-233-1/+62
| | | | | | | | | | | | | | | | | | | | QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC. LS2088ARDB RevF Board has limitation that QIXIS can not be accessed. CONFIG_FSL_QIXIS is not enabled. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board: freescale: ls2080ardb: Enable SD interface for RevF boardPriyanka Jain2017-05-231-0/+4
| | | | | | | | | | | | | | | | | | | | LS2080ARDB/LS2088ARDB RevF board has smart voltage translator which needs to be programmed to enable high speed SD interface by setting GPIO4_10 output to zero. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2017-05-262-0/+13
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Move FTMAC100 to where it should be, alphabetically in drivers/net/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/Kconfig
| * | nds32: eth: Support ftmac100 DM.rick2017-05-232-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform. Verification: Boot linux kernel via dhcp and bootm ok. NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000; NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4899 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'boomimage-310y-ae300-spi.bin'. Load address: 0x600000 Loading: ################################################################# ################################################################# ################################################################# ... ... ################################### 233.4 KiB/s done Bytes transferred = 13872076 (d3abcc hex) NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4592 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'ae300.dtb'. Load address: 0x2000000 Loading: # 82 KiB/s done Bytes transferred = 2378 (94a hex) NDS32 # bootm 0x600000 - 0x2000000 Image Name: Created: 2017-03-22 6:52:03 UTC Image Type: NDS32 Linux Kernel Image (uncompressed) Data Size: 13872012 Bytes = 13.2 MiB Load Address: 0000c000 Entry Point: 0000c000 Verifying Checksum ... OK Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Device Tree to 01efc000, end 01eff949 ... OK Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09) (gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) ) #293 PREEMPT Wed Mar 22 14:49:28 CST 2017 CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159) ... ... Signed-off-by: rick <rick@andestech.com>
* | | Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2017-05-2313-761/+7337
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| * | ARM: rmobile: Move address of IICDVFS(I2C) to rcar-gen3-base.hNobuhiro Iwamatsu2017-05-222-3/+3
| | | | | | | | | | | | | | | | | | | | | The IICDVFS(I2C) set in r8a7796.h is common in rcar-gen3. This moves CONFIG_SYS_I2C_SH_BASE0 in rcar-gen3-base.h. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Allow R8A7796 Salvator-X configurationMarek Vasut2017-05-221-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Salvator-X can have both H3 and M3 CPU on it, drop the select R8A7795 to allow both configurations. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Add R8A7796 supportMarek Vasut2017-05-225-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | Add Kconfig entry for the R8A7796 RCar M3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Handle R8A7796 r1.1 in the PRR codeMarek Vasut2017-05-221-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | The R8A7796 r1.1 reports itself as r2.0 , add quirk into the PRR code to fix this report. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Add R8A7796 into the CPU tableMarek Vasut2017-05-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add entry for the R8A7796 RCar M3 SoC into the CPU info table. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Add R8A7795 into the CPU tableMarek Vasut2017-05-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add entry for the R8A7795 RCar H3 SoC into the CPU info table. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Make the Gen3 SoC configurableMarek Vasut2017-05-221-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Allow selecting the Gen3 SoC in preparation for RCar M3 . No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Zap RCAR_GEN3_EXTRAM_BOOTMarek Vasut2017-05-221-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | This Kconfig option is not used on any board, so drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Import R8A7796 PFC and GPIO tablesMarek Vasut2017-05-223-0/+6340
| | | | | | | | | | | | | | | | | | | | | | | | | | | Import the R8A7796 PFC and GPIO tables from the latest 3.5.3 release from Renesas . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Update R8A7795 PFC and GPIO tablesMarek Vasut2017-05-222-750/+897
| | | | | | | | | | | | | | | | | | | | | | | | | | | Sync the PFC and GPIO tables with the latest 3.5.3 release from Renesas . This adds ES2.0 support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | Merge git://git.denx.de/u-boot-sunxiTom Rini2017-05-223-4/+23
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't get Kconfig errors on platforms without SPL, ie sandbox (without SPL). Signed-off-by: Tom Rini <trini@konsulko.com>
| * | | sunxi: Store the device tree name in the SPL headerSiarhei Siamashka2017-05-171-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the mksunxiboot tool to optionally add the default device tree name string to the SPL header. This information can be used by the firmware upgrade tools to protect users from harming themselves by trying to upgrade to an incompatible bootloader. The primary use case here is a non-removable bootable media (such as NAND, eMMC or SPI flash), which already may have a properly working, but a little bit outdated bootloader installed. For example, the user may download or build a new U-Boot image for "Cubieboard", and then attemept to install it on a "Cubieboard2" hardware by mistake as a replacement for the already existing bootloader. If this happens, the flash programming tool can identify this problem and warn the user. The size of the SPL header is also increased from 64 bytes to 96 bytes to provide enough space for the device tree name string. [Andre: split patch to remove OF_LIST hash feature] Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * | | sunxi: enable automatic FIT build for 64-bit SoCsAndre Przywara2017-05-171-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner SoCs with 64-bit cores use an ARM Trusted Firmware binary, which needs to be loaded alongside U-Boot proper. Set the respective Kconfig options to let them select this feature and also automatically build the FIT image. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [Rename Kconfig path to arch/arm/mach-sunxi/Kconfig] Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | | armv8: fsl: move ccn504 code into FSL MakefileAndre Przywara2017-05-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic ARMv8 assembly code contains routines for setting up a CCN interconnect, though the Freescale SoCs are the only user. Link this code only for Freescale targets, this saves some precious bytes in the chronically tight SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * | | armv8: SPL: only compile GIC code if neededAndre Przywara2017-05-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not every SoC needs to set up the GIC interrupt controller, so link think code only when the respective config option is set. This shaves off some bytes from the SPL code size. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2017-05-2225-107/+794
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| * | | | nds32: Support AE3XX platform.rick2017-05-2221-103/+706
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Andestech AE3xx platform: serial, timer device tree flow. Signed-off-by: rick <rick@andestech.com>
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