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* rockchip: chromebook_minnie: Enable soundSimon Glass2019-05-081-0/+12
* rockchip: rk3399: add tpl supportKever Yang2019-05-083-1/+118
* rockchip: add u-boot-tpl-v8.ldsKever Yang2019-05-081-0/+94
* rockchip: px5: add timer0 dts node as tick timerKever Yang2019-05-081-0/+7
* rockchip: rk3368: remove uart iomux init in SPLKever Yang2019-05-081-15/+0
* rockchip: boot0: update CONFIG_ROCKCHIP_SPL_RESERVE_IRAM for SPL onlyKever Yang2019-05-081-1/+2
* rockchip: px5 update dts for spl/tplKever Yang2019-05-081-0/+29
* rockchip: rk3368: support UART2/4 in board_debug_uart_init()Kever Yang2019-05-081-0/+40
* rockchip: rk322x: dts: enable uart2 for SPL/TPLKever Yang2019-05-081-0/+1
* sysreset: enable driver support in SPL/TPLKever Yang2019-05-082-0/+2
* rockchip: rk322x: add tpl supportKever Yang2019-05-085-30/+110
* arm: add a separate stack for TPLKever Yang2019-05-081-1/+3
* arm: add option for TPL support in arm 32bitKever Yang2019-05-081-0/+29
* arm: remove ARCH_ROCKCHIP macro in common codeKever Yang2019-05-082-8/+0
* rockchip: add common header boot0.h and gpio.h for socKever Yang2019-05-0818-0/+198
* Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2019-05-0713-343/+963
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| * ARM: dts: renesas: Add RZ/A1 GR-Peach boardChris Brandt2019-05-074-0/+222
| * ARM: dts: renesas: Add RZ/A1 platform codeChris Brandt2019-05-076-1/+741
| * sh: 7785: Remove CPU supportMarek Vasut2019-05-072-121/+0
| * sh: sh7785lcr: Remove the boardMarek Vasut2019-05-071-5/+0
| * sh: 7724: Remove CPU supportMarek Vasut2019-05-072-211/+0
| * sh: ecovec: Remove the boardMarek Vasut2019-05-071-5/+0
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2019-05-077-203/+39
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| * ARM: socfpga: stratix10: Probe FPGA status before bridge enableAng, Chee Hong2019-05-061-0/+12
| * ARM: socfpga: stratix10: Disable FPGA2SOC resetAng, Chee Hong2019-05-062-3/+6
| * arm: socfpga: Move Stratix 10 SDRAM driver to DMLey Foon Tan2019-05-062-198/+10
| * arm: dts: Stratix10: Add SDRAM nodeLey Foon Tan2019-05-061-0/+9
| * ddr: altera: Compile ALTERA SDRAM in SPL onlyLey Foon Tan2019-05-061-2/+2
* | Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2019-05-061-0/+3
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| * | ARM: rmobile: Always select pin control drivers on Gen3Marek Vasut2019-05-041-0/+3
* | | arm: mach-omap2: am33xx: ddr: update value for ext_phy_ctrl_36Brad Griffis2019-05-051-2/+2
* | | arm: mach-omap2: am33xx: Disable EMIF_DEVOFF immediately before hw levelingBrad Griffis2019-05-052-3/+14
* | | arm: mach-omap2: am33xx: Enable HW Leveling in the rtc+ddr pathBrad Griffis2019-05-051-1/+29
* | | arm: mach-omap2: am33xx: ddr: Add 1ms delay to avoid L3 errorBrad Griffis2019-05-051-0/+3
* | | arm: mach-omap2: am33xx: ddr: programming of EXT_PHY_CTRL1 and EXT_PHY_CTRL1_...Brad Griffis2019-05-051-2/+10
* | | spl: fix linker size check off-by-one errorsSimon Goldschmidt2019-05-053-6/+6
* | | configs: socfpga: add imply pl310 cache controllerDinh Nguyen2019-05-051-0/+1
* | | ARM: socfpga: use the pl310 driver to configure the cacheDinh Nguyen2019-05-051-13/+3
* | | ARM: pl310: Add macro's for handling tag and data latency maskDinh Nguyen2019-05-051-0/+3
* | | arch: armv8: Provide a way to disable cache maintenance opsVignesh Raghavendra2019-05-052-0/+19
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* | Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mipsTom Rini2019-05-0423-316/+629
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| * | net: mscc: ocelot: Update DTS for Luton pcb90Horatiu Vultur2019-05-033-196/+290
| * | mips: rename mach-mt7620 to mach-mtmipsWeijie Gao2019-05-039-12/+12
| * | net: mscc: ocelot: Update DTS for Ocelot pcb120.Horatiu Vultur2019-05-033-81/+147
| * | net: mscc: ocelot: Update network driver for pcb120Horatiu Vultur2019-05-031-0/+1
| * | arch: mips: Update initrd_start and initrd_endHoratiu Vultur2019-05-031-0/+2
| * | MSCC: delete obsolete reference to MSCC_BITBANG_SPI_GPIORobert P. J. Day2019-05-031-1/+0
| * | net: mscc: serval: Add ethernet nodes for ServalHoratiu Vultur2019-05-033-0/+146
| * | mips: mscc: serval: Fix resetHoratiu Vultur2019-05-032-26/+31
* | | delete Kbuild "select" of long-dead SPL_DISABLE_OF_CONTROLRobert P. J. Day2019-05-041-2/+0
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