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* sh: rsk7203: Remove the boardMarek Vasut2019-05-101-5/+0
| | | | | | | | | | | Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
* arm: k3: config.mk: Use k3_gen_x509_cert.sh to generate boot imagesLokesh Vutla2019-05-091-29/+4
| | | | | | | Instead of overlading makefile, use the k3_gen_x509_cert.sh script to generate boot images. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: zimage: add barebox image magic numberChristoph Fritz2019-05-091-2/+4
| | | | | | | For chainboot configurations or test environments, this patch allows booting barebox images by using command bootz. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
* Fix spelling of available.Vagrant Cascadian2019-05-093-3/+3
| | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
* Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchipTom Rini2019-05-0959-73/+1622
|\ | | | | | | | | | | | | | | | | | | | | | | | | Improvements and new features: - split more rockchip pinctrl_core feature into per SoC - enable TPL for evb-rk3399 board - enable TPL/SPL for evb-px5 board - enable TPL and OP-TEE support for evb-rk3229 - update fix in arm common assembly start code for rockchip header file - update default SPL_FIT_GENERATOR for rockchip - rk3399 boards update to use '-u-boot.dtsi' - add new rk3399 boards: Nanopi M4, Nanopc T4 - enable sound for chromebook_minnie
| * rockchip: rk3399: Add Nanopc T4 board supportJagan Teki2019-05-093-0/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for Nanopc T4 board. Specification - Rockchip RK3399 - Dual-Channel 4GB LPDDR3-1866 - SD card slot - 16GB eMMC - RTL8211E 1Gbps - AP6356S WiFI/BT - HDMI In/Out, DP, MIPI DSI/CSI, eDP - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 12V/2A Commit details of rk3399-nanopc-t4.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: Add NanoPC-T4 IR receiver" (sha1: 95658e21b1707ad7844f873db2fdaa295109a5a3) Tested-by: Daniel Gröber <dxld@darkboxed.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3399: Add Nanopi M4 board supportJagan Teki2019-05-094-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for Nanopi M4 board. Specification - Rockchip RK3399 - Dual-Channel 4GB LPDDR3-1866 - SD card slot - eMMC socket - RTL8211E 1Gbps - AP6356S WiFI/BT - HDMI In/Out, DP, MIPI DSI/CSI - USB 3.0 x4 - USB Type C power and data - GPIO1, GPIO2 expansion ports - DC5V/3A Commit details of rk3399-nanopi-m4.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: Refine nanopi4 differences" (sha1: c62ffaf5026d0b7633e62b2cea8450b5543c349a) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: dts: rk3399: nanopi4: Use CD pin as RK_FUNC_1Jagan Teki2019-05-091-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attaching GPIO functionality to SDMMC0_DET pin (which does in Linux base dts) make dwmmc driver "fail to detect the card". Card did not respond to voltage select! It may be because the existing driver can't support gpio card detection. So, change the pinctrl functionality from RK_FUNC_GPIO to RK_FUNC_1 like other rk3399 dts does via sdmmc_cd pin. Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: dts: rk3399: Sync rk3399-nanopi4.dtsi from LinuxJagan Teki2019-05-081-0/+703
| | | | | | | | | | | | | | | | | | | | | | | | Sync rk3399-nanopi4.dtsi from Linux 5.1-rc2 tag. Linux commit details about the rk3399-nanopi4.dtsi sync: "arm64: dts: rockchip: Add nanopi4 bluetooth" (sha1: 3e2f0bb72be36aa6c14ee7f11ac4dd8014801030) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * arm: rockchip: rk3399: Move common configs in KconfigJagan Teki2019-05-081-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Few SPL and U-Boot proper configs are common to all rk3399 target defconfigs, move them and select it from platform kconfig. Moved configs: - SPL_ATF - SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF - SPL_LOAD_FIT - SPL_CLK if SPL - SPL_PINCTRL if SPL - SPL_RAM if SPL - SPL_REGMAP if SPL - SPL_SYSCON if SPL - CLK - FIT - PINCTRL - RAM - REGMAP - SYSCON - DM_PMIC - DM_REGULATOR_FIXED Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: dts: rk3399: Sync pwm2_pin_pull_down from Linux 5.1-rc2Jagan Teki2019-05-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To make successful build with dts(i) files syncing from Linux 5.1-rc2 the rk3399.dtsi would require pwm2_pin_pull_down. So, sync the pwm2_pin_pull_down node from Linux 5.1-rc2. Since this node is strictly not part of any commit alone, I have mentioned Linux 5.1-rc2 tag for future reference of where would this sync coming from. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * arm64: rockchip: dts: rk3399: Use rk3399-u-boot.dtsiJagan Teki2019-05-087-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have - board specific -u-boot.dtsi files for board specific u-boot dts changes. - soc specific rk3399-u-boot.dtsi for soc specific u-boot dts changes. So, include the rk3399-u-boot-dtsi on respective board -u-boot.dtsi and drop the properties which are globally available in rk3399-u-boot.dtsi Right now rk3399-u-boot.dtsi has sdmmc, spi1 u-boot,dm-pre-reloc property and more properties and nodes can be move further based on the requirements. This would fix, the -u-boot.dtsi inclusion for evb, firefly, puma boards that was accidentally merged on below commit. "rockchip: dts: rk3399: Create initial rk3399-u-boot.dtsi" (sha1: e05b4a4fa84b65a0c8873e8f34721741fe2bc09d) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: dts: rk3399-u-boot: Add u-boot, dm-pre-reloc for spi1Jagan Teki2019-05-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add u-boot,dm-pre-reloc property for spi1, so-that the subsequent rk3399 boards which boot from SPI. This help to separate the u-boot specific properties away from base dts files so-that the Linux sync become easy and meaningful. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * arm64: rockchip: dts: rk3399: Add board -u-boot.dtsi filesJagan Teki2019-05-0810-5/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devicetree files in RK3399 platform is synced from Linux, like other platforms does. Apart from these u-boot in rk3399 would also require some u-boot specific node like dmc. dmc node has big chunk of DDR timing parameters which are specific to specific board, and maintained with rk3399-sdram*.dtsi. So, create board specific -u-boot.dtsi files and move these sdram dtsi files accordingly. This would help of maintain u-boot specific changes separately without touching Linux dts(i) files which indeed easy for syncing from Linux between releases. These board specific -u-boot.dtsi can be extendible to add more u-boot specific nodes or properties in future. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * dts: Makefile: Build rockchip dtbs based on SoC typesJagan Teki2019-05-081-9/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Sometimes u-boot specific dtsi files are included automatically which would build for entire rockchip SoC, even-though the respective dtsi should used it for specific family of rockchip SoC. - Sometimes u-boot specific dts nodes or properties can use config macros from respective rockchip family include/configs files, example CONFIG_SPL_PAD_TO. So, it's better to compile the dtbs based on the respective rockchip family types rather than rockchip itself to avoid compilation issues. This patch organize the existing dtb's based on the rockchip family types. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: chromebook_minnie: Enable soundSimon Glass2019-05-081-0/+12
| | | | | | | | | | | | | | Enable sound for this board, which has the same codec as jerry. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3399: add tpl supportKever Yang2019-05-083-1/+118
| | | | | | | | | | | | | | | | | | Rockchip platform suppose to use TPL(run in SRAM) as dram init and SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be limited by SRAM size. This patch add rk3399-board-tpl.c and its common configs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: add u-boot-tpl-v8.ldsKever Yang2019-05-081-0/+94
| | | | | | | | | | | | | | | | We don't have both sram and sdram in TPL, so update from: arch/arm/cpu/armv8/u-boot-spl.lds Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * rockchip: px5: add timer0 dts node as tick timerKever Yang2019-05-081-0/+7
| | | | | | | | | | | | Let's use rockchip timer before stimer patches can be merged. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3368: remove uart iomux init in SPLKever Yang2019-05-081-15/+0
| | | | | | | | | | | | | | The iomux should have been set in board_debug_uart_init(), do not set in board_init_f(), remove it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: boot0: update CONFIG_ROCKCHIP_SPL_RESERVE_IRAM for SPL onlyKever Yang2019-05-081-1/+2
| | | | | | | | | | | | | | The CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is for SPL only, add condition to limit it not affect TPL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: px5 update dts for spl/tplKever Yang2019-05-081-0/+29
| | | | | | | | | | | | | | TPL need dmc to init ddr sdram, and emmc, boot-order. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
| * rockchip: rk3368: support UART2/4 in board_debug_uart_init()Kever Yang2019-05-081-0/+40
| | | | | | | | | | | | | | evb-rk3368 is using UART2 and PX5 evb is using UART4 Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
| * rockchip: rk322x: dts: enable uart2 for SPL/TPLKever Yang2019-05-081-0/+1
| | | | | | | | | | | | | | When we use DM_SERIAL for serial driver, we need enable the dts node for the debug console. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * sysreset: enable driver support in SPL/TPLKever Yang2019-05-082-0/+2
| | | | | | | | | | | | SPL/TPL also need use sysreset for some feature like panic callback. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk322x: add tpl supportKever Yang2019-05-085-30/+110
| | | | | | | | | | | | | | Move original spl to tpl, and add spl to load next stage firmware, adapt all the address and option for them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * arm: add a separate stack for TPLKever Yang2019-05-081-1/+3
| | | | | | | | | | | | | | TPL stack may different from SPL and sys stack, add support for separate one when the board defines it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * arm: add option for TPL support in arm 32bitKever Yang2019-05-081-0/+29
| | | | | | | | | | | | | | Some options like TPL_SYS_THUMB_BUILD, TPL_USE_ARCH_MEMCPY and TPL_USE_ARCH_MEMCPY are needed for TPL build in 32bit arm. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * arm: remove ARCH_ROCKCHIP macro in common codeKever Yang2019-05-082-8/+0
| | | | | | | | | | | | | | | | | | | | This is fix to: e2a12f590d rockchip: use 'arch-rockchip' as header file path The V2 of origin patch set has fix this, but we merge V1 by mistake, so lets correct it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: add common header boot0.h and gpio.h for socKever Yang2019-05-0818-0/+198
| | | | | | | | | | | | | | | | boot0.h and gpio.h will be used by system and include by 'asm/arch/', each of them need of a copy from 'asm/arch-rockchip'. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2019-05-095-1/+136
|\ \ | | | | | | | | | | | | | | | - DM updates for multiple MVEBU boards (Stefan) - Add CRS305-1G-4S board (Luka) - Enable MMC in SPL on clearfog (Baruch)
| * | arm: mvebu: clearfog: add MMC to SPL DTBaruch Siach2019-05-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | This allows SPL to load the main U-Boot image from MMC once DM_MMC is enabled. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: Add CRS305-1G-4S boardLuka Kovacic2019-05-094-1/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CRS305-1G-4S has a switch chip with an integrated CPU (98DX3236) and like some of the other similar boards requires bin_hdr. bin_hdr (DDR3 init stage) is currently retrieved from the stock bootloader and compiled into the kwb image. Adds support for U-Boot, enable UART, SPI, Winbond SPI flash chip support and writing env to SPI flash. Signed-off-by: Luka Kovacic <me@lukakovacic.xyz> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge git://git.denx.de/u-boot-riscvTom Rini2019-05-098-0/+81
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | - Correct SYS_TEXT_BASE for qemu. - Support booti. - Increase SYSBOOTM_LEN for Fedora/RISCV kernel. - Support SMP booting from flash.
| * | | RISCV: image: Add booti supportAtish Patra2019-05-092-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds booti support for RISC-V Linux kernel. The existing bootm method will also continue to work as it is. It depends on the following kernel patch which adds the header to the flat Image. Gzip compressed Image (Image.gz) support is not enabled with this patch. https://patchwork.kernel.org/patch/10925543/ Tested on HiFive Unleashed and QEMU. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Karsten Merker <merker@debian.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
| * | | riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is ↵Rick Chen2019-05-092-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enabled This patch will fix prior_stage_fdt_address write failure problem, when AE350 boots from flash. When AE350 boots from flash, prior_stage_fdt_address will be flash address, we shall avoid it to be written. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
| * | | riscv: Introduce CONFIG_XIP to support booting from flashRick Chen2019-05-096-0/+21
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When U-Boot boots from flash, during the boot process, hart_lottery and available_harts_lock variable addresses point to flash which is not writable. This causes boot failures on AE350. Introduce a config option CONFIG_XIP to support such configuration. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | Merge tag 'u-boot-amlogic-20190509' of git://git.denx.de/u-boot-amlogicTom Rini2019-05-092-0/+138
|\ \ \ | | | | | | | | | | | | | | | | | | | | - Add USB PHY drivers for Amlogic G12A - Add USB Complex Glue driver for Amlogic G12A - Add USB Gadget support for Amlogic G12A
| * | | mach-meson: g12a: add DWC2 peripheral mode supportNeil Armstrong2019-05-092-0/+138
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for Amlogic G12A USB Device mode. The DWC2 Controller behind the Glue can be connected to an OTG capable PHY. The Glue setups the PHY mode. This patch implements Device mode support by adding a board_usb_init/cleanup setting up the DWC2 controller and switch the OTG capable port to Device before starting the DWC2 controller in Device mode. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2019-05-087-42/+42
|\ \ \ | |/ / |/| | | | | | | | - Various PHY fixes / enhancements. - TI K2G fixes
| * | net: phy: micrel: Use correct skew values on KSZ9021James Byrne2019-05-087-42/+42
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ff7bd212cb8a ("net: phy: micrel: fix divisor value for KSZ9031 phy skew") fixed the skew value divisor for the KSZ9031, but left the code using the same divisor for the KSZ9021, which is incorrect. The preceding commit c16e69f702b1 ("net: phy: micrel: add documentation for Micrel KSZ90x1 binding") added the DTS documentation for the KSZ90x1, changing it from the equivalent file in the Linux kernel to correctly state that for this part the skew value is set in 120ps steps, whereas the Linux documentation and driver continue to this day to use the incorrect value of 200 that came from the original KSZ9021 datasheet before it was corrected in revision 1.2 (Feb 2014). This commit sorts out the resulting confusion in a consistent way by making the following changes: - Update the documentation to be clear about what the skew values mean, in the same was as for the KSZ9031. - Update the Micrel PHY driver to select the appropriate divisor for both parts. - Adjust all the device trees that state skew values for KSZ9021 PHYs to use values based on 120ps steps instead of 200ps steps. This will result in the same values being programmed into the skew registers as the equivalent device trees in the Linux kernel do, where it incorrectly uses 200ps steps (since that's where all these device trees were copied from). Signed-off-by: James Byrne <james.byrne@origamienergy.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2019-05-084-1/+498
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | - H6 Beelink GS1 board (Clément) - Olimex A64-Teres-I board (Jonas) - sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej) - Change include order (Jagan) - EPHY clock changes (Jagan) - EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
| * | sun50i: a64: Add Olimex A64-Teres-I board initial supportJonas Smedegaard2019-05-093-1/+313
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Olimex A64-Teres-I board is a mainboard (the only one so far) for Olimex Teres-I DIY laptop kit. Key features: - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 2GB DDR3 RAM - MicroSD Slot - 16GB eMMC Flash - eDP LCD display - HDMI - USB Host - Battery management - 5V DC power supply - Certified Open Source Hardware (OSHW) Works: - i2C - MMC/SD - PWM backlight Known broken: - Internal keyboard (seems to be because the keyboard firmware loads a bootloader first, and then disconnects bootloader and connect real keyboard). External ones connected to the USB port work fine. This patch enables support for the A64-Teres-I board to u-boot, including enabling screen backlight (lacking from Linux device-tree). Linux commit details about the sun50i-a64-teres-i.dts sync: "arm64: dts: allwinner: a64: Rename uart0_pins_a label to uart0_pb_pins" (sha1: d91ebb95b96c8840932dc3a10c9f243712555467) Cosmetic warnings regarding whitespace and placement of SPDX notice for dts file was ignored. config and .dtsi file are adapted from pinebook files. Tested-by: Jonas Smedegaard <dr@jones.dk> Signed-off-by: Jonas Smedegaard <dr@jones.dk> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [jagan: move board entry in MAINTAINERS file at proper position] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | arm: dts: h6: Add Beelink GS1 initial supportClément Péron2019-04-182-0/+185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Beelink GS1 is an Allwinner H6 based TV box, which support: - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 - GPU Mali-T720 - 2GB LPDDR3 RAM - 16GB eMMC - AXP805 PMIC - 1Gbps GMAC via RTL8211E - USB 2.0 and 3.0 Host - HDMI port - S/PDIF port - 5V/2A DC power supply - Wi-Fi/BT via Fn-Link 6222B-SRB (RTL8222BS) Linux commit details about the sun50i-h6-beelink-gs1.dts sync: "arm64: dts: allwinner: h6: Introduce Beelink GS1 board" (sha1: 089bee8dd119ba084dee6b17a2e1a53df4f30193) Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* | | x86: samus: Update device tree for verified bootSimon Glass2019-05-081-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | Add nvdata drivers for the TPM and RTC as used on samus. These are needed for Chromium OS verified boot on samus. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: samus: Update device tree for SPLSimon Glass2019-05-081-3/+28
| | | | | | | | | | | | | | | | | | | | | Add tags to allow required nodes to be present in SPL / TPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Add a simple TPL implementationSimon Glass2019-05-084-5/+183
| | | | | | | | | | | | | | | | | | | | | | | | Add the required CPU code so that TPL builds correctly. Also update the SPL code to deal with being booted from TPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Add a way to jump from TPL to SPLSimon Glass2019-05-081-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | When TPL finishes it needs to jump to SPL with the stack set up correctly. Add a function to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: broadwell: Update PCH to work in TPLSimon Glass2019-05-081-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | The early init should only happen once. Update the probe method to deal with TPL, SPL and U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Enable the RTC on all boardsSimon Glass2019-05-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | With the move to Kconfig this option should be set in Kconfig, not in the config header file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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