summaryrefslogtreecommitdiff
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2021-02-0846-55/+2333
|\ | | | | | | | | | | | | | | | | Layerscape: Enable gpio Bug fixes & updates related to dspi, qspi, pciep, SVR mask, stream-id, env variables, mdio for LAyerscape Platforms Add SATA, network variant 1, 2 support on sl28 powerpc: T1042: drop CONFIG_VIDEO, Add kmcent2 board supporrt, keymile Bug fixes and updates for keymile, Kontron
| * arm64: dts: ls208xa: add gpio nodeBiwen Li2021-02-081-1/+45
| | | | | | | | | | | | | | Add gpio node for SoC LS208xA Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * arm64: dts: ls1088a: add gpio nodeBiwen Li2021-02-081-1/+46
| | | | | | | | | | | | | | Add gpio node for SoC LS1088A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * arm64: dts: ls1046a: add gpio nodeBiwen Li2021-02-081-0/+40
| | | | | | | | | | | | | | Add gpio node for SoC LS1046A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * arm64: dts: ls1043a: add gpio nodeBiwen Li2021-02-081-0/+40
| | | | | | | | | | | | | | Add gpio node for SoC LS1043A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * arm64: dts: ls1028a: add gpio nodeBiwen Li2021-02-081-0/+33
| | | | | | | | | | | | | | Add gpio node for SoC LS1028A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * arm64: dts: ls1012a: add gpio nodeBiwen Li2021-02-081-0/+20
| | | | | | | | | | | | | | Add gpio node for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * arm: dts: ls1021a: add gpio nodeBiwen Li2021-02-081-0/+40
| | | | | | | | | | | | | | Add gpio node for SoC LS1021A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * gpio: mpc8xxx_gpio: Fix for litte endianBiwen Li2021-02-083-0/+39
| | | | | | | | | | | | | | Update gpio driver to use same logic for big-endian and little-endian Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * mpc8xxx: fsl_pamu: Update data type in config_pamuPriyanka Jain2021-02-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Update data type of '1' to '1ull' in below assignment size = 1ull << sizebit; to fix incorrect assignment issue. e.g: when sizebit was 31, 0x80000000 got sign extended to 0xffffffff_80000000 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reported-by: Dean Saridakis <dean.saridakis@baesystems.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * armv7: ls102xa: Enable I-Cache to speed up the boot timeHou Zhiqiang2021-02-081-0/+2
| | | | | | | | | | | | | | | | | | Enable the I-Cache to speed up the boot time, especailly for the NOR boot, currently it takes about 15 seconds from power up to the U-Boot prompt, and with the I-Cache enabled it only takes around 2.5 seconds. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * pci: layerscape: Remove the shadow SVR definitionsHou Zhiqiang2021-02-083-32/+56
| | | | | | | | | | | | | | | | | | | | This patch moves the SVR definitions to a new svr.h for Layerscape armv7 and armv8 platforms respectively, so that the PCIe driver can reuse them. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * PowerPC: keymile: Add support for kmcent2 boardNiel Fourie2021-02-083-0/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for the Hitachi Power Grids kmcent2 board, based on the NXP QorIQ T1040 SoC. Signed-off-by: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com> Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com> Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> [Fixed blank line at EOF errors] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * PowerPC: dts: Pulled in kmcent2 dts files from Linux 5.10Niel Fourie2021-02-0817-0/+1580
| | | | | | | | | | | | | | | | | | | | | | | | Pulled in the kmcent2.dts and all its dependents from Linux 5.10, commit 2c85ebc57b3e upstream. Replaced the license text with SPDX License Identifiers. Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * armv8: lx2: SVR_SOC_VER: Mask CAN_FD and security bitWasim Khan2021-02-081-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | Multiple LX2(LX2160A/LX2162A SoC) personality variants exists based on CAN-FD and security bit in SVR. Currenly SVR_SOC_VER mask only security bit. Update SVR_SOC_VER to mask CAN_FD and security bit for LX2 products. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * armv8: ls1028a: fix stream id allocationNipun Gupta2021-02-081-2/+2
| | | | | | | | | | | | | | | | | | When A-050382 errata is enabled, ECAM and EDMA have conflicting stream id 40. This patch fixes the same. Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * board: sl28: add SATA supportMichael Walle2021-02-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable SATA support. Although not supported by the usual SATA pins on the SMARC baseboard connector, SATA mode is supported on a PCIe lane. This way one can use a mSATA card in a Mini PCI slot. We need to invert the received data because in this mode the polarity of the SerDes lane is swapped. Provide a fixup in board_early_init_f() for the SPL. board_early_init_f() is then not common between SPL and u-boot proper anymore, thus common.c is removed, as it just contained said function. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * board: sl28: add network variant 2 supportMichael Walle2021-02-084-3/+58
| | | | | | | | | | | | | | | | | | Although this variant has two external network ports, they are not (yet) supported by the bootloader because they are connected via an internal network switch. Otherwise its the same as the other variants. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * board: sl28: add network variant 1 supportMichael Walle2021-02-084-3/+96
| | | | | | | | | | | | | | | | | | This variant has one network port connected via RGMII and doesn't have any TSN capabilities out-of-the-box. Instead it has all four SerDes lanes available for customer use. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * board: sl28: move ethernet aliases to variant specific dtsiMichael Walle2021-02-083-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The variants differ in their network configuration. Move the first two network aliases to the proper variant device tree includes. This is in prepartion for variant 1 and 2 support which has a different network port mapping. The network aliases for the two internal ports will stay in the common dtsi because they are present on all board variants. This might leave a hole if there is no ethernet1 alias. This is intended. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * armv8: dts: fsl-lx2162a: add dspi node into qds dtsZhao Qiang2021-02-081-0/+105
| | | | | | | | | | | | | | | | Add dspi node into lx2162aqds device tree Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * armv8: lx2162aqds: disable non existing pcie controllersWasim Khan2021-02-081-12/+10
| | | | | | | | | | | | | | disable non existing pcie controllers on lx2162aqds Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | ARM: rmobile: Add Beacon EmbeddedWorks RZG2H Dev KitAdam Ford2021-02-074-0/+121
| | | | | | | | | | | | | | | | | | | | | | | | The Beacon EmbeddedWorks kit is based on the R8A774E1 SoC also known as the RZ/G2H. The kit consists of a SOM + Baseboard and supports microSD, eMMC, Ethernet, a couple celular radios, two CAN interfaces, Bluetooth and WiFi. It shares much of the same design as the RZ/G2M and RZ/G2N dev kits. Signed-off-by: Adam Ford <aford173@gmail.com>
* | ARM: rmobile: Add Beacon EmbeddedWorks RZG2N Dev KitAdam Ford2021-02-074-0/+106
| | | | | | | | | | | | | | | | | | | | | | | | The Beacon EmbeddedWorks kit is based on the R8A774B1 SoC also known as the RZ/G2N. The kit consists of a SOM + Baseboard and supports microSD, eMMC, Ethernet, a couple celular radios, two CAN interfaces, Bluetooth and WiFi. It shares much of the same design as the RZ/G2M dev kit. Signed-off-by: Adam Ford <aford173@gmail.com>
* | arm: dts: r8a774b1: Import DTS queued for Linux 5.12-rc1Adam Ford2021-02-071-2/+74
| | | | | | | | | | | | Update the RZ/G2N dtsi from Renesas repo destined to become 5.12-rc1. Signed-off-by: Adam Ford <aford173@gmail.com>
* | arm: dts: r8a774e1: Import DTS queued for Linux 5.12-rc1Adam Ford2021-02-071-27/+1347
| | | | | | | | | | | | Update the RZ/G2H dtsi from Renesas repo destined to become 5.12-rc1. Signed-off-by: Adam Ford <aford173@gmail.com>
* | arm: dts: r8a774a1: Import DTS queued for Linux 5.12-rc1Adam Ford2021-02-074-104/+445
|/ | | | | | | Update the RZ/G2M dtsi and r8a774a1-beacon-rzg2m-kit kit from Renesas repo destined to become 5.12-rc1. Signed-off-by: Adam Ford <aford173@gmail.com>
* Merge tag 'ti-v2021.04-rc2' of ↵WIP/05Feb2021Tom Rini2021-02-0524-997/+4431
|\ | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Sync DTS from Linux kernel for all K3 platforms - Add MMC higher speed nodes for AM65x, J721e, J7200 - Convert Nokia RX-51 to use CONFIG_DM_MMC - Minor fixes for LEGO MINDSTORMS
| * arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-BootLokesh Vutla2021-02-046-215/+583
| | | | | | | | | | | | | | | | | | Sync all J7200 related v5.11-rc6 Linux kernel dts into U-Boot. MCU R5F nodes are not yet added in Linux kernel yet but were added in U-Boot. In order to avoid regressions, r5f nodes are kept intact. These will be added in kernel in future. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-BootLokesh Vutla2021-02-048-406/+2347
| | | | | | | | | | | | | | | | | | Sync all J721e related v5.11-rc6 Linux kernel dts into U-Boot. HBMC nodes are not yet added in Linux kernel yet but were added in U-Boot. In order to avoid any regressions, hbmc nodes are kept intact. These will be added in kernel in future. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * arm: dts: k3-am65: Sync Linux v5.11-rc6 dts into U-BootLokesh Vutla2021-02-049-376/+1360
| | | | | | | | | | | | Sync all AM65 related v5.11-rc6 Linux kernel dts into U-Boot. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * arm: dts: k3-am654-base-board: Limit Sd card to High speed modesFaiz Abbas2021-02-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | There's an issue with the base board in which the power cycle circuit takes way longer to power down than expected by mmc core. code. This prevents the card from enumerating in UHS modes. Disable UHS modes for this board until a new board revision fixes the issue. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
| * arm: dts: k3-am65-main: Add itapdly and clkbuf-sel valuesFaiz Abbas2021-02-041-0/+9
| | | | | | | | | | | | | | | | Add the appropriate itapdly and clkbuf-sel values required for some lower speed modes. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
| * arm: dts: k3-j7200-common-proc-board: Enable support for UHS modesFaiz Abbas2021-02-043-2/+63
| | | | | | | | | | | | | | | | | | Add support for UHS modes by adding the regulators to power cycle and voltage switch the card. Also add pinmuxes required for each node Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
| * arm: dts: k3-j7200-main: Add support for gpio0Faiz Abbas2021-02-041-0/+22
| | | | | | | | | | | | | | Add support for the main_gpio0 node Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
| * arm: dts: k3-j721e-common-proc-board: Add support for UHS modes for SD cardFaiz Abbas2021-02-041-0/+32
| | | | | | | | | | | | | | | | Add support for regulators to power cycle and switch IO voltage to the SD card. This enables support for UHS modes. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
| * arm: dts: k3-j721e-main: Update otap-delay valuesFaiz Abbas2021-02-041-3/+5
| | | | | | | | | | | | | | | | | | Update otap delay values to match with the latest Data Manual[1]. [1] https://www.ti.com/lit/gpn/dra829v Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
| * arm: dts: k3-am65: Fix mmc nodesFaiz Abbas2021-02-044-60/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because of fundamental interface issues in am65x pg1, only the initial sdhci1 node at 25 MHz was added in the u-boot.dtsi from which both the base-board.dts and r5-base-board.dts inherit the node. Move the node out to k3-am65-main.dtsi where it belongs and add the board specific properties in base-board.dts and r5-base-board.dts This ensures dts compatibility with the kernel dts in the base-board.dts and enables the SD card interface at 50 MHz and High Speed mode While we are here, also fix the main_mmc0_pins_default property to be included and inherit from the base-board.dts instead of the u-boot.dtsi Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
| * remoteproc: k3_r5: Sync to upstreamed kernel DT property namesSuman Anna2021-02-045-42/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The K3 R5F remoteproc driver in U-Boot was upstreamed prior to the equivalent remoteproc driver in the Linux kernel. Some of the DT properties used in U-Boot got upstreamed using different names in Linux kernel. The modified property names include the R5F cluster mode configuration property "lockstep-mode"; and three different individual R5F core config properties - "atcm-enable", "btcm-enable" and "loczrama". The property names were updated as follows: lockstep-mode => ti,cluster-mode atcm-enable => ti,atcm-enable btcm-enable => ti,btcm-enable loczrama => ti,loczrama Update the K3 R5F remoteproc driver, the corresponding binding, and all the existing usage in AM65x, J721E and J7200 dts files all at once to use the new properties and to not break any bisectability. Signed-off-by: Suman Anna <s-anna@ti.com>
* | Merge tag 'dm-pull-3feb21' of https://gitlab.denx.de/u-boot/custodians/u-boot-dmTom Rini2021-02-048-22/+23
|\ \ | | | | | | | | | | | | Support late device removal Allow booting a 32-bit system with a top memory address beyond 4 GiB
| * | bdinfo: Change to use bdinfo_print_num_ll() where the number could be 64-bitBin Meng2021-02-031-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are some calls to bdinfo_print_num_l() with parameters that could be a 64-bit value on a 32-bit system. Change those calls to use bdinfo_print_num_ll() instead. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | bdinfo: Rename function names to be clearerBin Meng2021-02-033-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we have bdinfo_print_num() to print unsigned long numbers. We also have print_phys_addr() which accept numbers that might be 64-bit on a 32-bit platform. Rename these 2 functions to be clearer: bdinfo_print_num() => bdinfo_print_num_l() print_phys_addr() => bdinfo_print_num_ll() While we are here, make bdinfo_print_num_ll() public so that it can be used outside cmd/bdinfo.c in the future. Signed-off-by: Bin Meng <bin.meng@windriver.com>
| * | riscv: Change phys_addr_t and phys_size_t to 64-bitBin Meng2021-02-031-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | phys_addr_t and phys_size_t are currently defined as `unsigned long`, but RV32 supports 34-bit physical address, hence both phys_addr_t and phys_size_t should be defined to 64-bit using `unsigned long long`. Signed-off-by: Bin Meng <bin.meng@windriver.com>
| * | arm: rockchip: Explicitly cast gd->ram_top in dram_init_banksize()Bin Meng2021-02-031-1/+1
| | | | | | | | | | | | | | | | | | | | | The min() macro used in dram_init_banksize() requires two elements to compare have the same type. Let's explicitly cast gd->ram_top. Signed-off-by: Bin Meng <bin.meng@windriver.com>
| * | riscv: Adjust board_get_usable_ram_top() for 32-bitBin Meng2021-02-032-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When testing QEMU RISC-V 'virt' machine with a 2 GiB memory configuration, it was discovered gd->ram_top is assigned to value zero in setup_dest_addr(). While gd->ram_top should not be declared as type `unsigned long`, which will be updated in a future patch, the current logic in board_get_usable_ram_top() can be updated to cover both 64-bit and 32-bit RISC-V. Signed-off-by: Bin Meng <bin.meng@windriver.com>
| * | arm: Remove vital devices lastSimon Glass2021-02-031-0/+3
| |/ | | | | | | | | | | | | | | | | | | | | Update announce_and_cleanup() to remove all devices, with the vital ones being removed last. This is an extra patch on top of the recent RFC: http://patchwork.ozlabs.org/project/uboot/list/?series=223280 Signed-off-by: Simon Glass <sjg@chromium.org>
* | x86: qemu: Fix broken multi-core bootBin Meng2021-02-031-0/+6
|/ | | | | | | | | | | | | Unfortunately the multi-core boot for QEMU x86 has been broken since commit 77a5e2d3bc61 ("x86: mp_init: Set up the CPU numbers at the start"). In order to support QEMU x86 multi-core boot, the /cpus node must be bound before any actual fix up in qemu_cpu_fixup(). This adds the uclass_get() call to ensure this, just like what was done before. Fixes: 77a5e2d3bc61 ("x86: mp_init: Set up the CPU numbers at the start") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm: Remove #include <version.h> from armv8/fwcall.cPali Rohár2021-02-011-1/+0
| | | | | | | | | No version information is used in armv8/fwcall.c therefore do not include version.h header file. This change prevents recompiling fwcall.o when SOURCE_DATE_EPOCH changes. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: tpl: Show next stage being bootedSimon Glass2021-02-011-1/+6
| | | | | | | | Enhance the debugging to show the next stage being booted as well as a dump of the start of the image. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: spl: Clear BSS unconditionallySimon Glass2021-02-011-1/+1
| | | | | | | | This should be done even if not using TPL, since BSS may be in use or boards that only use SPL. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
View Lorry Controller Status