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* x86: Introduce minimal PMU driver for Intel MID platformsAndy Shevchenko2017-04-104-0/+130
| | | | | | | | | | | | | This simple PMU driver allows to tyrn power on and off for selected devices. In particularly Intel Tangier needs to power on SDHCI controllers in order to access to them during board initialization. In the future it might be expanded to cover other Intel MID platforms, that's why it's located under arch/x86/lib and called pmu.c. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Add SCU IPC driver for Intel MID platformsFelipe Balbi2017-04-105-0/+200
| | | | | | | | | | | | Intel MID platforms have few microcontrollers inside SoC, one of them is so called System Controller Unit (SCU). Here is the driver to communicate with microcontroller. Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: bootm: Fix FIT image booting on x86Stefan Roese2017-04-101-1/+1
| | | | | | | | | | | | | | | | Checking 'is_zimage' at this time will always fail and therefore booting a FIT style image will always lead to this error message: "## Kernel loading failed (missing x86 kernel setup) ..." This change now removes this check and booting of FIT images works just fine. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add file names from Kconfig in descriptor/intel-me nodes in u-boot.dtsiStefan Roese2017-04-101-0/+2
| | | | | | | | | | | Since we now have the file names configurable via Kconfig for the flash descriptor and intel-me files, add these from Kconfig in the corresponding dts nodes. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Kconfig: Add options to configure the descriptor.bin / me.bin filenamesStefan Roese2017-04-101-0/+16
| | | | | | | | | | This introduces two Kconfig options to enable board specific filenames for the Intel binary blobs to be used to generate the SPI flash image. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* board_f: Make relocation functions genericSimon Glass2017-04-052-18/+1
| | | | | | | This header file is used by three archs. It could be used by all of them since relocation is a common function. Move it into a generic file. Signed-off-by: Simon Glass <sjg@chromium.org>
* board_f: Make init_helpers genericSimon Glass2017-04-052-14/+1
| | | | | | | | This header file is used by two archs. It could be used by all of them since it allows the cache to be on during relocation. Move it into a generic file. Signed-off-by: Simon Glass <sjg@chromium.org>
* Move dram_init_banksize() to a common headerSimon Glass2017-04-051-1/+0
| | | | | | | | This is an weak function present on all archs so we should have it in the common header file. Remove it from arch-specific headers and add a function comment. Signed-off-by: Simon Glass <sjg@chromium.org>
* board_f: Drop setup_dram_config() wrapperSimon Glass2017-04-059-10/+26
| | | | | | | | By making dram_init_banksize() return an error code we can drop the wrapper. Adjust this and clean up all implementations. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
* board_f: x86: Use checkcpu() for CPU initSimon Glass2017-04-059-7/+55
| | | | | | | | | | | | | At present we misuse print_cpuinfo() do so CPU init on x86. This is done because it is the next available call after the console is enabled. But several arches use checkcpu() instead. Despite the horrible name (which we can fix), it seems a better choice. Adjust the various x86 CPU implementations to move their init code into checkcpu() and use print_cpuinfo() only for printing CPU info. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
* board_f: x86: Rename x86_fsp_init() to arch_fsp_init()Simon Glass2017-04-052-4/+1
| | | | | | | | | | | | While x86 is the only user and this could in principle be moved to arch_cpu_init() there is some justification for this being a separate call. It provides a way to handle init which is not CPU-specific, but must happen before the CPU can be set up. Rename the function to be more generic. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
* dm: core: Add flags parameter to device_remove()Stefan Roese2017-04-041-2/+2
| | | | | | | | | | | | | This patch adds the flags parameter to device_remove() and changes all calls to this function to provide the default value of DM_REMOVE_NORMAL for "normal" device removal. This is in preparation for the driver specific pre-OS (e.g. DMA cancelling) remove support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Intel MID platforms has no microcode updateAndy Shevchenko2017-02-211-1/+2
| | | | | | | | | | | There is no microcode update available for SoCs used on Intel MID platforms. Use conditional to bypass it. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* x86: zImage: add Intel MID platforms supportVincent Tinelli2017-02-211-0/+4
| | | | | | | | | | | | Intel MID platform boards have special treatment, such as boot parameter setting. Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* x86: Introduce INTEL_MID quirk optionAndy Shevchenko2017-02-211-0/+14
| | | | | | | | | | | | | | | | | | Intel Mobile Internet Device (MID) platforms have special treatment in some cases, such as CPU enumeration or boot parameters configuration. Besides that several drivers are specifically developed for the IP blocks found on Intel MID platforms. Those drivers will be dependent to this option. Here we introduce specific quirk option for such cases. It is supposed to be selected by Intel MID platform boards, for example, Intel Edison. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* x86: Force 32-bit jumps in interrupt handlersJ. Tang2017-02-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Depending upon the compiler used, IRQ entries could vary in sizes. With GCC 5.x, the code generator will use short jumps for some IRQ entries but near jumps for others. For example, GCC 5.4.0 generates the following: $ objdump -d interrupt.o <snip> 00000207 <irq_18>: 207: 6a 12 push $0x12 209: eb 85 jmp 190 <irq_common_entry> 0000020b <irq_19>: 20b: 6a 13 push $0x13 20d: eb 81 jmp 190 <irq_common_entry> 0000020f <irq_20>: 20f: 6a 14 push $0x14 211: e9 7a ff ff ff jmp 190 <irq_common_entry> 00000216 <irq_21>: 216: 6a 15 push $0x15 218: e9 73 ff ff ff jmp 190 <irq_common_entry> This causes a problem in cpu_init_interrupts(), because the IDT setup assumed same sizes for all IRQ entries. GCC 4.x always generated 32-bit jumps, so this previously was not a problem. The fix is to force 32-bit near jumps for all entries within the inline assembly. This works for GCC 5.x, and 4.x was already using that form of jumping. Signed-off-by: Jason Tang <tang@jtang.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: core: Replace of_offset with accessorSimon Glass2017-02-0814-24/+26
| | | | | | | | | At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: make LOAD_FROM_32_BIT visible for platformsAndy Shevchenko2017-02-072-10/+10
| | | | | | | | | | | This option is useful not only for development, but for the platforms where U-Boot is run from custom ROM bootloader. For example, Intel Edison is that board. Make this option visible that platforms can select it if needed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: Mark ucode as optional for SPL in u-boot.dtsiBin Meng2017-02-071-0/+6
| | | | | | | | QEMU does not need ucode and this is indicated in u-boot.dtsi for U-Boot proper. Now add the same for SPL. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Set up device tree for SPLBin Meng2017-02-072-0/+8
| | | | | | | | Add the correct pre-relocation tag so that the required device tree nodes are present in the SPL device tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Fix compiler warnings for 64-bitBin Meng2017-02-072-4/+4
| | | | | | | This fixes compiler warnings for QEMU in 64-bit. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Hide arch_cpu_init() and print_cpuinfo() for U-Boot properBin Meng2017-02-071-1/+4
| | | | | | | | arch_cpu_init() and print_cpuinfo() should be only available in SPL build. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Compile irq.c for 64-bitBin Meng2017-02-071-1/+1
| | | | | | | There is no reason not to compile irq.c for 64-bit. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: spl: Add weak arch_cpu_init_dm()Bin Meng2017-02-071-0/+5
| | | | | | | | arch_cpu_init_dm() might not be implemented by every platform. Implement a weak version for SPL. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Wrap print_ch() with config optionBin Meng2017-02-071-0/+2
| | | | | | | print_ch() should not be used if DEBUG_UART is off. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Add missing DECLARE_GLOBAL_DATA_PTR in e820.cBin Meng2017-02-071-0/+2
| | | | | | | DECLARE_GLOBAL_DATA_PTR is missing which causes 64-bit build error. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Update compile/link flags to support 64-bit U-BootSimon Glass2017-02-072-4/+28
| | | | | | | Update config.mk settings to support both 32-bit and 64-bit U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: link: Set up device tree for SPLSimon Glass2017-02-071-1/+14
| | | | | | | | | | | | | Add the correct pre-relocation tag so that the required device tree nodes are present in the SPL device tree. On x86 it doesn't make a lot of sense to have a separate SPL device tree. Since everything is in the same ROM we might as well just use the main device tree in both SPL and U-Boot proper. But we haven't implemented that, so this is a good first step. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: link: Add SPL declarations to the binman imageSimon Glass2017-02-071-0/+19
| | | | | | | | When building for 64-bit we need to put an SPL binary into the image. Update the binman image description to reflect this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add a dummy setjmp implementation for x86_64Simon Glass2017-02-072-1/+21
| | | | | | | | We don't have the code for this yet. Add a dummy version for now, so that EFI builds correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Move setjmp to the i386 directorySimon Glass2017-02-073-3/+1
| | | | | | | | This code is only used in 32-bit mode. Move it so that it does not get built with 64-bit U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Move call64 to the i386 directorySimon Glass2017-02-073-1/+2
| | | | | | | | This code is only used in 32-bit mode. Move it so that it does not get built with 64-bit U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Change irq_already_routed to a local variableSimon Glass2017-02-071-4/+6
| | | | | | | This avoids using BSS before SDRAM is set up in SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Move turbo_state to global_dataSimon Glass2017-02-072-4/+5
| | | | | | | | To avoid using BSS in SPL before SDRAM is set up, move this field to global_data. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Move pirq_routing_table to global_dataSimon Glass2017-02-072-7/+6
| | | | | | | | To avoid using BSS in SPL before SDRAM is set up, move this field to global_data. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Support jumping from SPL to U-BootSimon Glass2017-02-063-0/+76
| | | | | | | | Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Drop interrupt support in 64-bit modeSimon Glass2017-02-061-0/+5
| | | | | | | This is not currently supported, so drop the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Don't try to boot Linux from SPLSimon Glass2017-02-061-0/+4
| | | | | | | | | | | Booting into linux from 64-bit U-Boot is not yet supported. Avoid bringing in the bootm code until it is implemented. Of course 32-bit U-Boot still supports booting into both 32- and 64-bit kernels. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Don't build 32-bit efi files on x86_64Simon Glass2017-02-061-0/+4
| | | | | | | These cannot be built in this mode, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Don't build cpu files which are not supported on 64-bitSimon Glass2017-02-061-1/+8
| | | | | | | | Some files cannot be built with 64-bit and mostly don't make sense in that context. Disable them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Don't build call64 and setjmp on 64-bitSimon Glass2017-02-062-1/+12
| | | | | | | | | These are currently not supported. Calling 64-bit code from 64-bit U-Boot is much simpler, so this code is not needed. setjmp() is not yet implemented for 64-bit. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Don't try to run the VGA BIOS in 64-bit modeSimon Glass2017-02-061-0/+2
| | | | | | | This is not supported, so disable it for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: ivybridge: Provide a dummy SDRAM init for 64-bitSimon Glass2017-02-063-0/+31
| | | | | | | | | | We don't support SDRAM init in 64-bit mode since it is essentially impossible to get into that mode before SDRAM set up. Provide dummy functions for now. At some point we will need to pass the SDRAM parameters through from SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: ivybridge: Skip SATA init in SPLSimon Glass2017-02-061-0/+2
| | | | | | | This doesn't work at present. Disable it for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Fix up type sizes for 64-bitSimon Glass2017-02-062-0/+10
| | | | | | | Adjust types as needed to support 64-bit compilation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Drop flag_is_changable() on x86_64Simon Glass2017-02-061-0/+3
| | | | | | | | This doesn't build at present and is not used in a 64-bit build. Disable it for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Fix up byteorder.h for x86_64Simon Glass2017-02-061-8/+9
| | | | | | | Remove the very old x86 code and add support for 64-bit. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add a link script for SPLSimon Glass2017-02-061-0/+74
| | | | | | | | If SPL is used it is always build in 32-bit mode. Add a link script to handle the correct placement of the sections. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add a link script for 64-bit x86Simon Glass2017-02-062-0/+82
| | | | | | | | This needs a different image format from 32-bit x86, so add a new link script. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Fix up CONFIG_X86_64 checkSimon Glass2017-02-061-1/+1
| | | | | | | | When SPL and U-Boot proper have different settings for this flag, we need to use the correct one. Fix this up in the interrupt code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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