| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | x86: Convert microcode format to device-tree-only | Simon Glass | 2014-12-18 | 1 | -7/+4 |
| * | x86: Add basic support to queensbay platform and crownbay board | Bin Meng | 2014-12-18 | 5 | -0/+323 |
| * | x86: Correct problems in the microcode loading | Simon Glass | 2014-12-18 | 1 | -10/+15 |
| * | x86: ivybridge: Update the microcode | Simon Glass | 2014-12-18 | 1 | -0/+2 |
| * | x86: Support Intel FSP initialization path in start.S | Bin Meng | 2014-12-13 | 1 | -0/+14 |
| * | x86: Add post failure codes for bist and car | Bin Meng | 2014-12-13 | 1 | -0/+1 |
| * | x86: queensbay: Adapt FSP support codes | Bin Meng | 2014-12-13 | 2 | -17/+27 |
| * | x86: Initial import from Intel FSP release for Queensbay platform | Bin Meng | 2014-12-13 | 2 | -0/+426 |
| * | x86: Clean up asm-offsets | Bin Meng | 2014-12-13 | 1 | -1/+2 |
| * | Replace <compiler.h> with <linux/compiler.h> | Masahiro Yamada | 2014-12-08 | 1 | -1/+2 |
| * | x86: Add initial video device init for Intel GMA | Simon Glass | 2014-11-25 | 4 | -1/+925 |
| * | x86: Add GDT descriptors for option ROMs | Simon Glass | 2014-11-25 | 1 | -3/+6 |
| * | x86: ivybridge: Add northbridge init functions | Simon Glass | 2014-11-25 | 3 | -0/+191 |
| * | x86: Add init for model 206AX CPU | Simon Glass | 2014-11-25 | 3 | -0/+521 |
| * | x86: Add LAPIC setup code | Simon Glass | 2014-11-25 | 2 | -0/+58 |
| * | x86: Drop old CONFIG_INTEL_CORE_ARCH code | Simon Glass | 2014-11-25 | 1 | -28/+0 |
| * | x86: Refactor interrupt_init() | Bin Meng | 2014-11-25 | 1 | -6/+20 |
| * | x86: Remove cpu_init_r() for x86 | Bin Meng | 2014-11-25 | 1 | -6/+0 |
| * | x86: Call cpu_init_interrupts() from interrupt_init() | Bin Meng | 2014-11-25 | 1 | -2/+0 |
| * | x86: Add Intel speedstep and turbo mode code | Simon Glass | 2014-11-25 | 2 | -0/+99 |
| * | x86: ivybridge: Set up XHCI USB | Simon Glass | 2014-11-25 | 2 | -0/+33 |
| * | x86: ivybridge: Set up EHCI USB | Simon Glass | 2014-11-25 | 3 | -0/+32 |
| * | x86: ivybridge: Add SATA init | Simon Glass | 2014-11-25 | 3 | -0/+246 |
| * | x86: ivybridge: Add additional LPC init | Simon Glass | 2014-11-25 | 2 | -1/+528 |
| * | x86: ivybridge: Add PCH init | Simon Glass | 2014-11-25 | 2 | -0/+124 |
| * | x86: ivybridge: Add support for BD82x6x PCH | Simon Glass | 2014-11-25 | 3 | -0/+140 |
| * | x86: pci: Add handlers before and after a PCI hose scan | Simon Glass | 2014-11-25 | 1 | -0/+12 |
| * | x86: Factor out common values in the link script | Simon Glass | 2014-11-25 | 2 | -7/+12 |
| * | x86: Ensure that all relocation data is included in the image | Simon Glass | 2014-11-25 | 1 | -1/+3 |
| * | x86: Remove board_early_init_r() | Simon Glass | 2014-11-25 | 1 | -11/+0 |
| * | x86: Add ivybridge directory to Makefile | Simon Glass | 2014-11-25 | 1 | -0/+2 |
| * | Merge git://git.denx.de/u-boot-x86 | Tom Rini | 2014-11-24 | 23 | -125/+2595 |
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| | * | x86: ivybridge: Implement SDRAM init | Simon Glass | 2014-11-21 | 7 | -5/+1037 |
| | * | x86: ivybridge: Add LAPIC support | Simon Glass | 2014-11-21 | 1 | -0/+3 |
| | * | x86: Make show_boot_progress() common | Simon Glass | 2014-11-21 | 2 | -24/+24 |
| | * | x86: ivybridge: Add early init for PCH devices | Simon Glass | 2014-11-21 | 3 | -0/+287 |
| | * | x86: ivybridge: Perform Intel microcode update on boot | Simon Glass | 2014-11-21 | 3 | -0/+157 |
| | * | x86: ivybridge: Check BIST value on boot | Simon Glass | 2014-11-21 | 1 | -0/+16 |
| | * | x86: ivybridge: Perform initial CPU setup | Simon Glass | 2014-11-21 | 1 | -0/+130 |
| | * | x86: Tidy up coreboot header usage | Simon Glass | 2014-11-21 | 3 | -6/+6 |
| | * | x86: ivybridge: Add early LPC init so that serial works | Simon Glass | 2014-11-21 | 3 | -0/+61 |
| | * | x86: pci: Allow configuration before relocation | Simon Glass | 2014-11-21 | 1 | -0/+50 |
| | * | x86: ivybridge: Enable PCI in early init | Simon Glass | 2014-11-21 | 3 | -0/+67 |
| | * | x86: Support use of PCI before relocation | Simon Glass | 2014-11-21 | 1 | -0/+21 |
| | * | x86: Refactor PCI to permit alternate init | Simon Glass | 2014-11-21 | 3 | -15/+35 |
| | * | x86: chromebook_link: Implement CAR support (cache as RAM) | Simon Glass | 2014-11-21 | 2 | -2/+162 |
| | * | x86: Emit post codes in startup code for Chromebooks | Simon Glass | 2014-11-21 | 2 | -1/+6 |
| | * | x86: Add chromebook_link board | Simon Glass | 2014-11-21 | 6 | -0/+263 |
| | * | x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directory | Masahiro Yamada | 2014-11-21 | 1 | -6/+6 |
| | * | x86: Replace fill_processor_name() with cpu_get_name() | Simon Glass | 2014-11-21 | 2 | -12/+15 |
