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* board: sifive: drop stuff related to unmatched revision 1Zong Li2021-07-214-1501/+1
* riscv: booti: do not force relocation if force_reloc is not setVitaly Wool2021-07-211-1/+6
* riscv: dts: add OpenPiton RISC-V board dts supportTianrui Wei2021-07-071-2/+2
* riscv: dts: add dts for unmatched rev1Zong Li2021-07-064-1/+1501
* board: sifive: Add an interface to get PCB revisionZong Li2021-07-061-0/+15
* riscv: sifive: fu740: Support i2c in splZong Li2021-07-062-0/+5
* riscv: sifive: fu740: kconfig: Enable support for Opencores I2C controllerZong Li2021-07-061-0/+2
* board: riscv: add openpiton-riscv64 SoC supportTianrui Wei2021-07-063-0/+158
* Merge tag 'v2021.07-rc5' into nextTom Rini2021-06-284-8/+64
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| * riscv: andes_plic: Fix riscv_get_ipi() maskBin Meng2021-06-171-1/+3
| * riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL configBin Meng2021-06-173-0/+54
| * riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bitBin Meng2021-06-171-1/+1
| * riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodesBin Meng2021-06-172-4/+0
| * riscv: ae350: dts: Remove the unnecessary space in bootargsBin Meng2021-06-172-2/+2
| * riscv: ae350: dts: Add SPDX license headerBin Meng2021-06-172-0/+4
* | k210: dts: Set PLL1 to the same rate as PLL0Sean Anderson2021-06-171-0/+2
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* riscv: cpu: fu740: clear feature disable CSRGreen Wan2021-05-311-0/+15
* board: sifive: add HiFive Unmatched board supportGreen Wan2021-05-311-0/+4
* riscv: dts: add SiFive Unmatched board supportGreen Wan2021-05-314-0/+1790
* riscv: dts: add fu740 supportGreen Wan2021-05-312-0/+434
* drivers: clk: add fu740 supportGreen Wan2021-05-311-1/+1
* riscv: cpu: fu740: Add support for cpu fu740Green Wan2021-05-3112-0/+281
* treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún2021-05-241-2/+2
* riscv: Drop USE_SPL_FIT_GENERATORBin Meng2021-05-191-100/+0
* riscv: ae350: Switch to use binman to generate u-boot.itbBin Meng2021-05-192-0/+4
* riscv: qemu: Switch to use binman to generate u-boot.itbBin Meng2021-05-194-0/+18
* riscv: dts: Sort build targets in alphabetical orderBin Meng2021-05-191-1/+1
* riscv: sifive: unleashed: Switch to use binman to generate u-boot.itbBin Meng2021-05-192-0/+71
* riscv: Group assembly optimized implementation of memory routines into a submenuBin Meng2021-05-171-0/+4
* riscv: Fix memmove and optimise memcpy when misalignBin Meng2021-05-172-142/+257
* riscv: Fix arch_fixup_fdt always failing without /chosenSean Anderson2021-05-171-4/+7
* riscv: Split SiFive CLINT support between SPL and U-Boot properBin Meng2021-05-175-5/+13
* Revert "riscv: cpu: fu740: clear feature disable CSR"Bin Meng2021-05-141-15/+0
* riscv: Don't reserve AI ram in k210 dtsSean Anderson2021-05-141-12/+0
* riscv: k210: Use AI as the parent clock of aisram, not PLL1Sean Anderson2021-05-141-1/+1
* riscv: k210: Rename airam to aisramSean Anderson2021-05-141-2/+2
* riscv: Enable some devices pre-relocationSean Anderson2021-05-141-0/+4
* riscv: cpu: fu740: clear feature disable CSRGreen Wan2021-05-051-0/+15
* riscv: cpu: Add callback to init each coreGreen Wan2021-05-052-0/+15
* lmb: move CONFIG_LMB in KconfigPatrick Delaunay2021-04-221-1/+0
* Add support for stack-protectorJoel Peshkin2021-04-201-0/+1
* riscv: dts: mpfs-icicle-kit: Drop 'clock-frequency' in the uart nodesBin Meng2021-04-081-4/+0
* riscv: assembler versions of memcpy, memmove, memsetHeinrich Schuchardt2021-04-086-21/+382
* riscv: simplify longjmpHeinrich Schuchardt2021-04-081-6/+2
* riscv: sifive: Rename fu540 board to unleashedBin Meng2021-04-082-4/+4
* riscv: Add watchdog bindings for the k210Sean Anderson2021-04-081-1/+0
* cpu: Rename SPL_CPU_SUPPORT to SPL_CPUSimon Glass2021-03-273-3/+3
* riscv: k210: Enable QSPI for spi3Sean Anderson2021-02-251-0/+2
* Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini2021-02-1512-0/+12
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| * common: Drop asm/global_data.h from common headerWIP/2021-02-02-drop-asm_global_data-when-unusedSimon Glass2021-02-0212-0/+12
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