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* arm: Remove #include <version.h> from armv8/fwcall.cPali Rohár2021-02-011-1/+0
| | | | | | | | | No version information is used in armv8/fwcall.c therefore do not include version.h header file. This change prevents recompiling fwcall.o when SOURCE_DATE_EPOCH changes. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-shTom Rini2021-01-317-0/+733
|\ | | | | | | - Sync r8a774a1 DT files, tmio sdhi DMA fix
| * arm: dts: rmobile: r8a774a1: Synchronize DTs with Linux 5.10Biju Das2021-01-317-0/+733
| | | | | | | | | | | | | | | | DTS files apart from r8a774a1-hihope-rzg2m-u-boot.dts and r8a774a1-u-boot.dtsi have been imported from linux 5.10 commit 2c85ebc57b3e1817 ("Linux 5.10"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
* | efi_loader: add Linux magic to aarch64 crt0Heinrich Schuchardt2021-01-291-1/+2
|/ | | | | | | | Add the Linux magic to the EFI file header to allow running our test programs with GRUB's linux command. Now we can dump the fixed-up device tree with our dtbdump.efi tool. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* arm: dts: enable MTK SPI NOR controller driverSkyLake.Huang2021-01-294-2/+52
| | | | | | | 1. Enable MTK SPI NOR controller driver on mt7622 & mt7629. 2. Enable quad mode for read and single mode for write. Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2021-01-273-11/+27
|\ | | | | | | | | | | | | | | | | | | | | - Espressobin: Disable slot when emmc is not present (Pali) - DS414; config header cleanup (Phil) - PCI: auto-config enhancement (Phil) - pci_mvebu: Also map IO region (Phil) - serial: a3720: Implement pending method for output direction (Pali) - turris_mox: Enable a few commands (Marek) - helios4 & ClearFog changes (Dennis) - Plus some minor misc changes
| * ARM: mvebu: helios4 dts changes to enable SPIDennis Gilmore2021-01-272-11/+26
| | | | | | | | | | | | | | | | Move all aliases defintions into the main dts file Add u-boot definiton to i2c0 based on clearfog set spi1 status to okay Signed-off-by: Dennis Gilmore <dennis@ausil.us>
| * ARM: mvebu: helios4 adjust env sizes to enable SPI to workDennis Gilmore2021-01-271-0/+1
| | | | | | | | | | | | mirror the clearfog setup to enable SPI to work Signed-off-by: Dennis Gilmore <dennis@ausil.us>
* | board: presidio-asic: Add CAxxxx Ethernet supportAlex Nemirovsky2021-01-271-0/+31
|/ | | | | | | | Add CAxxxx Ethernet support for the Cortina Access Presidio Engineering Board Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Tom Rini <trini@konsulko.com>
* sunxi: Add support for OrangePi Zero2Jernej Skrabec2021-01-252-0/+244
| | | | | | | | | | | | | | | | OrangePi Zero2 is SBC based on Allwinner H616 with 1 GiB of RAM, SD card support, gigabit ethernet, micro HDMI, WIFI, Bluetooth and 1 USB 2.0 port. It also has two GPIO headers which allows further peripherals to be used. The devicetree file is taken from v3 of the OrangePi Zero2 Linux submission [1], which it's not yet merged. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632084.html Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* arm: sunxi: add initial H616 DTSI and headersJernej Skrabec2021-01-251-0/+750
| | | | | | | | | | | | | | This commit introduces H616 DTSI file and dt-bindings headers needed for device tree files. Files are taken from v3 Linux H616 support submission[1], as the H616 .dtsi file is not merged upstream yet. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632082.html Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: Add H616 FEL supportJernej Skrabec2021-01-251-1/+4
| | | | | | | | H616 uses different address for reset. Add it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: Add support for H616 SoCJernej Skrabec2021-01-254-1/+27
| | | | | | | | | | | H616 is very similar to H6 so most of the infrastructure can be reused. However, two big differences are that it doesn't have functional SRAM A2 which is usually used for TF-A and it doesn't have ARISC co-processor. It also needs bigger SPL size - 48 KiB. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: Add H616 DRAM supportJernej Skrabec2021-01-257-0/+1325
| | | | | | | | | | | | | Allwinner H616 supports many types of DRAM. Most notably it supports LPDDR4. However, all commercially available boards at this time use only DDR3, so this commit adds only DDR3 support. Controller and MBUS are very similar to H6 but PHY is completely unknown. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: add support for R_I2C on H616Jernej Skrabec2021-01-251-0/+1
| | | | | | | | | | This port is needed for communication with PMIC. SPL uses it to set DRAM voltage on H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: add support for H616 uart0Jernej Skrabec2021-01-252-0/+5
| | | | | | | | | This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: introduce support for H616 clocksJernej Skrabec2021-01-252-3/+23
| | | | | | | | | | H616 has mostly the same clocks as H6 with some small differences. Just reuse H6 clocks for H616 and handle differences with macros. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: support loading with SPL > 32KBAndre Przywara2021-01-251-2/+16
| | | | | | | | | | | | | | | | H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org>
* sunxi: Add support for I2C on H6 like SoCsJernej Skrabec2021-01-253-1/+31
| | | | | | | | | | I2C support, especially R_I2C port, will be needed in future. Upcoming support for H616 will need R_I2C to adjust DRAM voltage. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: prcm: Add memory map for H6 like SoCsJernej Skrabec2021-01-253-238/+303
| | | | | | | | | | | | | | | | There was no need to have prcm definitions for H6 and similar SoCs till now. However, support R_I2C will be needed soon in SPL. Move old definitions to prcm_sun6i.h and add new ones in prcm_sun50i.h. One of those files will be selected in common prcm.h based on defined macros. This commit doesn't do any functional change. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* mmc: sunxi: Replace H6 ifdefs with H6 gen macroJernej Skrabec2021-01-251-1/+1
| | | | | | | | | | It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: Introduce common symbol for H6 like SoCsJernej Skrabec2021-01-258-14/+21
| | | | | | | | | | | | | It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: Add support for AXP305 PMICJernej Skrabec2021-01-251-0/+6
| | | | | | | | | | This PMIC can be found on H616 boards and it's very similar to AXP805 and AXP806. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: Add support for Orange Pi 3Andre Heider2021-01-252-0/+346
| | | | | | | | | | | | | | dts file is taken from Linux 5.11-rc1 tag. The Bluetooth controller of this device ships with a default address, use the new CONFIG_FIXUP_BDADDR option to fix it up. Signed-off-by: Andre Heider <a.heider@gmail.com> Acked-by: Maxime Ripard <mripard@kernel.org> [Updated OrangePi 3 DT, rebase and config update] Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* sunxi: Add support for Tanix TX6Jernej Skrabec2021-01-252-1/+126
| | | | | | | | | | | | This commit adds support for Tanix TX6 TV box, based on H6. It's low end H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other peripherals. DT file is taken from Linux 5.11-rc1 release. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* ARM: dts: sunxi: h6: Update DT filesJernej Skrabec2021-01-257-73/+794
| | | | | | | | Updated H6 DT files are based on Linux 5.11-rc1 release. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* Merge tag 'u-boot-imx-20210125' of ↵Tom Rini2021-01-2540-2065/+5298
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx Changes for 2020.04 ------------------- - new board: Phytec phyCORE-i.MX8MP i.MX8MN Beacon EmbeddedWorks devkit - Fixes: several nanbcb fixes fix for imx8mm_beacon - further switch to distro boot commands - DM: DM Ether for MX6UL CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
| * ARM: imx: add i.MX8MN lpddr4 image cfg fileMarek Vasut2021-01-231-0/+17
| | | | | | | | | | | | | | | | | | Add cfg file for i.MX8MN LPDDR4 Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * imx: Add support for i.MX8MN Beacon EmbeddedWorks devkit.Adam Ford2021-01-236-0/+790
| | | | | | | | | | | | | | | | | | | | | | Beacon EmbeddedWorks is releasing a devkit based on the i.MX8M Nano SoC consisting of baseboard + SOM. The kit is based on the same design as the Beacon dev kit with the i.MX8M Mini. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * spi: imx: Define register bits in the driverMarek Vasut2021-01-236-200/+0
| | | | | | | | | | | | | | | | | | | | The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
| * arm64: dts: imx8mm-beacon: Resync imx8mm-beacon-som with 5.11-rc4Adam Ford2021-01-231-139/+187
| | | | | | | | | | | | | | | | | | In order to support the QSPI chip on the SOM, the Flexspi bus needs to be configured to talk with the SPI chip. Resync the som device tree with 5.11-rc4 Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>
| * board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP supportTeresa Remmet2021-01-235-0/+576
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
| * arm: dart6ul: enable DM_ETH for the dart6ulMarc Ferland2021-01-232-34/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts the dart6ul ethernet support to DM_ETH and cleans up the legacy ethernet code. The clean up, more specifically: * moves the fec2 node and pin definition to the carrier board DTS since the phy associated with it is on the carrier board and not on the SoM; * add the reset pin associated to each phy; * separate the ethernet, mdio and reset pins of each fec so that they are easier to reference; * add clock properties to the phy nodes since they are connected to the 50Mhz ENET[12]_TX_CLK clock of the SoC; * remove CONFIG_BOARD_EARLY_INIT_F since the function is now empty. Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
| * imx: timer: Modify GPT timer driver for mx7Ye Li2021-01-231-7/+9
| | | | | | | | | | | | | | | | | | | | | | Modify the GPT common platform driver for mx7 which only use 24Mhz OSC as clock source. Note: at default, the mx7d will use system counter as timer. The GPT is disabled. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: add QSPI boot devPeng Fan2021-01-232-2/+6
| | | | | | | | | | | | | | | | When boot type could not be detected from rom sw info, read sbmr1 to detect, here we only use it to detect FLEXSPI boot, because ROM not update it in rom sw info. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx6: Remove AHCI device before boot OSYe Li2021-01-231-0/+16
| | | | | | | | | | | | | | | | Since we remove SATA device before boot OS, when AHCI is enabled, update the codes to remove AHCI device. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: Fix market segment fuse offset on iMX8MPYe Li2021-01-231-1/+7
| | | | | | | | | | | | | | | | | | iMX8MP has shifted market segment fuse one bit from 0x440 [7:6] to [6:5], correct it in imx common codes. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * nandbcb: nand support for i.MX8MPHan Xu2021-01-231-8/+8
| | | | | | | | | | | | | | | | | | | | | | Add NAND boot support for i.MX8MP by adding i.MX8MP in nandbcb support list, reading boot_search_count from fuse. i.MX8MN NAND boot is same as i.MX8MP, fix some issues as well. Signed-off-by: Han Xu <han.xu@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: nandbcb: Fix potential overflow in nandbcb_set_boot_configYe Li2021-01-231-1/+2
| | | | | | | | | | | | | | | | | | Fix Coverity Issue 9006656. In nandbcb_set_boot_config, an integer overflow occurs, with the result converted to a wider integer type. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: nandbcb: Fix potential overflow in fill_dbbt_dataYe Li2021-01-231-1/+1
| | | | | | | | | | | | | | | | | | Fix Coverity Issue 9006658. In fill_dbbt_data, an integer overflow occurs, with the result converted to a wider integer type Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: nandbcb: Fix resource leak in read_fcbYe Li2021-01-231-2/+7
| | | | | | | | | | | | | | | | | | | | | | Fix Coverity Issue 9006657. In read_fcb, leak of memory to system resource "fcb_raw_page". Adjust the sequence to check the mtd bad block prior than allocation of "fcb_raw_page", also check the NULL return of allocation. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: nandbcb: Fix resource leakYe Li2021-01-231-2/+0
| | | | | | | | | | | | | | | | | | | | Fix Coverity Issue 9006655. In write_fcb, leak of memory to resource "fcb_raw_page". Since we have initialized the "ret" to 0, should return the value of ret. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * nandbcb: Fix uninitialized variableYe Li2021-01-231-1/+1
| | | | | | | | | | | | | | | | | | Fix Coverity Issue 9006654. In write_fcb, use of an uninitialized variable "ret". Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: lowlevel_init: tune alignmentPeng Fan2021-01-231-1/+1
| | | | | | | | | | | | The minimum alignment is 16 bytes, so use align 4 is enough. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * arm: dts: imx8mq: sync dts from Linux KernelPeng Fan2021-01-233-44/+1067
| | | | | | | | | | | | | | Sync dts from Linux Kernel commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc") Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * arm: dts: imx8mm: sync dts from Linux KernelPeng Fan2021-01-233-462/+614
| | | | | | | | | | | | | | Sync dts from Linux Kernel commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc") Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * arm: dts: imx8mp: sync dts from Linux KernelPeng Fan2021-01-233-275/+436
| | | | | | | | | | | | | | Sync dts from Linux Kernel commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc") Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: clock: add type of set_clk_eqosPeng Fan2021-01-231-0/+1
| | | | | | | | | | | | Add type of set_clk_eqos to make it could be used by other files. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * arm: dts: imx8mn: sync dts from Linux KernelPeng Fan2021-01-234-884/+1474
| | | | | | | | | | | | | | Sync dts from Linux Kernel commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc") Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: imx8mn_ddr4_evk: Use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK boardPeng Fan2021-01-231-1/+1
| | | | | | | | | | | | | | use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board, we will use CONFIG_TARGET_IMX8MN_EVK for LPDDR4 EVK board. Signed-off-by: Peng Fan <peng.fan@nxp.com>
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