summaryrefslogtreecommitdiff
path: root/arch/arm/mach-omap2/omap5
Commit message (Collapse)AuthorAgeFilesLines
* treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada2020-07-171-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
* arm: Remove cm_t54 boardJagan Teki2020-07-091-1/+0
| | | | | | | | | | DM, DM_SPI and other driver model migration deadlines are expired for this board. Remove it. Cc: Dmitry Lifshitz <lifshitz@compulab.co.il> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* common: Drop linux/bitops.h from common headerWIP/2020-05-18-reduce-size-of-common.hSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-183-0/+3
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Don't include common.h in header filesSimon Glass2020-05-181-0/+1
| | | | | | | | | | | It is bad practice to include common.h in other header files since it can bring in any number of superfluous definitions. It implies that some C files don't include it and thus may be missing CONFIG options that are set up by that file. The C files should include these themselves. Update some header files in arch/arm to drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag '2020-01-20-ti-2020.04' of ↵WIP/20Jan2020Tom Rini2020-01-201-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti K3 J721E: * DMA support. * MMC and ADMA support. * EEPROM support. * J721e High Security EVM support. * USB DT nodes K3 AM654: * Fixed boot due to pmic probe error. * USB support and DT nodes. * ADMA support DRA7xx/AM57xx: * BBAI board support * Clean up of net platform code under board/ti AM33/AM43/Davinci: * Reduce SPL size for omap3 boards. * SPL DT support for da850-lcdk * PLL divider fix for AM335x
| * board: ti: beagleboneai: add initial supportCaleb Robey2020-01-201-0/+1
| | | | | | | | | | | | | | | | | | | | These are necessities for beaglebone ai boot. There is the addition of CONFIG_SUPPORT_EMMC_CONFIG to the Kconfig file. This is present upstream but not in 19.01 yet. Signed-off-by: Jason Kridner <jdk@ti.com> Signed-off-by: Caleb Robey <c-robey@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | common: Move hang() to the same header as panic()Simon Glass2020-01-172-0/+2
| | | | | | | | | | | | | | | | | | | | At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
* | common: Move reset_cpu() to the CPU headerSimon Glass2020-01-171-0/+1
|/ | | | | | Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Allow control of GPIO uclass in SPLSimon Glass2019-12-151-1/+1
| | | | | | | | | | | | | | | | | | | | At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass is included in SPL/TPL without any control for boards. Some boards may want to disable this to reduce code size where GPIOs are not needed in SPL or TPL. Add a new Kconfig option to permit this. Default it to 'y' so that existing boards work correctly. Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to preserve the current behaviour. Also update the 74x164 GPIO driver since it cannot build with SPL. This allows us to remove the hacks in config_uncmd_spl.h and Makefile.uncmd_spl (eventually those files should be removed). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* ARM: DRA7: Fixup DSP OPP_HIGH clock rate on DRA76P/DRA77P SoCsSuman Anna2019-12-091-0/+12
| | | | | | | | | | | | | | | | | | The commit 1b42ab3eda8a ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPP") added the core logic to update the kernel device-tree blob to adjust the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected in U-Boot for most of the DRA7xx/AM57xx family of SoCs. The DSPs on DRA76xP/DRA77xP SoCs (DRA76x ACD package SoCs) though provide a higher performance and can run at a higher clock frequency of 850 MHz at OPP_HIGH instead of 750 MHz. Fix up the logic to use the correct clock rates on these SoCs. Note that this higher clock rate is not applicable to other Jacinto 6 Plus SoCs (DRA75xP/DRA74xP SoCs or AM574x SoCs) that follow the ABZ package. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: dra7xx: Hang on any failure during IOdelay recalibrationWIP/2019-10-11-ti-importsLokesh Vutla2019-10-111-0/+6
| | | | | | | | If there is any failure during IOdelay recalibration sequence, IOs are not guaranteed to behave as expected. So hang on any failure during the sequence. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: dra7xx: Fix error path in iodelay recalibrationLokesh Vutla2019-10-111-2/+3
| | | | | | | | | | When an error is reported in __recalibrate_iodelay_start(), de-isolation of IO doesn't happen. Because of this, undefined behaviour is observed on many peripherals without any error. So make sure io is out of isolation at the end of iodelay recalibration. Reported-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7: Fixup DPLL clock rate fixup logic for newer kernelsSuman Anna2019-08-201-1/+3
| | | | | | | | | | | | | | | | The commit 1b42ab3eda8a ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPP") updates the kernel device-tree blob to adjust the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected in U-Boot. All these DPLL clocks are children of the cm_core_aon clocks DT node. The hierarchy of this clocks DT node has changed in newer Linux kernels starting from v5.0, and this results in a failure in ft_fixup_clocks() function to update the clock rates on these newer kernels. Fix this by updating the lookup logic to look through both the newer and older DT hierarchy paths for the cm_core_aon clocks node. Signed-off-by: Suman Anna <s-anna@ti.com>
* CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner2019-05-181-3/+3
| | | | | | | | | | | | | While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: am57xx: cl-som-am57x: remove board supportUri Mashiach2019-04-171-5/+0
| | | | | | U-Boot support for the CL-SOM-AM57x module is no longer required. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
* Kconfig: Sort bool, default, select and imply optionsMichal Simek2018-07-301-6/+6
| | | | | | | | | Another round of sorting Kconfig entries aplhabetically. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-0711-23/+11
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini2018-04-271-2/+0
| | | | | | | | We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
* libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>Masahiro Yamada2018-03-051-1/+1
| | | | | | | | | | | | | | | | | Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: OMAP5: set mmc clock frequency to 192MHzKishon Vijay Abraham I2018-02-191-5/+5
| | | | | | | | | Now that omap_hsmmc has support for hs200 mode, change the clock frequency to 192MHz. Also change the REFERENCE CLOCK frequency to 192MHz based on which the internal mmc clock divider is calculated. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
* ARM: OMAP5/DRA7: Enable iodelay recalibration to be done from ubootKishon Vijay Abraham I2018-02-191-0/+30
| | | | | | | | | | | | | Add a new API to perform iodelay recalibration without isolate io to be used in uboot. The data manual of J6/J6 Eco recommends to set different IODELAY values depending on the mode in which the MMC/SD is enumerated in order to ensure IO timings are met. The MMC driver can use the new API to set the IO delay values depending on the MMC mode. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
* board: ti: am57xx: Enable CMD_DDR3Lokesh Vutla2018-01-191-0/+1
| | | | | | Enable CMD_DDR3 on all am57xx based platforms. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: dra762: Add support for device package identificationLokesh Vutla2018-01-193-0/+29
| | | | | | | | | | | | DRA762 comes in two packages: - ABZ: Pin compatible package with DRA742 with DDR@1333MHz - ACD: High performance(OPP_PLUS) package with new IPs Both the above packages uses the same IDCODE hence needs to differentiate using package information in DIE_ID_2. Add support for the same. Also update clock, ddr, emif information. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: dra7: Kconfig: Add thermal configs for dra7xx and am57xxFaiz Abbas2017-11-211-0/+6
| | | | | | | | Configure thermal configs to remain set by default for dra7xx and am57xx devices. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: DRA72x: Add support for detection of DRA71x SR 2.1Vishal Mahaveer2017-09-123-0/+7
| | | | | | | | | DRA71x processors are reduced pin and software compatible derivative of DRA72 processors. Add support for detection of SR2.1 version of DRA71x family of processors. Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* board: ti: dra76-evm: Add DDR dataLokesh Vutla2017-09-112-0/+3
| | | | | | | | | | dra76-evm has the ddr parts connectedi running at 666MHz: EMIF1: MT41K512M16HA-125 AIT:A x 2 EMIF2: MT41K512M8RH-125-AAT:E x 4 Add support for configuring the above DDR parts. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* board: ti: dra76-evm: Add the pmic dataKeerthy2017-09-111-0/+16
| | | | | | | | | | dra76-evm uses lp8736 and tps65917 pmic for powering on various peripherals. Add data for these pmics and register for dra76-evm. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: dra76: Add support for ES1.0 detectionPraneeth Bajjuri2017-09-112-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dra76 family is a high-performance, infotainment application device, based on OMAP architecture on a 28-nm technology. This contains most of the subsystems, peripherals that are available on dra74, dra72 family. This SoC mainly features Subsystems: - 2 x Cortex-A15 with max speed of 1.8GHz - 2 X DSP - 2 X Cortex-M4 IPU - ISS - CAL - DSS - VPE - VIP Connectivity peripherals: - 1 USB3.0 and 3 USB2.0 subsystems - 1 x SATA - 2 x PCI Express Gen2 - 3-port Gigabit ethernet switch - 2 x CAN - MCAN Adding CPU detection support for the dra76 ES1.0 soc and update prcm, control module, dplls data. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: dra7: Kconfig: Select LP87565 related configsLokesh Vutla2017-09-111-0/+4
| | | | | | | | LP87565 is present on dra76-evm. Select it for TARGET_DRA7XX_EVM. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* palmas: Add support for powering different ldosLokesh Vutla2017-09-111-1/+1
| | | | | | | | It is not necessary that ldo1 is used to power on mmc. So, add support for passing ldo registers for powering on mmc. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: omap5+: Add board specific ldo poweringLokesh Vutla2017-09-111-10/+6
| | | | | | | | It is not necessary all omap5+ based uses the same PMIC to poweron mmc. So add support for enabling mmc based on board. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: OMAP5: Enable support for AVS0 for OMAP5 production devicesNishanth Menon2017-08-132-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP5432 did go into production with AVS class0 registers which were mutually exclusive from AVS Class 1.5 registers. Most OMAP5-uEVM boards use the pre-production Class1.5 which has production efuse registers set to 0. However on production devices, these are set to valid data. scale_vcore logic is already smart enough to detect this and use the "Nominal voltage" on devices that do not have efuse registers populated. On a test production device populated as follows: MPU OPP_NOM: => md.l 0x04A0021C4 1 4a0021c4: 03a003e9 .... (0x3e9 = 1.01v) vs nom voltage of 1.06v MPU OPP_HIGH: => md.l 0x04A0021C8 1 4a0021c8: 03400485 ..@. MM OPP_NOM: => md.l 0x04A0021A4 1 4a0021a4: 038003d4 .... (0x3d4 = 980mV) vs nom voltage of 1.025v MM OPP_OD: => md.l 0x04A0021A8 1 4a0021a8: 03600403 ..`. CORE OPP_NOM: => md.l 0x04A0021D8 1 4a0021d8: 000003cf .... (0x3cf = 975mV) vs nom voltage of 1.040v Since the efuse values are'nt currently used, we do not regress on existing pre-production samples (they continue to use nominal voltage). But on boards that do have production samples populated, we can leverage the optimal voltages necessary for proper operation. Tested on: a) 720-2644-001 OMAP5UEVM with production sample. b) 750-2628-222(A) UEVM5432G-02 with pre-production sample. Data based on OMAP5432 Technical reference Manual SWPU282AF (May 2012-Revised Aug 2016) NOTE: All collaterals on OMAP5432 silicon itself seems to have been removed from ti.com, though EVM details are still available: http://www.ti.com/tool/OMAP5432-EVM Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: mach-omap2: Factor out common FDT fixup suportAndrew F. Davis2017-07-221-119/+0
| | | | | | | Some of the fixups currently done for OMAP5 class boards are common to other OMAP family devices, move these to fdt-common.c. Signed-off-by: Andrew F. Davis <afd@ti.com>
* arm: mach-omap2: Move omap5/sec-fxns.c into sec-common.cAndrew F. Davis2017-07-223-261/+0
| | | | | | | | TEE loading and firewall setup are common to all omap2 devices, move these function out of omap5 and into mach-omap2. This allows us to use these functions from other omap class devices. Signed-off-by: Andrew F. Davis <afd@ti.com>
* Convert CONFIG_SCSI to KconfigSimon Glass2017-07-111-0/+2
| | | | | | | | This converts the following to Kconfig: CONFIG_SCSI Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* omap5: Migrate CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC to KconfigTom Rini2017-05-152-6/+24
| | | | | | | | | | | | While in theory this value could be used in places outside of "omap5" (such as OMAP4), we only make use of it today in OMAP5, so place the Kconfig entry there. Given that Kconfig lets us provide a default, we drop CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC entirely. The contents of doc/README.omap-reset-time make a good help entry, so adjust them slightly and delete the file. Move the comment about range to where we use the value now, and have Kconfig enforce the upper bound. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: dra7xx: move CONFIG_DRA7XX to KconfigUri Mashiach2017-05-081-0/+8
| | | | | | | | The symbol CONFIG_DRA7XX is needed for Kconfig conditions. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: omap: sata: move enable sata clocks to enable_basic_clocks()Mugunthan V N2017-04-141-0/+12
| | | | | | | | | | All the clocks which has to be enabled has to be done in enable_basic_clocks(), so moving enable sata clock to common clocks enable function. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* TI: Migrate board/ti/common/Kconfig to implyTom Rini2017-03-091-36/+0
| | | | | | | The option that we had set in board/ti/common/Kconfig as default y are best done with imply under the appropriate main Kconfig option instead. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: omap5: Fix generation of reserved-memory DT nodeAndrew F. Davis2017-02-171-1/+6
| | | | | | | | | When the node 'reserved-memory' is not defined in the DT we fail to add needed properties. We also fail to move 'offs' to point to the new node. Fix these here. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Kconfig: Migrate BOARD_LATE_INIT to a selectTom Rini2017-01-241-0/+2
| | | | | | | | | This option should not really be user selectable. Note that on PowerPC we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be conditional on that. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
* ARM: OMAP5+: Remove unsed dpll structuresLokesh Vutla2017-01-201-55/+4
| | | | | | | | Latest gcc compile strted complaining about defined structure definition that are not used. Remove the unused sturctures. Reported-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: am57xx: cl-som-am57x: add initial board supportDmitry Lifshitz2017-01-021-0/+4
| | | | | | | | | | | | | | | | | | | | Features supported : * Serial console * SPI Flash * MMC/SD Card * eMMC storage * SATA * PCA9555 - GPIO expander over I2C5 bus * USB Use spl alternate boot device feature to define fallback to the main boot device as it is defined by hardware. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> [uri.mashiach@compulab.co.il: Adjust to v2016.11] Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* ARM: OMAP4+: Add support for getting pbias info from boardLokesh Vutla2016-12-041-0/+34
| | | | | | | | | | | | | Palmas driver assumes it is always TPS659xx regulator on all DRA7xx based boards to enable mmc regulator. This is not true always like in case of DRA71x-evm. So get this information based on the board. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Delete omap4_vmmc_pbias_config from omap_hsmmc.c] Signed-off-by: Tom Rini <trini@konsulko.com>
* board: ti: dra71x-evm: Add PMIC supportKeerthy2016-12-041-0/+16
| | | | | | | | | | | | | | | Add the pmic_data for LP873x PMIC which is used to power up dra71x-evm. Note: As per the DM[1] DRA71x supports only OP_NOM. So, updating the efuse registers only to use OPP_NOM irrespective of any CONFIG_DRA7_<VOLT>_OPP_{NOM,od,high} is defined. [1] http://www.ti.com/product/DRA718/technicaldocuments Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPPSuman Anna2016-12-041-0/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to update the device-tree blob to adjust the DSP and IVA DPLL clocks pertinent to the selected OPP choice, with the default being OPP_NOM. The voltage settings are done in u-boot, but the actual clock configuration itself is done in kernel because of the following reasons: 1. SoC definition constraints us to NOT to do dynamic voltage scaling ever after the initial avs0 setting in bootloader - so the voltage must be set in bootloader. 2. The voltage level must be set even if the IP blocks like GPU/DSP are unused. 3. The IVA, GPU and DSP DPLLs are not essential for u-boot functionality, and similar DPLL clock configuration code has been cleaned up in v2014.10 u-boot release. See commit, 02c41535b6a4 ("ARM: OMAP4/5: Remove dead code against CONFIG_SYS_CLOCKS_ENABLE_ALL"). The non-essential DPLLs are configured within the kernel during the clock init step when parsing the device tree and creating the clock devices. This approach meets both the u-boot and kernel needs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Subhajit Paul <subhajit_paul@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Redefine voltage and efuse macros per OPP using KconfigSuman Anna2016-12-041-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Redefine the macros used to define the voltage values and the efuse register offsets based on OPP for all the voltage domains. This is done using Kconfig macros that can be set in a defconfig or selected during a config step. This allows a voltage domain to be configured/set to a corresponding voltage value depending on the OPP selection choice. The Kconfig choices have been added for MPU, DSPEVE, IVA and GPU voltage domains, with the MPU domain restricted to OPP_NOM. The OPP_OD and OPP_HIGH options will be added when the support for configuring the MPU clock frequency is added. The clock configuration for other voltage domains is out of scope in u-boot code. The CORE voltage domain does not have separate voltage values and efuse register offset at different OPPs, while the MPU voltage domain only has different efuse register offsets for different OPPs, but uses the same voltage value. Any different choices of OPPs for voltage domains on common ganged-rails is automatically taken care to select the corresponding highest OPP voltage value. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: OMAP4+: Add support for dynamically selecting OPPsLokesh Vutla2016-12-041-6/+6
| | | | | | | | | | | It can be expected that different paper spins of a SoC can have different definitions for OPP and can have their own constraints on the boot up OPP for each voltage rail. In order to have this flexibility, add support for dynamically selecting the OPP voltage based on the board to handle any such exceptions. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
View Lorry Controller Status