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* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2019-01-112-2/+2
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| * Kconfig: rename CONFIG_SPL_USB_GADGET_SUPPORT as CONFIG_SPL_USB_GADGETJean-Jacques Hiblot2019-01-102-2/+2
| | | | | | | | | | | | | | The SPL option for USB gadget should be named after the option for u-boot (CONFIG_USB_GADGET) Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
* | imx8m: clock: Fix oscillator valuesFabio Estevam2019-01-091-2/+2
| | | | | | | | | | | | | | | | | | OSC_27M_CLK should return 27MHz and OSC_32K_CLK should return 32768Hz to reflect the reality. This also keeps the values in sync with the Linux clock tree. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* | imx8: cpu: correct infoPeng Fan2019-01-091-1/+1
| | | | | | | | | | | | | | | | | | | | The CPU banner printed is as following: CPU: CPU: Freescale i.MX8QXP RevB A35 at 147228 MHz 1. Drop the CPU: 2. Change vendor from Freescale to NXP Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | ARM: vf610: ddrmc: do not write CR79 by defaultStefan Agner2019-01-091-1/+0
| | | | | | | | | | | | | | | | | | | | The current value CTLUPD_AREF(0) is the reset value of the register, so there is no need to write a value. If needed, the register can be written using board specific CR settings. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* | ARM: vf610: ddrmc: fix initialization completion detectionStefan Agner2019-01-091-1/+2
| | | | | | | | | | | | | | | | | | | | The CR80 register has multiple interrupt bits, the code is supposed to check bit 8 but instead uses a logical and. In most cases this probably did not affect real operations since at that stage typically none of the other bits are set. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
* | ARM: vf610: ddrmc: program Dummy DDRBYTE1/2Stefan Agner2019-01-091-0/+2
|/ | | | | | | | | The Vybrid reference manual VFXXXRM Rev. 0 10/2016 states in chapter 5.2.6.1 DUMMY PADS (DDR/QuadSPI) that those pads need to be programed for correct operation of DDR. Assume the default DDR pin configuration which seems to work well on a Colibri VF50. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* imx: add i.MX8MQ EVK supportPeng Fan2019-01-011-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM. The boot log with Arm trusted firmware console enabled: " U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) PMIC: PFUZE100 ID=0x10 Normal Boot Trying to boot from MMC2 NOTICE: Configureing TZASC380 NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty NOTICE: BL31: Built : 09:28:54, Nov 8 2018 lpddr4 swffc start NOTICE: sip svc init U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz Reset cause: POR Model: Freescale i.MX8MQ EVK DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 using MAC address from ROM eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: imx8m: not build bootaux when building SPLPeng Fan2019-01-011-0/+2
| | | | | | No need to build bootaux in SPL stage Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx8mq: build flash.binPeng Fan2019-01-011-0/+25
| | | | | | | | Build flash.bin for i.MX8MQ, it will include signed hdmi firmware, spl, ddr firmware, fit image(bl31.bin, u-boot-nodtb.bin, dtb). Burn it to 33KB offset of SD card. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx8m: introduce imximage cfg filePeng Fan2019-01-011-0/+17
| | | | | | imximage.cfg will be used to generate the flash.bin Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx8m: introduce script to generate fit imagePeng Fan2019-01-011-0/+137
| | | | | | Introduce script to generate fit image for i.MX8M Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx8m: clock refactor dram pll partPeng Fan2019-01-011-24/+110
| | | | | | | Refactor dram_pll_init to accept args to configure different pll freq. Introduce dram_enable_bypass and dram_disable_bypass Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: spl: add MMC BOOT Device for i.MX8MPeng Fan2019-01-011-1/+10
| | | | | | Add MMC BOOT Device for i.MX8M Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: rename mx8m,MX8M to imx8m,IMX8MPeng Fan2019-01-0110-22/+22
| | | | | | | Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
* arm: imx8qxp: build u-boot-dtb.cfgout before checking filesPeng Fan2019-01-011-1/+1
| | | | | | | | Build u-boot-dtb.cfgout before checking files, otherwise u-boot-dtb.cfgout is generated at late stage and cause final image not generated. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: hab: extend hab_auth_img to calculate ivt_offsetParthiban Nallathambi2019-01-011-2/+27
| | | | | | | | | | | | | | | | | | | Current implementation of hab_auth_img command needs ivt_offset to authenticate the image. But ivt header is placed at the end of image date after padding. This leaves the usage of hab_auth_img command to fixed size or static offset for ivt header. New function "get_image_ivt_offset" is introduced to find the ivt offset during runtime. The case conditional check in this function is same as boot_get_kernel in common/bootm.c With this variable length image e.g. FIT image with any random size can have IVT at the end and ivt_offset option can be left optional Can be used as "hab_auth_img $loadaddr $filesize" from u-boot script Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Breno Lima <breno.lima@nxp.com>
* SPL: Add HAB image authentication to FITYe Li2019-01-011-6/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce two board level callback functions to FIT image loading process, and a SPL_FIT_FOUND flag to differentiate FIT image or RAW image. Implement functions in imx common SPL codes to call HAB funtion to authenticate the FIT image. Generally, we have to sign multiple regions in FIT image: 1. Sign FIT FDT data (configuration) 2. Sign FIT external data (Sub-images) Because the CSF supports to sign multiple memory blocks, so that we can use one signature to cover all regions in FIT image and only authenticate once. The authentication should be done after the entire FIT image is loaded into memory including all sub-images. We use "-p" option to generate FIT image to reserve a space for FIT IVT and FIT CSF, also this help to fix the offset of the external data (u-boot-nodtb.bin, ATF, u-boot DTB). The signed FIT image layout is as below: -------------------------------------------------- | | | | | | | | | FIT | FIT | FIT | | U-BOOT | ATF | U-BOOT | | FDT | IVT | CSF | | nodtb.bin | | DTB | | | | | | | | | -------------------------------------------------- Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: bootaux: fix stack and pc assignment on 64-bit platformsGary Bisson2019-01-011-2/+2
| | | | | | | | | | | Using ulong is wrong as its size depends on the Host CPU architecture (32-bit vs. 64-bit) although the Cortex-M4 is always 32-bit. Without this patch, the stack and PC are obviously wrong and it generates an abort when used on 64-bit processors such as the i.MX8MQ. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* imx: mx8m: add memory mapping for CAAM and TCMGary Bisson2019-01-011-0/+16
| | | | | | | | Otherwise can't boot the M4 core as it is impossible to load its firmware into the TCM memory. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* embestmx6boards: Add SPL supportFabien Lahoudere2019-01-011-0/+1
| | | | | | | In order to boot faster with falcon mode, we need to add SPL support to riotboard. Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
* imx: mkimage: add size check to the u-boot.imx make targetMarcel Ziswiler2018-11-121-0/+16
| | | | | | | | | | | | The make macro to check if the binary exceeds the board size limit is taken straight from the root Makefile. Without this and e.g. enabled EFI Vybrid fails booting as the regular size limit check does not take the final u-boot.imx binary size into account which is bigger due to alignment as well as IMX header stuff. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* imx: imx6: perform gpr_init only on suitable cpu typesChristoph Niedermaier2018-11-081-0/+8
| | | | | | | | | If the function gpr_init is used in a common MX6 spl implementation we have to ensure that it is only called for suitable cpu types, otherwise it breaks hardware parts like enet1, can1, can2, etc. Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
* Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imxTom Rini2018-10-2511-7/+807
|\ | | | | | | Merged imx8 architecture, fix build for imx8 + warnings
| * imx: mkimage: avoid stop CI when required files not existsPeng Fan2018-10-251-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | Introduce a new script to check whether file exists and use that check in Makefile to avoid break CI system. The script return 1 when the required files not exists, return 0 when files exists. The script will ignore check to u-boot-dtb.bin, because if there is something wrong to generate u-boot-dtb.bin, there must be some code error. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: mx7: avoid some initialization if low level is skippedRui Miguel Silva2018-10-222-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can have the case where u-boot is launched after some other low level enabler, like for example when u-boot runs after arm-trusted-firmware and/or optee. So, because of that we may need to jump the initialization of some IP blocks even because we may no longer have the permission for that. So, if the config option to skip low level init is set disable also timer, board and csu initialization. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Peng Fan <peng.fan@nxp.com> Cc: u-boot@lists.denx.de Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * arm: imx: include imx8image supportPeng Fan2018-10-221-6/+11
| | | | | | | | | | | | | | | | | | When building i.MX8/8X board, use imx8image type. `-e $(CONFIG_SYS_TEXT_BASE)` is not needed, but no harm to keep it for i.MX8/8X Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: add i.MX8QXP MEK board supportPeng Fan2018-10-221-0/+13
| | | | | | | | | | | | | | | | | | | | | | Add i.MX8QXP MEK board support Enabled pinctrl/clk/power-domain/mmc/i2c/fec driver. Added README file. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * imx8: add dummy clockPeng Fan2018-10-221-0/+21
| | | | | | | | | | | | | | | | | | This driver is mostly used to avoid build errors. We use uclass clk driver for clk related operations. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx8: add iomux configuration apiPeng Fan2018-10-222-1/+44
| | | | | | | | | | | | | | | | Add iomux configuration api. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx8: cpu: add uclass based CPU driverAnatolij Gustschin2018-10-221-76/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | print_cpuinfo() in board init code requires uclass CPU driver, add it to be able to display CPU info when CONFIG_DISPLAY_CPUINFO option is enabled. CPU node in DT will have to include 'clocks' and 'u-boot,dm-pre-reloc' properties for generic print_cpuinfo() to work as expected. The driver outputs info for i.MX8QXP Rev A and Rev B CPUs. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * imx8: cpu: add function for reading FEC MAC from fuseAnatolij Gustschin2018-10-221-0/+38
| | | | | | | | | | | | | | | | | | FEC driver requires imx_get_mac_from_fuse(). Add it in preparation for ENETx support. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * imx8: add arch_cpu_init arch_cpu_init_dmPeng Fan2018-10-221-1/+52
| | | | | | | | | | | | | | | | Add arch_cpu_init(_dm) mainly to open the channel between ACore and SCU. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx8: add mmu and dram related functionsPeng Fan2018-10-221-0/+284
| | | | | | | | | | | | | | | | | | | | | | | | Add mmu memmap, some memory regions are reserved by M4, Arm Trusted Firmware, so need to get memreg using SCFW API and setup the memmap. Add dram_init, dram_init_banksize, get_effective_memsize functions, according to the memreg. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx8: implement mmc_get_env_devPeng Fan2018-10-221-0/+32
| | | | | | | | | | | | | | | | Implement mmc_get_env_dev for i.MX8. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx8: add boot device detectionPeng Fan2018-10-221-0/+85
| | | | | | | | | | | | | | | | | | Add get_boot_device to detect boot device. Add print_bootinfo to print the boot device info. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx8: add basic cpu supportPeng Fan2018-10-222-0/+100
| | | | | | | | | | | | | | | | | | Add basic cpu support, including cpu revision, cpu type, cpu core detection. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx: add Kconfig entry for i.MX8QXPPeng Fan2018-10-222-0/+14
| | | | | | | | | | | | | | | | Add Kconfig entry for i.MX8QXP Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * arm: mx5: Add M53Menlo boardMarek Vasut2018-10-161-0/+6
| | | | | | | | | | | | | | | | Add Menlosystems M53 board, based on the M53 SoM. This board has Ethernet, USB host, USB gadget, UART and LCD on it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * arm: mx5: Add LDB clock config codeMarek Vasut2018-10-161-0/+29
| | | | | | | | | | | | | | | | Add code to configure PLL4, from which the LDB clock are directly derived. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * arm: imx: mx5: Make videoskip available on MX5Marek Vasut2018-10-161-1/+3
| | | | | | | | | | | | | | | | | | The board_video_skip() implementation in imx-common/video.c works on i.MX5x as well, so loosen the SoC filter in Makefile to make it available. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx: mx7: fix potential overflow in imx_ddr_size()Marcel Ziswiler2018-10-091-0/+4
| | | | | | | | | | | | | | | | | | The imx_ddr_size() function may overflow as it is possible to kind of over provision the DDR controller. Fix this by capping it to 2 GB which is the maximum allowed size as per reference manual. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* | arm: remove prototype for get_timer_maskedPatrick Delaunay2018-10-101-6/+1
|/ | | | | | | | | | | | | | The interruption support had be removed for ARM architecture and the function get_timer_masked() is no more used except in some the timer.c files. This patch clean each timer.c which implement this function and remove the associated prototype in u-boot-arm.h For timer.c, I don't verify if the weak version of get_timer (in lib/time.c) can be used Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* pico-imx6ul: Convert to SPLFabio Estevam2018-09-141-0/+1
| | | | | | | | | | | | | | | There are two versions of imx6ul pico SOMs: one with 256MB and another one with 512MB of RAM. Convert to SPL so that both versions can be supported. This patch doesn't rework the clock initialization to avoid changing the behavior in this same patch, so it will be cleaned up in future. Currently only the 256MB is tested/supported. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* imx: mx7: add system suspend/resume supportAnson Huang2018-09-043-3/+515
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds system suspend/resume support, when linux kernel enters deep sleep mode, SoC will go into below mode: - CA7 platform goes into STOP mode; - SoC goes into DSM mode; - DDR goes into self-refresh mode; - CPU0/SCU will be powered down. When wake up event arrives: - SoC DSM mdoe exits; - CA7 platform exit STOP mode, SCU/CPU0 power up; - Invalidate L1 cache; - DDR exit self-refresh mode; - Do secure monitor mode related initialization; - Jump to linux kernel resume entry. Belwo is the log of 1 iteration of system suspend/resume: [ 338.824862] PM: suspend entry (deep) [ 338.828853] PM: Syncing filesystems ... done. [ 338.834433] Freezing user space processes ... (elapsed 0.001 seconds) done. [ 338.842939] OOM killer disabled. [ 338.846182] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. [ 338.869717] PM: suspend devices took 0.010 seconds [ 338.877846] Disabling non-boot CPUs ... [ 338.960301] Retrying again to check for CPU kill [ 338.964953] CPU1 killed. [ 338.968104] Enabling non-boot CPUs ... [ 338.973598] CPU1 is up [ 339.267155] mmc1: queuing unknown CIS tuple 0x80 (2 bytes) [ 339.275833] mmc1: queuing unknown CIS tuple 0x80 (7 bytes) [ 339.284158] mmc1: queuing unknown CIS tuple 0x80 (6 bytes) [ 339.385065] PM: resume devices took 0.400 seconds [ 339.389836] OOM killer enabled. [ 339.392986] Restarting tasks ... done. [ 339.398990] PM: suspend exit The resume entry function has to initialize stack pointer before calling C code, otherwise there will be an external abort occur, in additional, invalidate L1 cache must be done in secure section as well, so this patch also adds assembly code back and keep it as simple as possible. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Stefan Agner <stefan@agner.ch> Tested-by: Stefan Agner <stefan@agner.ch>
* imx: mx7: add gpc initialization for low power modeAnson Huang2018-09-041-0/+103
| | | | | | | | | | | | | | | Add i.MX7D GPC initialization for low power mode support like system suspend/resume from linux kernel: - Pending IOMUXC IRQ to workaround GPC state machine issue; - Mask all GPC interrupts for M4/C0/C1; - Configure SCU timing; - Configure time slot ack; - Configure C0/C1 power up/down timing; - Configure wakeup source mechanism; - Disable DSM/RBC related settings. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* imx: mx7: psci: improve cpu hotplug flowAnson Huang2018-09-041-2/+21
| | | | | | | | | | | | | | | | This patch improves cpu hotplug, previous cpu_off implementation is NOT safe, a CPU can NOT power down itself in runtime, it will cause system bus hang due to pending transaction. So need to use other online CPU to kill it when it is ready for killed. Here use SRC parameter register and a magic number of ~0 as handshake for killing a offline CPU, when the online CPU checks the psci_affinity_info, it will help kill the offline CPU according to the magic number stored in SRC parameter register. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* dm: Fix CMD_DM enablingMichal Simek2018-07-311-1/+1
| | | | | | | | | | The patch "dm: Change CMD_DM enabling" (sha1: 08a00cba06a7e608ae65e3d7ea225cf8c639429d) was incorrectly updated and PICO_IMX7D is missing imply CMD_DM and WARP7 has it twice. This patch is fixing it. Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Kconfig: Sort bool, default, select and imply optionsMichal Simek2018-07-301-1/+1
| | | | | | | | | Another round of sorting Kconfig entries aplhabetically. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* dm: Change CMD_DM enablingMichal Simek2018-07-303-0/+32
| | | | | | | | | | | CMD_DM is used for debug purpose and it shouldn't be enabled by default via Kconfig. Unfortunately this is in the tree for quite a long time that's why solution is to use imply DM for all targets which are enabling DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
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