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* arm64: zynqmp: Remove undocumented dma propertiesMichal Simek2017-12-145-45/+0
| | | | | | | | | Remove overfetch, ratectrl, include-sg and src-issue dma properties. Driver is not using them and they are also not documented in the binding doc. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Kedareswara rao Appana <appanad@xilinx.com>
* arm64: zynqmp: Add generic compatible string for I2C EEPROMJavier Martinez Canillas2017-12-141-2/+2
| | | | | | | | | | | | | | | | | The at24 driver allows to register I2C EEPROM chips using different vendor and devices, but the I2C subsystem does not take the vendor into account when matching using the I2C table since it only has device entries. But when matching using an OF table, both the vendor and device has to be taken into account so the driver defines only a set of compatible strings using the "atmel" vendor as a generic fallback for compatible I2C devices. So add this generic fallback to the device node compatible string to make the device to match the driver using the OF device ID table. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Enable phys for zcu102Michal Simek2017-12-141-0/+11
| | | | | | Enable USB3.0 and SATA phy for zcu102 boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Add support for generic QSPI bootMichal Simek2017-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is enabling support for SPL QSPI boot. First of all it is necessary to generate atf-spi.ub which is different format than atf-uboot.ub (this can be made as legacy image too) ADDR=`arm-xilinx-linux-gnueabi-readelf -a bl31.elf | grep "Entry point address" | cut -d ':' -f 2 | sed -e 's/^[ \t]*//'` aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin ./tools/mkimage -f auto -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR -n "atf1" -E -b arch/arm/dts/zynqmp-zcu102.dtb -d bl31.bin atf-uboot.ub ./tools/mkimage -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR -n "atf-for-qspi" -E -d bl31.bin atf-spi.ub This patch is using this QSPI layout with offsets: 0 boot.bin 512k atf-ub 640k u-boot.bin 1280k u-boot.img Which corresponding by writing these images(read from MMC) mmcinfo sf probe load mmc 0 10000000 boot.bin sf erase 0 +$filesize sf write 10000000 0 $filesize load mmc 0 10000000 atf-spi.ub sf erase 0x80000 +$filesize sf write 10000000 0x80000 $filesize load mmc 0 10000000 u-boot.bin sf erase 0xa0000 +$filesize sf write 10000000 0xa0000 $filesize load mmc 0 10000000 u-boot.img sf erase 0x140000 +$filesize sf write 10000000 0x140000 $filesize For testing u-boot running in EL3 you can break atf-spi.ub like this: sf probe sf erase 0x80000 +4 Then u-boot.img is executed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Add reference to pmu firmware nodeMichal Simek2017-12-141-1/+1
| | | | | | | This reference is needed for pinctrl driver where some signals can be routed directly to platform management unit (PMU). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: Add Khadas VIM support based on Meson GXL familyNeil Armstrong2017-12-042-1/+139
| | | | | | | | | | | | | | This adds platform code for the Khadas VIM board based on a Meson GXL (S905X) SoC with the Meson GXL configuration. This initial submission supports UART, MMC/SDCard and Ethernet with the Internal RMII PHY. The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13 stable tree as of 4.13.8. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* arm: Add LibreTech CC support based on Meson GXL familyNeil Armstrong2017-12-042-1/+173
| | | | | | | | | | | | | | This adds platform code for the Libre Computer CC "Le Potato" board based on a Meson GXL (S905X) SoC with the Meson GXL configuration. This initial submission supports UART, MMC/SDCard and Ethernet with the Internal RMII PHY. The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13 stable tree as of 4.13.8. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* add support for Raspberry Pi Zero WDmitry Korunov2017-12-041-0/+26
| | | | Signed-off-by: Dmitry Korunov <dessel.k@gmail.com>
* rockchip: dts: rk3399-puma: add /config/sysreset-gpio propertyPhilipp Tomsich2017-11-301-0/+5
| | | | | | | | | | | | | | On the RK3399-Q7, we want to trigger a full platform reset (so the various software stacks supported don't have to deal with the same complexities over and over again) in case that anything other than a power-on reset occurred. To do so, this defines the /config/sysreset-gpio property and has it point to a GPIO that will perform a power-on reset of the entire platform. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
* rockchip: dts: rk3399-puma: add a 'tsd, usb-port-power' stringlist for USB1Philipp Tomsich2017-11-301-0/+1
| | | | | | | | | | | | | | | | USB1 is connected to the on-module USB 3.0 hub and power to the hub (actually it's a reset signal, modeled as a fixed regulator, that will be released) should be enabled only during the first probing of the device to avoid the hub from entering its low-power mode (where it tries to attach on a fixed interval, but we always miss the timeslot when U-Boot has the controller listening). This adds a 'tsd,usb-port-power' stringlist to enable the infrastructure in the board-specific usb_hub_reset_devices to find and control the fixed regulator associated with control of the USB hub. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
* rockchip: rk3128: add device tree fileKever Yang2017-11-303-0/+900
| | | | | | | | | | | | | | Add dts binding header for rk3128, files origin from kernel. Series-Changes: 2 - fix i2c address - add saradc and usb phy node - emmc using fifo mode for there is no dma support in rk3128 emmc - add some clock id in cru.h Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini2017-11-303-1/+16
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| * ARM: rmobile: Rework the ULCB CPLD driverMarek Vasut2017-11-301-0/+9
| | | | | | | | | | | | | | | | Rework the ULCB CPLD driver and make it into a sysreset driver, since that is what the ULCB CPLD driver is mostly for. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Migrate boards to RCar IIC driversMarek Vasut2017-11-301-0/+4
| | | | | | | | | | | | | | | | | | Stop using the old ad-hoc SH I2C driver and use the new RCar IIC driver instead. The SH I2C driver should be deprecated and removed eventually. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Use PRR driver on all Gen3 boardsMarek Vasut2017-11-302-0/+2
| | | | | | | | | | | | | | | | | | Mark the PRR as u-boot,dm-pre-reloc in all Gen3 board DTs as it is needed very early and turn on the CONFIG_SYSCON to allow the PRR driver to bind as a syscon uclass. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Fix eMMC signal voltage on ULCBMarek Vasut2017-11-301-1/+1
| | | | | | | | | | | | | | | | The eMMC is 1V8 device only and the signaling is always 1V8, fix the DT for ULCB to describe the hardware correctly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2017-11-301-1/+14
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| * | arm: mvebu: add nand pinsSean Nyekjaer2017-11-301-1/+14
| |/ | | | | | | | | Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Stefan Roese <sr@denx.de>
* | ARM: dts: Rename logicpd-toredp-37xx-devkit in U-BootAdam Ford2017-11-291-0/+2
| | | | | | | | | | | | | | | | | | | | In U-Boot, this device tree is compatible with both the Torpedo and SOM-LV kits. Let's rename it in the device tree since the U-Boot code and show a more generic OMAP3 name. The code auto detects between the two and loads the proper DTB file for Linux. This would eliminate the SOM-LV showing the name Torpedo during boot and hopefully eliminate some confusion. Signed-off-by: Adam Ford <aford173@gmail.com>
* | board: atmel: add sama5d2_ptc_ek boardLudovic Desroches2017-11-293-0/+236
| | | | | | | | | | | | | | | | Add the SAMA5D2 PTC EK board and remove the SAMA5D2 PTC ENGI board which was a prototype. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
* | ARM: DTS: stm32: update rcc compatible for STM32F746Patrice Chotard2017-11-291-1/+1
| | | | | | | | | | | | | | | | | | Align the RCC compatible string with the one used by kernel. It will allow to use the same clock driver for STM32F4 and STM32F7 and to manage the differences between the 2 SoCs Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
* | ARM: DTS: stm32: add pwrcfg node for stm32f746Patrice Chotard2017-11-292-0/+11
|/ | | | | | | | This node is needed to enable performance mode when system frequency is set up to 200Mhz. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
* Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblazeTom Rini2017-11-2923-130/+910
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx changes for v2018.1 Zynq: - Add support for Syzygy and cc108 boards - Add support for mini u-boot configurations (cse) - dts updates - config/defconfig updates in connection to Kconfig changes - Fix psu_init handling ZynqMP: - SPL fixes - Remove slcr.c - Fixing r5 startup sequence - Add support for external pmufw - Add support for new ZynqMP chips - dts updates - Add support for zcu102 rev1.0 board Drivers: - nand: Support external timing setting and board init - ahci: Fix wording - axi_emac: Wait for bit, non processor mode, readl/write conversion - zynq_gem: Fix SGMII/PCS support
| * arm64: zynqmp: Enable watchdog by defaultShubhrajyoti Datta2017-11-281-0/+4
| | | | | | | | | | | | | | Enable watchdog in dts for zcu102. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add note about si5328 interruptMichal Simek2017-11-281-0/+5
| | | | | | | | | | | | Add comment about irq present on the board connected to PL. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: usb: Correct IOMMU node for making SMMU work with USBAnurag Kumar Vulisha2017-11-281-4/+4
| | | | | | | | | | | | | | | | This patch makes SMMU work by moving the iommus node under the dwc3 child entry from parent node. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Remove clock setting from dtsiMichal Simek2017-11-281-2/+0
| | | | | | | | | | | | clock setting is handled via clk dtsi file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Uncomment snps,quirk-frame-length-adjustment flag in dwc3Anurag Kumar Vulisha2017-11-281-2/+2
| | | | | | | | | | | | | | This patch uncomments snps,quirk-frame-length-adjustment which has the value to adjust the SOF/ITP generated from the controller. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add USB OTG interrupts support in dtManish Narani2017-11-281-2/+2
| | | | | | | | | | | | | | | | | | This patch adds OTG interrupt support in device tree. It will add an extra interrupt line number dedicated to OTG events. This will enable OTG interrupts to serve in DWC3 OTG driver. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Enabled CCI support for USBManish Narani2017-11-281-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds CCI support for USB when CCI is enabled in design. This patch also adds 'reg' property for Xilinx USB 3.0 IP. The 'reg' property is added in order to modify a register in that to enable coherency in Hardware. Also add address to unit name to avoid dtc warning Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add support reading SoC revision using nvmem driver in dwc3Anurag Kumar Vulisha2017-11-281-0/+4
| | | | | | | | | | | | | | | | This patch adds support for reading silicon revision using zynqmp nvmem driver. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Move nodes which have no reg property out of busMichal Simek2017-11-283-50/+50
| | | | | | | | | | | | | | Nodes without reg properties shouldn't be placed in amba node. Move them out. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: dt: Add AMS nodeMichal Simek2017-11-282-0/+38
| | | | | | | | | | | | | | | | | | The AMS includes an ADC as well as on-chip sensors that can be used to sample external voltages and monitor on-die operating conditions, such as temperature and supply voltage levels. Signed-off-by: Rajnikant Bhojani <rajnikant.bhojani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: sdhci: set host quirk2 for no 1.8V support for 1.0 siliconManish Narani2017-11-281-0/+4
| | | | | | | | | | | | | | | | | | This patch sets host quirk2 bit field for No 1.8V supported in case of 1.0 silicon. The 1.0 silicon doesn't have support for UHS-I modes. This property will ensure the SD runs on High Speed mode. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Use reset controller framework for asserting/de-asserting resetAnurag Kumar Vulisha2017-11-281-2/+1
| | | | | | | | | | | | | | | | | | | | This patch modifies the phy_zynqmp.c driver to use reset-controller framework for asserting/de-asserting reset for High Speed modules. Also fix documentation and dtsi. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add reset-controller support in serdes driverAnurag Kumar Vulisha2017-11-281-0/+13
| | | | | | | | | | | | | | | | This patch add the reset nodes in zynqmp.dtsi which are used by reset-controller framework Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Remove tx_termination_fix detection on silicon v1Michal Simek2017-11-281-1/+2
| | | | | | | | | | | | | | | | Only silicon v1 requires this termination fix. With new nvmem soc revision nvmem detection driver this can be autodetected at run time and this flag is not needed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add support for zynqmp nvmem firmware driverNava kishore Manne2017-11-281-0/+10
| | | | | | | | | | | | | | Add support for zynqmp nvmem firmware driver. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add support for zcu102 1.0 revMichal Simek2017-11-283-1/+39
| | | | | | | | | | | | 1.0 rev is the latest rev. Describe information in eeprom. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Update device tree for pinmuxMichal Simek2017-11-282-0/+295
| | | | | | | | | | | | | | Added pin control support in device tree for zynqmp. Signed-off-by: Chirag Parekh <chirag.parekh@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Remove local-mac-address from dtsi fileMichal Simek2017-11-285-8/+0
| | | | | | | | | | | | | | | | Generic dtsi file can't use the same mac address for all. U-Boot read mac from eeprom in zcu102 case and for others random mac address is generated. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Use SPDX license with dc4Michal Simek2017-11-281-4/+1
| | | | | | | | | | | | Just header change. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Remove leading 0s from mtd table for spi flashesMichal Simek2017-11-282-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dtc reports issues with it. arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb: Warning (unit_address_format): Node /amba/spi@ff040000/spi0_flash0@0/spi0_flash0@00000000 unit name should not have leading 0s arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb: Warning (unit_address_format): Node /amba/spi@ff050000/spi1_flash0@0/spi1_flash0@00000000 unit name should not have leading 0s arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning (unit_address_format): Node /amba/spi@ff040000/spi0_flash0@0/spi0_flash0@00000000 unit name should not have leading 0s arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning (unit_address_format): Node /amba/spi@ff050000/spi1_flash0@0/spi1_flash0@00000000 unit name should not have leading 0s Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add missing alias for gem0 for ep108Michal Simek2017-11-281-0/+1
| | | | | | | | | | | | Add missing alias for gem0 for ep108 to have proper sequence number. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: zcu102: Modifying GTR lane-0 to PCIeBharat Kumar Gogada2017-11-281-2/+2
| | | | | | | | | | | | | | | | - Enabling GTR lane-0 to PCIe - Enabling PCIe node in device tree Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Update device tree for gpioChirag Parekh2017-11-281-1/+1
| | | | | | | | | | | | | | Used defines rather than raw values for gpio configurations. Signed-off-by: Chirag Parekh <chirag.parekh@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add revB string to compatible stringMichal Simek2017-11-281-0/+1
| | | | | | | | | | | | | | Some user space libraries reading platform compatible string and based on that changing behavior. Mark revB board with revB string. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Use revision in dts file descriptionMichal Simek2017-11-281-1/+1
| | | | | | | | | | | | Trivial change. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: PM: Specify power domains for DP related nodesJyotheeswar Reddy Mutthareddyvari2017-11-281-1/+3
| | | | | | | | | | | | | | | | | | | | Currently DP power domain (pd_dp) is not attached to any of the DP nodes which is causing genpd to trigger a power down request for DP domain, making all DP related peripherals unusable. So assign power domains for all DP related nodes to enable proper accounting of DP power domain usage. Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: disable smmuNaga Sureshkumar Relli2017-11-281-26/+1
| | | | | | | | | | | | | | This patch disables the smmu and also removes the mmu-masters Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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