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* Merge tag 'ti-v2020.07-rc1' of ↵Tom Rini2020-04-205-6/+31
|\ | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix boot on am335x guardian board - Increase OPSI speed on AM65x and J721E devices - Use JTAD register for identifying K3 devices. - Update TI entry in MAINTAINERS file.
| * arm: dts: k3-j721e: Increase OSPI default frequency to 50MHzVignesh Raghavendra2020-04-142-2/+2
| | | | | | | | | | | | | | In 1 bit mode OSPI can work at upto 50MHz, this provides better write performance. Therefore increase frequency from 40MHz to 50MHz Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
| * arm: dts: k3-am654: Increase OSPI default frequency to 50MHzVignesh Raghavendra2020-04-142-2/+2
| | | | | | | | | | | | | | In 1 bit mode OSPI can work at upto 50MHz, this provides better write performance. Therefore increase frequency from 40MHz to 50MHz Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
| * am335x, guardian: load env from NANDMoses Christopher2020-04-141-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - As there is a requirement to store certain data, we need a persistent storage in u-boot. Hence, we need to save env in NAND - Add default Guardian environment variables - Update partition table: - Reserve some space for experimentation, this ensures proper backwards compatibility - Update defconfig accordingly Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
| * am335x, guardian: boot stage feedback in headless modeMoses Christopher2020-04-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | This patch enables the guardian board to provide feedback about the boot stage in headless mode. The on-board led would behave in the following pattern * U-boot -> GLOW LED * Linux -> BLINK LED [HEART-BEAT PATTERN] Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
* | Add support for i.MXRT1020-EVK boardGiulio Benetti2020-04-183-1/+244
| | | | | | | | | | Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* | ARM: dts: imxrt1020: add dtsi fileGiulio Benetti2020-04-181-0/+133
| | | | | | | | | | | | | | Add dtsi file for i.MXRT1020. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* | dts: imx: Add fixed-link property to HSC and DDC (imx53) devicesLukasz Majewski2020-04-181-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Those two boards are supposed to be run with a single u-boot binary. There are notable differences though - HSC uses DSA switch (which phy_id == 0x0) and DCC (DP83848C). After the commit 3bf135b6c367 ("drivers: net: phy: Ignore PHY ID 0 during PHY probing") the PHY devices with phy_id == 0 are not created in U-Boot anymore. This caused regression on HSC. To fix this problem - the fec's 'fixed-link' node has been introduced and the phy_id is not assessed anymore. This approach works on both boards. Signed-off-by: Lukasz Majewski <lukma@denx.de>
* | ARM: imx6: DHCOM i.MX6 PDK: Fix usb-otg VBUS regulatorHarald Seiler2020-04-182-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During the conversion of this board to DM_REGULATOR, usb-mass-storage was broken and started failing with the following error: => ums 0 mmc 2 UMS: LUN 0, dev 2, hwpart 0, sector 0x0, count 0xe90000 Error enabling VBUS supply g_dnl_register: failed!, error: -38 g_dnl_register failed Fix this by adding the relevant GPIO to the regulator node. Fixes: 4ca99fe81aea ("ARM: imx: dh-imx6: Enable DM regulator") Signed-off-by: Harald Seiler <hws@denx.de>
* | ARM: imx6: DHCOM i.MX6 PDK: Convert to DM_ETHHarald Seiler2020-04-183-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use DM_ETH instead of legacy networking. Add VIO as a fixed regulator to the relevant device-trees and augment the FEC node with properties for the reset GPIO. It should be noted that the relevant properties for the reset GPIO already exist in the PHY node (reset-gpios, reset-delay-us, reset-post-delay-us) but U-Boot currently ignores those and only supports the bus-level reset properties in the FEC node (phy-reset-gpios, phy-reset-duration, phy-reset-post-delay). Signed-off-by: Harald Seiler <hws@denx.de>
* | wandboard: Fix version detection for mx6q/mx6dl revD1Fabio Estevam2020-04-183-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The detection of the revD1 version is based on the presence of the PMIC. Currently revb1 device trees are used for mx6q/mx6dl variants, which do not have the PMIC nodes. This causes revD1 boards to be incorrectly be detected as revB1. Fix this issue by using the revd1 device trees, so that the PMIC node can be found and then the PMIC can be detected by reading its register ID. Imported the revd1 device trees from mainline kernel version 5.7-rc1. Reported-by: Heiko Schocher <hs@denx.de> Reported-by: Derek Atkins <derek@ihtfp.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Derek Atkins <derek@ihtfp.com> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Peter Robinson <pbrobinson@gmail.com>
* | arch: arm: dts: imxrt1050-evk: add lcdif nodeGiulio Benetti2020-04-181-0/+60
| | | | | | | | | | | | | | Add lcdif node and its pinctrl. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | ARM: dts: imxrt1050: allow this dtsi file to be compiled in LinuxGiulio Benetti2020-04-181-1/+3
| | | | | | | | | | | | | | | | | | Linux doesn't provide skeleton.dtsi file so let's remove its include and provide #address-cells/size-cells = <1> that were defined in skeleton.dtsi before. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | ARM: dts: i.mxrt1050: add lcdif nodeGiulio Benetti2020-04-181-0/+10
| | | | | | | | | | | | | | Add lcdif node to SoC. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | arm: dt: imx6qdl: add tqma6[qdl] som on mba6 mainboardMichael Krummsdorf2020-04-1717-0/+716
| | | | | | | | | | | | | | | | | | | | | | | | | | The device trees for TQMa6x SOM support variations in - CPU type: imx6dl- or imx6q- - MBa6 I2C bus access: -mba6a (i2c1) or -mba6b (i2c3) (plus the respective common/module include trees) - USBH1 is directly connected to a hub - USBOTG is connected to a separate connector and can act as host/device or full OTG port. Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
* | ARM: dts: stm32: Rename LEDs to match silkscreen on AV96Marek Vasut2020-04-151-3/+3
| | | | | | | | | | | | | | | | | | | | | | The LED labels do not match the silkscreen on the board, fix it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* | ARM: dts: stm32: Add KS8851-16MLL ethernet on FMC2Marek Vasut2020-04-151-0/+68
| | | | | | | | | | | | | | | | | | | | | | Add DT entries, Kconfig entries and board-specific entries to configure FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-marvellWIP/14Apr2020Tom Rini2020-04-143-11/+29
|\ \ | | | | | | | | | | | | | | | | | | - Misc enhancements to Clearfog, including board variant detection (Joel) - Misc enhancements to Turris Mox, including generalization of the ARMADA37xx DDR size detection (Marek)
| * | arm: mvebu: dts: turris_mox: fix USB3 regulatorMarek Behún2020-04-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e8e9715df2d4 requires the USB3 regulator node to have the enable-active-high property for the regulator to work properly. The GPIO_ACTIVE_HIGH constant is not enough anymore. Signed-off-by: Marek Behún <marek.behun@nic.cz> Fixes: e8e9715df2d4 ("regulator: fixed: Modify enable-active-high...") Reviewed-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: dts: turris_mox: update sdhci propertiesMarek Behún2020-04-141-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | With recent changes to the mmc subsystem (chip detect code etc) update the sdhci node of the Turris Mox device tree. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: solidrun: remove hardcoded DTS MAC addressJoel Johnson2020-04-141-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Using a consistent hardcoded MAC address from the DTS file causes issues when using multiple devices on the same network segment. Instead rely on environment configuration or random generation. Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: dts: Sort Armada series dts alphabeticallyJosip Kelecic2020-04-141-10/+10
| |/ | | | | | | | | | | | | | | | | Sort the Armada series dts in the Makefile alphabetically prior to adding new board support. Signed-off-by: Josip Kelečić <josip.kelecic@sartura.hr> Reviewed-by: Luka Kovacic <luka.kovacic@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaWIP/13Apr2020Tom Rini2020-04-137-146/+302
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| * arm: socfpga: arria10: Enable cache driver in SPLLey Foon Tan2020-04-131-0/+4
| | | | | | | | | | | | | | | | | | | | Adding "u-boot,dm-pre-reloc" and enable CONFIG_SPL_CACHE to enable cache driver in SPL. This fixed error below in SPL: cache controller driver NOT found! Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
| * arm: dts: arria10: Update dtsi/dts from LinuxLey Foon Tan2020-04-134-56/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update these 3 files from Linux:. - socfpga_arria10.dtsi (Commit ID c1459a9d7e92) - socfpga_arria10_socdk.dtsi (Commit ID d9b9f805ee2b) - socfpga_arria10_socdk_sdmmc.dts (Commit ID 17808d445b6f) Change in socfpga_arria10.dtsi: - Add clkmgr label, so that can reference to it in u-boot.dtsi. Change in socfpga_arria10-u-boot.dtsi: - Add compatible and altr,sysmgr-syscon for uboot. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
| * arm: dts: arria10: Move uboot specific properties to u-boot.dtsiLey Foon Tan2020-04-136-92/+186
| | | | | | | | | | | | | | Move Uboot specific properties to *u-boot.dtsi files. Preparation to sync Arria 10 device tree from Linux. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
| * ARM: socfpga: Enable DM RTC bootcount on ABB SECU1Marek Vasut2020-04-131-0/+6
| | | | | | | | | | | | | | | | | | Add and enable RTC-backed boot counter on ABB SECU1 platform. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
* | Merge branch 'next'Tom Rini2020-04-13120-1975/+5720
|\ \ | |/ |/| | | | | | | | | | | | | | | | | Pull in changes that have been pending in our 'next' branch. This includes: - A large number of CI improvements including moving to gcc-9.2 for all platforms. - amlogic, xilinx, stm32, TI SoC updates - USB and i2c subsystem updtaes - Re-sync Kbuild/etc logic with v4.19 of the Linux kernel. - RSA key handling improvements
| * Merge tag 'u-boot-amlogic-20200406' of ↵WIP/08Apr2020-nextTom Rini2020-04-0834-557/+2541
| |\ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic into next - clk: meson-g12a: missing break - sync all Amlogic DT from Linux v5.6-rc2 - MMC clock fixups - add support for Libre Computer AML-S905D-PC and AML-S912-PC
| | * arm64: dts: meson: add libretech-pc supportJerome Brunet2020-04-063-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Amlogic based libretech-pc platform. This platform comes with 2 variant, based on the s905d or s912 SoC. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> [narmstrong: update board/amlogic/q200/MAINTAINERS] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| | * arm64: dts: meson: import libretech-pc from linux v5.6-rc2Jerome Brunet2020-04-064-0/+465
| | | | | | | | | | | | | | | | | | | | | | | | | | | Sync the libretech-pc device tree from Linux v5.6-rc2 11a48a5a18c6 ("Linux 5.6-rc2") Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| | * arm64: dts: meson: sync dt and bindings from v5.6-rc2Jerome Brunet2020-04-0627-557/+2060
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync the device tree and dt-bindings from Linux v5.6-rc2 11a48a5a18c6 ("Linux 5.6-rc2") The only exception to this is the mmc pinctrl pin bias of gxl SoC family. This is a fix which found its way to u-boot but not Linux yet. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | Merge tag 'xilinx-for-v2020.07' of ↵WIP/07Apr2020-nextTom Rini2020-04-0752-496/+1717
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2020.07 common: - Align ENV_FAT_INTERFACE - Fix MAC address source print log - Improve based autodetection code xilinx: - Enable netconsole Microblaze: - Setup default ENV_OFFSET/ENV_SECT_SIZE Zynq: - Multiple DT updates/fixes - Use DEVICE_TREE environment variable for DTB selection - Switch to single zynq configuration - Enable NOR flash via DM - Minor SPL print removal - Enable i2c mux driver ZynqMP: - Print multiboot register - Enable cache commands in mini mtest - Multiple DT updates/fixes - Fix firmware probing when driver is not enabled - Specify 3rd backup RAM boot mode in SPL - Add SPL support for zcu102 v1.1 and zcu111 revA - Redesign debug uart enabling and psu_init delay - Enable full u-boot run from EL3 - Enable u-boot.itb generation without ATF with U-Boot in EL3 Versal: - Enable distro default - Enable others SPI flashes - Enable systems without DDR Drivers: - Gem: - Flush memory after freeing - Handle mdio bus separately - Watchdog: - Get rid of unused global data pointer - Enable window watchdog timer - Serial: - Change reinitialization logic in zynq serial driver Signed-off-by: Tom Rini <trini@konsulko.com>
| | * | arm64: zynqmp Add support for zcu102 rev1.1Michal Simek2020-04-062-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | rev1.1 has different DDR sodimm module that's why it requires different DDR configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | ARM: zynq: Enable DM for CFI NOR flashMichal Simek2020-04-061-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With multi defconfig NOR flash information about NOR should be taken from DT that's why there is no reason to specify address and sizes via fixed config. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configurationMichal Simek2020-04-061-10/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no real need to include full DT when only some nodes are enough to use. It will save some space. Retested with FSBL for initial SoC setup. SPL didn't work. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | ARM: zynq: Change zc770 xm011 Nand x16 configurationsMichal Simek2020-04-062-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of symlink include origin file and just change model description. Difference is not in DT but in ps7_init configurations which is taken based on device tree name that's why the same DT can't be used. Also update model and update comments to match configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Move pinctrl node under firmware nodeMichal Simek2020-04-061-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Pinctrl is handled via firmare interface that's why move it there without reg property and new compatible string. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Fix GIC compatible propertyMichal Simek2020-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dtbs_check is showing warning around GIC compatible property as interrupt-controller@f9010000: compatible: ['arm,gic-400', 'arm,cortex-a15-gic'] is not valid under any of the given schemas Similar change has been done also by Linux kernel commit 5400cdc1410b ("ARM: dts: sunxi: Fix GIC compatible") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | ARM: zynq: Fix addresses in partition definitionsMichal Simek2020-04-062-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Node name should be <name>@<address> which is not how partitions are described. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Fix addresses in partition definitionsMichal Simek2020-04-0611-44/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Node name should be <name>@<address> which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Sync DP subsystemMichal Simek2020-04-065-110/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync DP subsystem with the latest state in Xilinx U-Boot repository. This binding hasn't been approved in mainline Linux but it is much better than ancient version which this patch removes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Do not duplicate flash partition label propertyAmit Kumar Mahapatra2020-04-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In kernel 5.4, support has been added for reading MTD devices via the nvmem API. For this the mtd devices are registered as read-only NVMEM providers under sysfs with the same name as the flash partition label property. So if flash partition label property of multiple flash devices are identical then the second mtd device fails to get registered as a NVMEM provider. This patch fixes the issue by having different label property for different flashes. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: dts: zynqmp: Add clk cells for sdhciAshok Reddy Soma2020-04-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock-cells and clock-output-names for sdhci0 and sdhci1. These are needed for linux sdhci driver from 5.4 version onwards. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Remove second copy of reset-controllerMichal Simek2020-04-061-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reset controller is handled via firmware that's why it should be the part of firmware node. Origin solution hasn't been removed when above change was applied by commit b07e97b4ba27 ("arm64: zynqmp: Use reset header in zynqmp.dtsi"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP BoardsManish Narani2020-04-068-6/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards. User can remove this property to enable the UHS mode. This is to keep the same speed (HS) modes across all the stages of the Linux Boot. Due to power cycling limitation of some of the ZynqMP boards, some SD cards don't get power cycled and are failing in Linux. Signed-off-by: Manish Narani <manish.narani@xilinx.com>
| | * | arm64: zynqmp: Sync zynqmp fpga manager with mainlineNava kishore Manne2020-04-062-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync zynqmp fpga manager with mainline. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Remove unused zynqmp-clk.dtsiMichal Simek2020-04-061-244/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All boards have been converted to firmware based driver that's why we can remove this file now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | ARM: zynq: Fix spi name nodeMichal Simek2020-04-062-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | None name address should be aligned with address. DTC 1.5.1 is reporting issues related to that. arch/arm/boot/dts/zynq-zc770-xm010.dts:106.10-119.4: Warning (spi_bus_reg): /amba/spi@e0007000/flash@0: SPI bus unit address format error, expected "1" arch/arm/boot/dts/zynq-zc770-xm013.dts:101.19-109.4: Warning (spi_bus_reg): /amba/spi@e0006000/eeprom@0: SPI bus unit address format error, expected "2" Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Update Copyright years to 2020Michal Simek2020-04-0625-25/+25
| | | | | | | | | | | | | | | | | | | | | | | | Trivial change. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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