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* ARM: dts: zynq: correct and improve the model property of dt filesLuis Araneda2019-02-151-1/+1
| | | | | | | | | Replace the current value of the model property by a more accurate description of each board (which includes the manufacturer), as some of the boards had the same value ("Xilinx Zynq") Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Sync up licenses with mainline kernelMichal Simek2018-04-091-4/+1
| | | | | | | Use different location for SPDX line. Also update dates for new mainline DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Sync location of DT properties with LinuxMichal Simek2017-11-281-1/+1
| | | | | | | This is trival change which only ensures the same location with Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add device-type property for zynq ethernet phy nodesSai Pavan Boddu2017-11-281-0/+1
| | | | | | | | Mention device-type = "ethernet-phy", as qemu will need this in absence of compatible. Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Remove DTC 1.4.2 warningsMichal Simek2016-11-151-1/+1
| | | | | | | | | | | | | | DTC 1.4.2 reports these warnings: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /pmu has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name, but no reg property This patch is fixing them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Fix usb phy node for ZyboMichal Simek2016-04-131-1/+1
| | | | | | Compatible property should be the first. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Align spi and qspi node locationsMichal Simek2016-04-131-3/+3
| | | | | | | Keep nodes alphabelitally sorted. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
* ARM: zynq: Fix bootargs in board dtsiMichal Simek2016-04-131-1/+1
| | | | | | | | - Sync with Linux kernel - Remove rootfs - Remove earlyprintk Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Add reset-gpio property for USB on ZyboMichal Simek2016-02-221-1/+2
| | | | | | | | DTS syncup with Linux kernel. Add missing reset-gpio property. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Update ZYBO config optionsNathan Rossi2015-12-181-0/+16
| | | | | | | | | | | Update the ZYBO device tree and enable config options that relate to the added devices in the device tree. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michal Simek <monstr@monstr.eu> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Enable u-boot,dm-pre-reloc for sdhciMichal Simek2015-12-181-0/+2
| | | | | | | | Enable u-boot,dm-pre-reloc for sdhci for zc706, zed and zybo. And create aliases for it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm: zynq: dts: Add U-Boot device tree additionsSimon Glass2015-11-041-0/+1
| | | | | | | | | We need to mark some device tree nodes so that they are available before relocation. This enables driver model to find these automatically. In the case of SPL it ensures that these nodes will be retained in SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: DT: Sync zc702/zc706/zed/zybo DT with kernelMichal Simek2015-07-281-4/+34
| | | | | | Syncup with the latest DT from the Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: dts: zynq: Add digilent ZYBO board dtsPeter Crosthwaite2014-11-111-0/+23
It's a Zynq board similar in design to the currently supported ones. 512MB of RAM and UART1 is used. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>