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* arm: ti: k3: Resync dts files and bindings with Linux Kernel v5.14Tom Rini2021-10-031-29/+75
| | | | | | | | | | | | This resyncs the dts files for all of the currently in-tree K3 platforms, along with relevant bindings, with the v5.14 Linux Kernel release. Of note are that the main-navss/mcu-navss nodes were renamed to main_navss / mcu_navss and so the u-boot.dtsi files needed to be updated to match. Tested on j721e_evm and am65x_evm. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: dts: k3-j7200-common-proc-board: Enable SERDES DTAswath Govindraju2021-07-271-0/+23
| | | | | | | | | | Add default lane function for torrent serdes. This is in sync with v5.13 Linux Kernel. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-14-kishon@ti.com
* arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-BootLokesh Vutla2021-02-041-43/+79
| | | | | | | | | Sync all J7200 related v5.11-rc6 Linux kernel dts into U-Boot. MCU R5F nodes are not yet added in Linux kernel yet but were added in U-Boot. In order to avoid regressions, r5f nodes are kept intact. These will be added in kernel in future. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: dts: k3-j7200-common-proc-board: Enable support for UHS modesFaiz Abbas2021-02-041-2/+47
| | | | | | | | | Add support for UHS modes by adding the regulators to power cycle and voltage switch the card. Also add pinmuxes required for each node Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
* arm: dts: k3-j7200-main: Add MAIN domain R5F cluster nodesSuman Anna2020-09-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS) subsystems/clusters. One R5F cluster is present within the MCU domain (MCU_R5FSS0), and the other one is present within the MAIN domain (MAIN_R5FSS0). Each of these can be configured at boot time to be either run in a LockStep mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode. These subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal memories for each core split between two banks - ATCM and BTCM (further interleaved into two banks). The TCMs of both Cores are combined in LockStep-mode to provide a larger 128 KB of memory. Add the DT node for the MAIN domain R5F cluster/subsystem, the two R5F cores are added as child nodes to the main cluster/subsystem node. The cluster is configured to run in Split-mode by default, with the ATCMs enabled to allow the R5 cores to execute code from DDR with boot-strapping code from ATCM. The inter-processor communication between the main A72 cores and these processors is achieved through shared memory and Mailboxes. Signed-off-by: Suman Anna <s-anna@ti.com>
* arm: dts: k3-j7200-mcu: Add MCU domain R5F cluster nodeSuman Anna2020-09-151-0/+5
| | | | | | | | | | | | | | | | | | | | | | | The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS) subsystems/clusters. One R5F cluster is present within the MCU domain (MCU_R5FSS0), and the other one is present within the MAIN domain (MAIN_R5FSS0). Each of these can be configured at boot time to be either run in a LockStep mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode. These subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal memories for each core split between two banks - ATCM and BTCM (further interleaved into two banks). The TCMs of both Cores are combined in LockStep-mode to provide a larger 128 KB of memory. Add the DT node for the MCU domain R5F cluster/subsystem, the two R5F cores are added as child nodes to the main cluster/subsystem node. The cluster is configured to run in LockStep mode by default, with the ATCMs enabled to allow the R5 cores to execute code from DDR with boot-strapping code from ATCM. The inter-processor communication between the main A72 cores and these processors is achieved through shared memory and Mailboxes. Signed-off-by: Suman Anna <s-anna@ti.com>
* arm: dts: k3-j7200-common-proc-board: Enable CPSW2G portVignesh Raghavendra2020-08-111-0/+43
| | | | | | Enable CPSW2G port to support networking in U-Boot Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* ARM: dts: k3-j7200: Add wkup gpio nodeVignesh Raghavendra2020-08-111-0/+11
| | | | | | | Add wkup_gpio0 node required for detecting whether board mux is set HyperFlash. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* arm: dts: k3-j7200: Add USB related DT entriesVignesh Raghavendra2020-08-111-0/+18
| | | | | | Add USB related DT entries to enable USB device mode. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* arm: dts: k3-j7200: Add dts supportLokesh Vutla2020-08-111-0/+123
Add the basic a72 dts for j7200. Following nodes were supported: - UART - MMC SD - I2C - TISCI communication Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
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