| Commit message (Collapse) | Author | Age | Files | Lines |
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When adding a partition, set the logical_partition member in the media
structure as mandated by the UEFI spec.
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Rockchip release bl31.elf file for armv8 SoCs like rk3399, rk3328,
the elf have more than one section, we need to decode it first and
packed them into u-boot.itb with its file. This script is to generate
the its script.
Need default bl31.elf in root directory of U-Boot source and dtb
as parameter.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Enable SPL_FIT_GENERATOR with path for it.
With this patch you can get u-boot.itb for rk3399-firefly with:
> make u-boot.itb
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Since we support ATF in SPL and add script for it, let's make the
document up to date.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Only rk3399 atf need ROCKCHIP_SPL_RESERVE_IRAM. This commit updates
its default setting to 0 so that other SoCs do not need to define it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Rockchip SoCs only need boot0 hook at SPL, and the U-Boot proper do not
need it.
The very beginning of U-Boot proper is different between armv7 and armv8:
armv7 start with ARM_VECTORS while armv8 start with 'b reset'.
Here is the map of very beginning for all cases:
armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS
armv7 U-Boot: ARM_VECTORS
armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399)
armv8 U-Boot: 'b reset'
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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This commit adds ENV_SIZE and ENV_OFFSET configuration items for
ARCH_ROCKCHIP, but keeps these non-visible (i.e. not prompt is given).
With these new items present, the configuration from the header files
is moved to Kconfig.
Keeping these non-visible is necessary to have the possibility to
select new default values if CONFIG_IS_IN_* is changed (interactively
or with oldconfig). Otherwise it will always be set to a previous
value if used with a prompt. As an example if we do a defconfig with
CONFIG_IS_IN_MMC and change it to CONFIG_IS_IN_SPI_FLASH via
menuconfig, ENV_SIZE and ENV_OFFSET will not be changed to the correct
values as defconfig will already have set them to the default values
of CONFIG_IS_IN_MMC in .config.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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The PCIe reset signal is connected to GPIO4_C6 on the Puma
module. This pin is supplied by 1.8V, but the default iodomain
setting is 3.0V and in this situation the pin is unable to go
high.
Linux assumes that this signal works in early boot
as PCIe is probed before loading the iodomain driver.
Make PCIe work in Linux by setting the gpio4cd iodomain to 1.8V.
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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User do not need to access the reserved part in system, remove them
from partition table.
Rename atf to trust as generic name for armv7 do not use ATF.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Increase setup, assertion and hold time related to chip-select signal.
Additional delay is needed for the signal to propogate through FPGA.
This adjustment slightly increase the read and write cycle but has no
impact on burst read or write.
Signed-off-by: York Sun <york.sun@nxp.com>
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Update README file to note LS2088A and LS1088A don't support booting
from NAND flash.
Signed-off-by: York Sun <york.sun@nxp.com>
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Again the image size increases and the length needs to be adjusted.
Signed-off-by: York Sun <york.sun@nxp.com>
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I2C reading for DIP switch setting is not reliable for LS1012ARDB
RevD and later versions. This patch is to add hwconfig support to
enable/disable eSDHC1 manually for these boards. Also drop 'status'
fix-up for eSDHC0 and leave it as it is. It shouldn't always be
fixed up with 'okay'.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and
detect it when u-boot starts up.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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This patch is to clean up definitions for I2C IO expanders.
The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2.
Fixed it in this patch.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Function fdt_fixup_board_enet() performs fdt fixup. Only return
fdt_status_okay() when both MC is applied and DPL is deployed, else
return fdt_status_fail().
This check is added to LS1088A/LS2080A/LS2088A boards.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Using "cpu_pos_mask()" function to detect the real online cpus,
and discard the needless cpu nodes on kernel dts.
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Check LS1043A/LS2080a by device ID without using personality ID to
determine revision number. This check applies to all various
personalities of the same SoC family.
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Include common config_distro_defaults.h and config_distro_bootcmd.h
for u-boot enviroments to support automatical distro boot which
scan boot.scr from external storage devices(e.g. SD and USB)
and execute autoboot script.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Include common config_distro_defaults.h and config_distro_bootcmd.h
for u-boot enviroments to support automatical distro boot which
scan boot.scr from external storage devices(e.g. SD and USB)
and execute autoboot script.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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The BRDCFG5[SPISDHC] register field of Qixis device is used
to control SPI and SDHC signal routing.
10 = Force SDHC Mode
- SPI_CS[0] is routed to CPLD for SDHC_VS use.
- SPI_CS[1] is unused.
- SPI_CS[2:3] are routed to the TDMRiser slot.
11 = Force eMMC Mode
- SPI_CS[0:3] are routed to the eMMC card.
0X = Auto Mode
- If SDHC_CS_B=0 (SDHC card installed): Use SDHC mode
described above.
- Else SDHC_CS_B=1 (no SDHC card installed): Use eMMC
mode described above.
In default the hardware uses auto mode, but sometimes we need
to use force SDHC mode to support SD card hotplug, or SD sleep
waking up in kernel. This patch is to support force SDHC mode
by hwconfig.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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When booting a itb file with a Ramdisk on a imx6 based
board, U-Boot drops the warning:
Loading Kernel Image ... OK
Loading Ramdisk to 4ecf1000, end 4ef8b11f ... \
CACHE: Misaligned operation at range [4ecf1000, 4ef8b11f]
Fix it!
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Ayoub Zaki <hs@denx.de>
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Use dfu_alt_info_emmc variable from include/environment/ti/dfu.h file.
It was probably overlooked when extracting DFU variables to mentioned
file.
This patch fixes DFU on BeagleBone Black, so that we can use commands
like ones below to upgrade various images on eMMC:
=> setenv dfu_alt_info $dfu_alt_info_emmc
=> dfu 0 mmc 1
$ dfu-util -D MLO -a MLO.raw
$ dfu-util -D u-boot.img -a u-boot.img.raw
Without this patch, the user is forced to assign the value to
dfu_alt_info_emmc manually, which contradicts with instructions [1].
[1] http://processors.wiki.ti.com/index.php/Linux_Core_U-Boot_User%27s_Guide
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
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This patch is ported from the Linux patch posted at [1] and applied to
net tree as commit f1e2400a80ff.
The purpose of this change is to fix the incorrect detection of the link
partner (LP) advertised capabilities which sometimes happens with this PHY
(roughly 1 time in a dozen)
This issue may cause the link to be negotiated at 10Mbps/Full or
10Mbps/Half when 100MBps/Full is actually possible. In some case, the link
is even completely broken and no communication is possible.
To detect the corruption, we must look for a magic undocumented bit in the
WOL bank (hint given by the SoC vendor kernel) but this is not enough to
cover all cases. We also have to look at the LPA ack. If the LP supports
Aneg but did not ack our base code when aneg is completed, we assume
something went wrong.
The detection of a corrupted LPA triggers a restart of the aneg process.
This solves the problem but may take up to 6 retries to complete.
[1] https://lkml.kernel.org/r/20171208110811.30789-1-jbrunet@baylibre.com
Fixes: 8995a96d1d67 ("net: phy: Add Amlogic Meson GXL Internal PHY support")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Using writel causes a "Synchronous Abort". Invert the arguments.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.01-rc2-v2
fpga:
- Enable loading bitstream via fit image for !xilinx platforms
zynq:
- Fix SPL SD boot mode
zynqmp:
- Not not reset in panic
- Do not use simple allocator because of fat changes
- Various dt chagnes
- modeboot variable setup
- Fix fpga loading on automotive devices
- Fix coverity issues
test:
- Fix env test for !hush case - Stephen's patch
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After adding our small zynq uboot which has hush parser off same
variable tests start to failed. Use quotes only when hush is enabled.
Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Access the timestamp ref ctrl register only if runinng
at el3 level otherwise just return. This change fixes
the issue when CRL APB is marked as secure and accessing
when not in el3 causes exception.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Check all return values from file functions.
In case of negative return exit immediately.
Also change fsize return value which can't be negative.
Reported-by: Coverity (CID: 23276, 23304, 169357)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Dont use 4K sector erase by default, Disabling this
would use 64K sector erase and decreases erase time.
Also disabled by the fact that UBIFS and JFFS2 won't work
with 4K sector erase.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enabling all spi flashes because some of these boards can have different
flashes compared to public version.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable fpga loadb and loadbp for zynqmp platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable misc devices for zynqmp targets.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove silicon prefix. Automotive grade devices are using xazu instead
of xczu prefix.
The patch "fpga: xilinx: Check for substring in device ID validation"
(sha1: f72132673a01216e760864e442f168977cce2bd2)
enables this functionality for zynq devices that only substrings are
checked.
Unfortunately there is no way how to detect device grade that's why
this change is reasonable.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add missing zynq_board_read_rom_ethaddr() prototype reported by sparse.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
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This is the same patch as was done earlier.
Please look at Linux patch:
"arm64: zynqmp: Use only earlycon bootargs instead of full one"
(sha1: f3609c8d4af28b9cc22ca49bf8e529b582ec188c)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove overfetch, ratectrl, include-sg and src-issue dma properties.
Driver is not using them and they are also not documented in the binding
doc.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Kedareswara rao Appana <appanad@xilinx.com>
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The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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clk command provides an option to see actual clock setting.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable USB3.0 and SATA phy for zcu102 boards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Setup bootmode variable based on bootmode selection.
This is helping with setting up boot method.
Also setup sdbootdevice.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Dont read boot mode register directly read it using
zynqmp_mmio_read().
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Setup proper dependency in Kconfig for SPL_CLK.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch is enabling support for SPL QSPI boot.
First of all it is necessary to generate atf-spi.ub which is different
format than atf-uboot.ub (this can be made as legacy image too)
ADDR=`arm-xilinx-linux-gnueabi-readelf -a bl31.elf | grep "Entry point
address" | cut -d ':' -f 2 | sed -e 's/^[ \t]*//'`
aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin
./tools/mkimage -f auto -A arm64 -T firmware -C none -O u-boot -a $ADDR
-e $ADDR -n "atf1" -E -b arch/arm/dts/zynqmp-zcu102.dtb -d bl31.bin
atf-uboot.ub
./tools/mkimage -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR
-n "atf-for-qspi" -E -d bl31.bin atf-spi.ub
This patch is using this QSPI layout with offsets:
0 boot.bin
512k atf-ub
640k u-boot.bin
1280k u-boot.img
Which corresponding by writing these images(read from MMC)
mmcinfo
sf probe
load mmc 0 10000000 boot.bin
sf erase 0 +$filesize
sf write 10000000 0 $filesize
load mmc 0 10000000 atf-spi.ub
sf erase 0x80000 +$filesize
sf write 10000000 0x80000 $filesize
load mmc 0 10000000 u-boot.bin
sf erase 0xa0000 +$filesize
sf write 10000000 0xa0000 $filesize
load mmc 0 10000000 u-boot.img
sf erase 0x140000 +$filesize
sf write 10000000 0x140000 $filesize
For testing u-boot running in EL3 you can break atf-spi.ub like this:
sf probe
sf erase 0x80000 +4
Then u-boot.img is executed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This reference is needed for pinctrl driver where some signals can be
routed directly to platform management unit (PMU).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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